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      1 //-- SystemZScheduleZ13.td - SystemZ Scheduling Definitions ----*- tblgen -*-=//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 // This file defines the machine model for Z13 to support instruction
     11 // scheduling and other instruction cost heuristics.
     12 //
     13 // Pseudos expanded right after isel do not need to be modelled here.
     14 //
     15 //===----------------------------------------------------------------------===//
     16 
     17 def Z13Model : SchedMachineModel {
     18 
     19     let UnsupportedFeatures = Arch11UnsupportedFeatures.List;
     20 
     21     let IssueWidth = 6;             // Number of instructions decoded per cycle.
     22     let MicroOpBufferSize = 60;     // Issue queues
     23     let LoadLatency = 1;            // Optimistic load latency.
     24 
     25     let PostRAScheduler = 1;
     26 
     27     // Extra cycles for a mispredicted branch.
     28     let MispredictPenalty = 20;
     29 }
     30 
     31 let SchedModel = Z13Model in  {
     32 // These definitions need the SchedModel value. They could be put in a
     33 // subtarget common include file, but it seems the include system in Tablegen
     34 // currently (2016) rejects multiple includes of same file.
     35 
     36 // Decoder grouping rules
     37 let NumMicroOps = 1 in {
     38   def : WriteRes<NormalGr, []>;
     39   def : WriteRes<BeginGroup, []> { let BeginGroup  = 1; }
     40   def : WriteRes<EndGroup, []>   { let EndGroup    = 1; }
     41 }
     42 def : WriteRes<Cracked, []> {
     43   let NumMicroOps = 2;
     44   let BeginGroup  = 1;
     45 }
     46 def : WriteRes<GroupAlone, []> {
     47   let NumMicroOps = 3;
     48   let BeginGroup  = 1;
     49   let EndGroup    = 1;
     50 }
     51 
     52 // Incoming latency removed from the register operand which is used together
     53 // with a memory operand by the instruction.
     54 def : ReadAdvance<RegReadAdv, 4>;
     55 
     56 // LoadLatency (above) is not used for instructions in this file. This is
     57 // instead the role of LSULatency, which is the latency value added to the
     58 // result of loads and instructions with folded memory operands.
     59 def : WriteRes<LSULatency, []> { let Latency = 4; let NumMicroOps = 0; }
     60 
     61 let NumMicroOps = 0 in {
     62   foreach L = 1-30 in
     63     def : WriteRes<!cast<SchedWrite>("WLat"#L), []> { let Latency = L; }
     64 }
     65 
     66 // Execution units.
     67 def Z13_FXaUnit     : ProcResource<2>;
     68 def Z13_FXbUnit     : ProcResource<2>;
     69 def Z13_LSUnit      : ProcResource<2>;
     70 def Z13_VecUnit     : ProcResource<2>;
     71 def Z13_VecFPdUnit  : ProcResource<2> { let BufferSize = 1; /* blocking */ }
     72 def Z13_VBUnit      : ProcResource<2>;
     73 def Z13_MCD         : ProcResource<1>;
     74 
     75 // Subtarget specific definitions of scheduling resources.
     76 let NumMicroOps = 0 in {
     77   def : WriteRes<FXa, [Z13_FXaUnit]>;
     78   def : WriteRes<FXb, [Z13_FXbUnit]>;
     79   def : WriteRes<LSU, [Z13_LSUnit]>;
     80   def : WriteRes<VecBF,  [Z13_VecUnit]>;
     81   def : WriteRes<VecDF,  [Z13_VecUnit]>;
     82   def : WriteRes<VecDFX, [Z13_VecUnit]>;
     83   def : WriteRes<VecMul,  [Z13_VecUnit]>;
     84   def : WriteRes<VecStr,  [Z13_VecUnit]>;
     85   def : WriteRes<VecXsPm, [Z13_VecUnit]>;
     86   foreach Num = 2-5 in { let ResourceCycles = [Num] in {
     87     def : WriteRes<!cast<SchedWrite>("FXa"#Num), [Z13_FXaUnit]>;
     88     def : WriteRes<!cast<SchedWrite>("FXb"#Num), [Z13_FXbUnit]>;
     89     def : WriteRes<!cast<SchedWrite>("LSU"#Num), [Z13_LSUnit]>;
     90     def : WriteRes<!cast<SchedWrite>("VecBF"#Num), [Z13_VecUnit]>;
     91     def : WriteRes<!cast<SchedWrite>("VecDF"#Num), [Z13_VecUnit]>;
     92     def : WriteRes<!cast<SchedWrite>("VecDFX"#Num), [Z13_VecUnit]>;
     93     def : WriteRes<!cast<SchedWrite>("VecMul"#Num), [Z13_VecUnit]>;
     94     def : WriteRes<!cast<SchedWrite>("VecStr"#Num), [Z13_VecUnit]>;
     95     def : WriteRes<!cast<SchedWrite>("VecXsPm"#Num), [Z13_VecUnit]>;
     96   }}
     97 
     98   def : WriteRes<VecFPd,  [Z13_VecFPdUnit]> { let ResourceCycles = [30]; }
     99 
    100   def : WriteRes<VBU,     [Z13_VBUnit]>; // Virtual Branching Unit
    101 }
    102 
    103 def : WriteRes<MCD, [Z13_MCD]> { let NumMicroOps = 3;
    104                                  let BeginGroup  = 1;
    105                                  let EndGroup    = 1; }
    106 
    107 // -------------------------- INSTRUCTIONS ---------------------------------- //
    108 
    109 // InstRW constructs have been used in order to preserve the
    110 // readability of the InstrInfo files.
    111 
    112 // For each instruction, as matched by a regexp, provide a list of
    113 // resources that it needs. These will be combined into a SchedClass.
    114 
    115 //===----------------------------------------------------------------------===//
    116 // Stack allocation
    117 //===----------------------------------------------------------------------===//
    118 
    119 // Pseudo -> LA / LAY
    120 def : InstRW<[WLat1, FXa, NormalGr], (instregex "ADJDYNALLOC$")>;
    121 
    122 //===----------------------------------------------------------------------===//
    123 // Branch instructions
    124 //===----------------------------------------------------------------------===//
    125 
    126 // Branch
    127 def : InstRW<[WLat1, VBU, NormalGr], (instregex "(Call)?BRC(L)?(Asm.*)?$")>;
    128 def : InstRW<[WLat1, VBU, NormalGr], (instregex "(Call)?J(G)?(Asm.*)?$")>;
    129 def : InstRW<[WLat1, FXb, NormalGr], (instregex "(Call)?BC(R)?(Asm.*)?$")>;
    130 def : InstRW<[WLat1, FXb, NormalGr], (instregex "(Call)?B(R)?(Asm.*)?$")>;
    131 def : InstRW<[WLat1, FXa, EndGroup], (instregex "BRCT(G)?$")>;
    132 def : InstRW<[WLat1, FXa, FXb, GroupAlone], (instregex "BRCTH$")>;
    133 def : InstRW<[WLat1, FXa, FXb, GroupAlone], (instregex "BCT(G)?(R)?$")>;
    134 def : InstRW<[WLat1, FXa2, FXb2, GroupAlone],
    135              (instregex "B(R)?X(H|L).*$")>;
    136 
    137 // Compare and branch
    138 def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(L)?(G)?(I|R)J(Asm.*)?$")>;
    139 def : InstRW<[WLat1, FXb2, GroupAlone],
    140              (instregex "C(L)?(G)?(I|R)B(Call|Return|Asm.*)?$")>;
    141 
    142 //===----------------------------------------------------------------------===//
    143 // Trap instructions
    144 //===----------------------------------------------------------------------===//
    145 
    146 // Trap
    147 def : InstRW<[WLat1, VBU, NormalGr], (instregex "(Cond)?Trap$")>;
    148 
    149 // Compare and trap
    150 def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(G)?(I|R)T(Asm.*)?$")>;
    151 def : InstRW<[WLat1, FXb, NormalGr], (instregex "CL(G)?RT(Asm.*)?$")>;
    152 def : InstRW<[WLat1, FXb, NormalGr], (instregex "CL(F|G)IT(Asm.*)?$")>;
    153 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "CL(G)?T(Asm.*)?$")>;
    154 
    155 //===----------------------------------------------------------------------===//
    156 // Call and return instructions
    157 //===----------------------------------------------------------------------===//
    158 
    159 // Call
    160 def : InstRW<[WLat1, VBU, FXa2, GroupAlone], (instregex "(Call)?BRAS$")>;
    161 def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "(Call)?BRASL$")>;
    162 def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "(Call)?BAS(R)?$")>;
    163 def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "TLS_(G|L)DCALL$")>;
    164 
    165 // Return
    166 def : InstRW<[WLat1, FXb, EndGroup], (instregex "Return$")>;
    167 def : InstRW<[WLat1, FXb, NormalGr], (instregex "CondReturn$")>;
    168 
    169 //===----------------------------------------------------------------------===//
    170 // Move instructions
    171 //===----------------------------------------------------------------------===//
    172 
    173 // Moves
    174 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "MV(G|H)?HI$")>;
    175 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "MVI(Y)?$")>;
    176 
    177 // Move character
    178 def : InstRW<[WLat1, FXb, LSU3, GroupAlone], (instregex "MVC$")>;
    179 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "MVCL(E|U)?$")>;
    180 
    181 // Pseudo -> reg move
    182 def : InstRW<[WLat1, FXa, NormalGr], (instregex "COPY(_TO_REGCLASS)?$")>;
    183 def : InstRW<[WLat1, FXa, NormalGr], (instregex "EXTRACT_SUBREG$")>;
    184 def : InstRW<[WLat1, FXa, NormalGr], (instregex "INSERT_SUBREG$")>;
    185 def : InstRW<[WLat1, FXa, NormalGr], (instregex "REG_SEQUENCE$")>;
    186 
    187 // Loads
    188 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L(Y|FH|RL|Mux)?$")>;
    189 def : InstRW<[LSULatency, LSULatency, LSU, NormalGr], (instregex "LCBB$")>;
    190 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LG(RL)?$")>;
    191 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L128$")>;
    192 
    193 def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLIH(F|H|L)$")>;
    194 def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLIL(F|H|L)$")>;
    195 
    196 def : InstRW<[WLat1, FXa, NormalGr], (instregex "LG(F|H)I$")>;
    197 def : InstRW<[WLat1, FXa, NormalGr], (instregex "LHI(Mux)?$")>;
    198 def : InstRW<[WLat1, FXa, NormalGr], (instregex "LR(Mux)?$")>;
    199 
    200 // Load and zero rightmost byte
    201 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LZR(F|G)$")>;
    202 
    203 // Load and trap
    204 def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "L(FH|G)?AT$")>;
    205 
    206 // Load and test
    207 def : InstRW<[WLat1LSU, WLat1LSU, LSU, FXa, NormalGr], (instregex "LT(G)?$")>;
    208 def : InstRW<[WLat1, FXa, NormalGr], (instregex "LT(G)?R$")>;
    209 
    210 // Stores
    211 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STG(RL)?$")>;
    212 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "ST128$")>;
    213 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "ST(Y|FH|RL|Mux)?$")>;
    214 
    215 // String moves.
    216 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "MVST$")>;
    217 
    218 //===----------------------------------------------------------------------===//
    219 // Conditional move instructions
    220 //===----------------------------------------------------------------------===//
    221 
    222 def : InstRW<[WLat2, FXa, NormalGr], (instregex "LOCRMux$")>;
    223 def : InstRW<[WLat2, FXa, NormalGr], (instregex "LOC(G|FH)?R(Asm.*)?$")>;
    224 def : InstRW<[WLat2, FXa, NormalGr], (instregex "LOC(G|H)?HI(Mux|(Asm.*))?$")>;
    225 def : InstRW<[WLat2LSU, RegReadAdv, FXa, LSU, NormalGr],
    226              (instregex "LOC(G|FH|Mux)?(Asm.*)?$")>;
    227 def : InstRW<[WLat1, FXb, LSU, NormalGr],
    228              (instregex "STOC(G|FH|Mux)?(Asm.*)?$")>;
    229 
    230 //===----------------------------------------------------------------------===//
    231 // Sign extensions
    232 //===----------------------------------------------------------------------===//
    233 
    234 def : InstRW<[WLat1, FXa, NormalGr], (instregex "L(B|H|G)R$")>;
    235 def : InstRW<[WLat1, FXa, NormalGr], (instregex "LG(B|H|F)R$")>;
    236 
    237 def : InstRW<[WLat1LSU, WLat1LSU, FXa, LSU, NormalGr], (instregex "LTGF$")>;
    238 def : InstRW<[WLat1, FXa, NormalGr], (instregex "LTGFR$")>;
    239 
    240 def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LB(H|Mux)?$")>;
    241 def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LH(Y)?$")>;
    242 def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LH(H|Mux|RL)$")>;
    243 def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LG(B|H|F)$")>;
    244 def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LG(H|F)RL$")>;
    245 
    246 //===----------------------------------------------------------------------===//
    247 // Zero extensions
    248 //===----------------------------------------------------------------------===//
    249 
    250 def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLCR(Mux)?$")>;
    251 def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLHR(Mux)?$")>;
    252 def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLG(C|H|F|T)R$")>;
    253 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLC(Mux)?$")>;
    254 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLH(Mux)?$")>;
    255 def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LL(C|H)H$")>;
    256 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLHRL$")>;
    257 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLG(C|H|F|T|HRL|FRL)$")>;
    258 
    259 // Load and zero rightmost byte
    260 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLZRGF$")>;
    261 
    262 // Load and trap
    263 def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "LLG(F|T)?AT$")>;
    264 
    265 //===----------------------------------------------------------------------===//
    266 // Truncations
    267 //===----------------------------------------------------------------------===//
    268 
    269 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STC(H|Y|Mux)?$")>;
    270 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STH(H|Y|RL|Mux)?$")>;
    271 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STCM(H|Y)?$")>;
    272 
    273 //===----------------------------------------------------------------------===//
    274 // Multi-register moves
    275 //===----------------------------------------------------------------------===//
    276 
    277 // Load multiple (estimated average of 5 ops)
    278 def : InstRW<[WLat10, WLat10, LSU5, GroupAlone], (instregex "LM(H|Y|G)?$")>;
    279 
    280 // Load multiple disjoint
    281 def : InstRW<[WLat30, WLat30, MCD], (instregex "LMD$")>;
    282 
    283 // Store multiple
    284 def : InstRW<[WLat1, LSU2, FXb3, GroupAlone], (instregex "STM(G|H|Y)?$")>;
    285 
    286 //===----------------------------------------------------------------------===//
    287 // Byte swaps
    288 //===----------------------------------------------------------------------===//
    289 
    290 def : InstRW<[WLat1, FXa, NormalGr], (instregex "LRV(G)?R$")>;
    291 def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LRV(G|H)?$")>;
    292 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STRV(G|H)?$")>;
    293 def : InstRW<[WLat30, MCD], (instregex "MVCIN$")>;
    294 
    295 //===----------------------------------------------------------------------===//
    296 // Load address instructions
    297 //===----------------------------------------------------------------------===//
    298 
    299 def : InstRW<[WLat1, FXa, NormalGr], (instregex "LA(Y|RL)?$")>;
    300 
    301 // Load the Global Offset Table address ( -> larl )
    302 def : InstRW<[WLat1, FXa, NormalGr], (instregex "GOT$")>;
    303 
    304 //===----------------------------------------------------------------------===//
    305 // Absolute and Negation
    306 //===----------------------------------------------------------------------===//
    307 
    308 def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "LP(G)?R$")>;
    309 def : InstRW<[WLat3, WLat3, FXa2, Cracked], (instregex "L(N|P)GFR$")>;
    310 def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "LN(R|GR)$")>;
    311 def : InstRW<[WLat1, FXa, NormalGr], (instregex "LC(R|GR)$")>;
    312 def : InstRW<[WLat2, WLat2, FXa2, Cracked], (instregex "LCGFR$")>;
    313 
    314 //===----------------------------------------------------------------------===//
    315 // Insertion
    316 //===----------------------------------------------------------------------===//
    317 
    318 def : InstRW<[WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], (instregex "IC(Y)?$")>;
    319 def : InstRW<[WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
    320              (instregex "IC32(Y)?$")>;
    321 def : InstRW<[WLat1LSU, RegReadAdv, WLat1LSU, FXa, LSU, NormalGr],
    322              (instregex "ICM(H|Y)?$")>;
    323 def : InstRW<[WLat1, FXa, NormalGr], (instregex "II(F|H|L)Mux$")>;
    324 def : InstRW<[WLat1, FXa, NormalGr], (instregex "IIHF(64)?$")>;
    325 def : InstRW<[WLat1, FXa, NormalGr], (instregex "IIHH(64)?$")>;
    326 def : InstRW<[WLat1, FXa, NormalGr], (instregex "IIHL(64)?$")>;
    327 def : InstRW<[WLat1, FXa, NormalGr], (instregex "IILF(64)?$")>;
    328 def : InstRW<[WLat1, FXa, NormalGr], (instregex "IILH(64)?$")>;
    329 def : InstRW<[WLat1, FXa, NormalGr], (instregex "IILL(64)?$")>;
    330 
    331 //===----------------------------------------------------------------------===//
    332 // Addition
    333 //===----------------------------------------------------------------------===//
    334 
    335 def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
    336              (instregex "A(Y)?$")>;
    337 def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr],
    338              (instregex "AH(Y)?$")>;
    339 def : InstRW<[WLat1, FXa, NormalGr], (instregex "AIH$")>;
    340 def : InstRW<[WLat1, FXa, NormalGr], (instregex "AFI(Mux)?$")>;
    341 def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
    342              (instregex "AG$")>;
    343 def : InstRW<[WLat1, FXa, NormalGr], (instregex "AGFI$")>;
    344 def : InstRW<[WLat1, FXa, NormalGr], (instregex "AGHI(K)?$")>;
    345 def : InstRW<[WLat1, FXa, NormalGr], (instregex "AGR(K)?$")>;
    346 def : InstRW<[WLat1, FXa, NormalGr], (instregex "AHI(K)?$")>;
    347 def : InstRW<[WLat1, FXa, NormalGr], (instregex "AHIMux(K)?$")>;
    348 def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
    349              (instregex "AL(Y)?$")>;
    350 def : InstRW<[WLat1, FXa, NormalGr], (instregex "AL(FI|HSIK)$")>;
    351 def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
    352              (instregex "ALG(F)?$")>;
    353 def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALGHSIK$")>;
    354 def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALGF(I|R)$")>;
    355 def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALGR(K)?$")>;
    356 def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALR(K)?$")>;
    357 def : InstRW<[WLat1, FXa, NormalGr], (instregex "AR(K)?$")>;
    358 def : InstRW<[WLat1, FXa, NormalGr], (instregex "A(L)?HHHR$")>;
    359 def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "A(L)?HHLR$")>;
    360 def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALSIH(N)?$")>;
    361 def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "A(L)?(G)?SI$")>;
    362 
    363 // Logical addition with carry
    364 def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, GroupAlone],
    365              (instregex "ALC(G)?$")>;
    366 def : InstRW<[WLat2, WLat2, FXa, GroupAlone], (instregex "ALC(G)?R$")>;
    367 
    368 // Add with sign extension (32 -> 64)
    369 def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr],
    370              (instregex "AGF$")>;
    371 def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "AGFR$")>;
    372 
    373 //===----------------------------------------------------------------------===//
    374 // Subtraction
    375 //===----------------------------------------------------------------------===//
    376 
    377 def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
    378              (instregex "S(G|Y)?$")>;
    379 def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr],
    380              (instregex "SH(Y)?$")>;
    381 def : InstRW<[WLat1, FXa, NormalGr], (instregex "SGR(K)?$")>;
    382 def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLFI$")>;
    383 def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
    384              (instregex "SL(G|GF|Y)?$")>;
    385 def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLGF(I|R)$")>;
    386 def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLGR(K)?$")>;
    387 def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLR(K)?$")>;
    388 def : InstRW<[WLat1, FXa, NormalGr], (instregex "SR(K)?$")>;
    389 def : InstRW<[WLat1, FXa, NormalGr], (instregex "S(L)?HHHR$")>;
    390 def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "S(L)?HHLR$")>;
    391 
    392 // Subtraction with borrow
    393 def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, GroupAlone],
    394              (instregex "SLB(G)?$")>;
    395 def : InstRW<[WLat2, WLat2, FXa, GroupAlone], (instregex "SLB(G)?R$")>;
    396 
    397 // Subtraction with sign extension (32 -> 64)
    398 def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr],
    399              (instregex "SGF$")>;
    400 def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "SGFR$")>;
    401 
    402 //===----------------------------------------------------------------------===//
    403 // AND
    404 //===----------------------------------------------------------------------===//
    405 
    406 def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
    407              (instregex "N(G|Y)?$")>;
    408 def : InstRW<[WLat1, FXa, NormalGr], (instregex "NGR(K)?$")>;
    409 def : InstRW<[WLat1, FXa, NormalGr], (instregex "NI(FMux|HMux|LMux)$")>;
    410 def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "NI(Y)?$")>;
    411 def : InstRW<[WLat1, FXa, NormalGr], (instregex "NIHF(64)?$")>;
    412 def : InstRW<[WLat1, FXa, NormalGr], (instregex "NIHH(64)?$")>;
    413 def : InstRW<[WLat1, FXa, NormalGr], (instregex "NIHL(64)?$")>;
    414 def : InstRW<[WLat1, FXa, NormalGr], (instregex "NILF(64)?$")>;
    415 def : InstRW<[WLat1, FXa, NormalGr], (instregex "NILH(64)?$")>;
    416 def : InstRW<[WLat1, FXa, NormalGr], (instregex "NILL(64)?$")>;
    417 def : InstRW<[WLat1, FXa, NormalGr], (instregex "NR(K)?$")>;
    418 def : InstRW<[WLat3LSU, LSU2, FXb, Cracked], (instregex "NC$")>;
    419 
    420 //===----------------------------------------------------------------------===//
    421 // OR
    422 //===----------------------------------------------------------------------===//
    423 
    424 def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
    425              (instregex "O(G|Y)?$")>;
    426 def : InstRW<[WLat1, FXa, NormalGr], (instregex "OGR(K)?$")>;
    427 def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "OI(Y)?$")>;
    428 def : InstRW<[WLat1, FXa, NormalGr], (instregex "OI(FMux|HMux|LMux)$")>;
    429 def : InstRW<[WLat1, FXa, NormalGr], (instregex "OIHF(64)?$")>;
    430 def : InstRW<[WLat1, FXa, NormalGr], (instregex "OIHH(64)?$")>;
    431 def : InstRW<[WLat1, FXa, NormalGr], (instregex "OIHL(64)?$")>;
    432 def : InstRW<[WLat1, FXa, NormalGr], (instregex "OILF(64)?$")>;
    433 def : InstRW<[WLat1, FXa, NormalGr], (instregex "OILH(64)?$")>;
    434 def : InstRW<[WLat1, FXa, NormalGr], (instregex "OILL(64)?$")>;
    435 def : InstRW<[WLat1, FXa, NormalGr], (instregex "OR(K)?$")>;
    436 def : InstRW<[WLat3LSU, LSU2, FXb, Cracked], (instregex "OC$")>;
    437 
    438 //===----------------------------------------------------------------------===//
    439 // XOR
    440 //===----------------------------------------------------------------------===//
    441 
    442 def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr],
    443              (instregex "X(G|Y)?$")>;
    444 def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "XI(Y)?$")>;
    445 def : InstRW<[WLat1, FXa, NormalGr], (instregex "XIFMux$")>;
    446 def : InstRW<[WLat1, FXa, NormalGr], (instregex "XGR(K)?$")>;
    447 def : InstRW<[WLat1, FXa, NormalGr], (instregex "XIHF(64)?$")>;
    448 def : InstRW<[WLat1, FXa, NormalGr], (instregex "XILF(64)?$")>;
    449 def : InstRW<[WLat1, FXa, NormalGr], (instregex "XR(K)?$")>;
    450 def : InstRW<[WLat3LSU, LSU2, FXb, Cracked], (instregex "XC$")>;
    451 
    452 //===----------------------------------------------------------------------===//
    453 // Multiplication
    454 //===----------------------------------------------------------------------===//
    455 
    456 def : InstRW<[WLat6LSU, RegReadAdv, FXa, LSU, NormalGr],
    457              (instregex "MS(GF|Y)?$")>;
    458 def : InstRW<[WLat6, FXa, NormalGr], (instregex "MS(R|FI)$")>;
    459 def : InstRW<[WLat8LSU, RegReadAdv, FXa, LSU, NormalGr], (instregex "MSG$")>;
    460 def : InstRW<[WLat8, FXa, NormalGr], (instregex "MSGR$")>;
    461 def : InstRW<[WLat6, FXa, NormalGr], (instregex "MSGF(I|R)$")>;
    462 def : InstRW<[WLat11LSU, RegReadAdv, FXa2, LSU, GroupAlone],
    463              (instregex "MLG$")>;
    464 def : InstRW<[WLat9, FXa2, GroupAlone], (instregex "MLGR$")>;
    465 def : InstRW<[WLat5, FXa, NormalGr], (instregex "MGHI$")>;
    466 def : InstRW<[WLat5, FXa, NormalGr], (instregex "MHI$")>;
    467 def : InstRW<[WLat5LSU, RegReadAdv, FXa, LSU, NormalGr], (instregex "MH(Y)?$")>;
    468 def : InstRW<[WLat7, FXa2, GroupAlone], (instregex "M(L)?R$")>;
    469 def : InstRW<[WLat7LSU, RegReadAdv, FXa2, LSU, GroupAlone],
    470              (instregex "M(FY|L)?$")>;
    471 
    472 //===----------------------------------------------------------------------===//
    473 // Division and remainder
    474 //===----------------------------------------------------------------------===//
    475 
    476 def : InstRW<[WLat20, FXa4, GroupAlone], (instregex "DR$")>;
    477 def : InstRW<[WLat30, RegReadAdv, FXa4, LSU, GroupAlone], (instregex "D$")>;
    478 def : InstRW<[WLat30, FXa2, GroupAlone], (instregex "DSG(F)?R$")>;
    479 def : InstRW<[WLat30, RegReadAdv, FXa2, LSU, GroupAlone],
    480              (instregex "DSG(F)?$")>;
    481 def : InstRW<[WLat20, FXa4, GroupAlone], (instregex "DLR$")>;
    482 def : InstRW<[WLat30, FXa4, GroupAlone], (instregex "DLGR$")>;
    483 def : InstRW<[WLat30, RegReadAdv, FXa4, LSU, GroupAlone], (instregex "DL(G)?$")>;
    484 
    485 //===----------------------------------------------------------------------===//
    486 // Shifts
    487 //===----------------------------------------------------------------------===//
    488 
    489 def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLL(G|K)?$")>;
    490 def : InstRW<[WLat1, FXa, NormalGr], (instregex "SRL(G|K)?$")>;
    491 def : InstRW<[WLat1, FXa, NormalGr], (instregex "SRA(G|K)?$")>;
    492 def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLA(G|K)?$")>;
    493 def : InstRW<[WLat5LSU, WLat5LSU, FXa4, LSU, GroupAlone],
    494              (instregex "S(L|R)D(A|L)$")>;
    495 
    496 // Rotate
    497 def : InstRW<[WLat2LSU, FXa, LSU, NormalGr], (instregex "RLL(G)?$")>;
    498 
    499 // Rotate and insert
    500 def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBG(N|32)?$")>;
    501 def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBH(G|H|L)$")>;
    502 def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBL(G|H|L)$")>;
    503 def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBMux$")>;
    504 
    505 // Rotate and Select
    506 def : InstRW<[WLat3, WLat3, FXa2, Cracked], (instregex "R(N|O|X)SBG$")>;
    507 
    508 //===----------------------------------------------------------------------===//
    509 // Comparison
    510 //===----------------------------------------------------------------------===//
    511 
    512 def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr],
    513              (instregex "C(G|Y|Mux)?$")>;
    514 def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CRL$")>;
    515 def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(F|H)I(Mux)?$")>;
    516 def : InstRW<[WLat1, FXb, NormalGr], (instregex "CG(F|H)I$")>;
    517 def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CG(HSI|RL)$")>;
    518 def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(G)?R$")>;
    519 def : InstRW<[WLat1, FXb, NormalGr], (instregex "CIH$")>;
    520 def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CHF$")>;
    521 def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CHSI$")>;
    522 def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr],
    523              (instregex "CL(Y|Mux)?$")>;
    524 def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLFHSI$")>;
    525 def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLFI(Mux)?$")>;
    526 def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CLG$")>;
    527 def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLG(HRL|HSI)$")>;
    528 def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CLGF$")>;
    529 def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLGFRL$")>;
    530 def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLGF(I|R)$")>;
    531 def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLGR$")>;
    532 def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLGRL$")>;
    533 def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CLHF$")>;
    534 def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLH(RL|HSI)$")>;
    535 def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLIH$")>;
    536 def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLI(Y)?$")>;
    537 def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLR$")>;
    538 def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLRL$")>;
    539 def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(L)?HHR$")>;
    540 def : InstRW<[WLat2, FXb, NormalGr], (instregex "C(L)?HLR$")>;
    541 
    542 // Compare halfword
    543 def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CH(Y)?$")>;
    544 def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "CHRL$")>;
    545 def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CGH$")>;
    546 def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "CGHRL$")>;
    547 def : InstRW<[WLat2LSU, FXa, FXb, LSU, Cracked], (instregex "CHHSI$")>;
    548 
    549 // Compare with sign extension (32 -> 64)
    550 def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CGF$")>;
    551 def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "CGFRL$")>;
    552 def : InstRW<[WLat2, FXb, NormalGr], (instregex "CGFR$")>;
    553 
    554 // Compare logical character
    555 def : InstRW<[WLat6, FXb, LSU2, Cracked], (instregex "CLC$")>;
    556 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CLCL(E|U)?$")>;
    557 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CLST$")>;
    558 
    559 // Test under mask
    560 def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "TM(Y)?$")>;
    561 def : InstRW<[WLat1, FXb, NormalGr], (instregex "TM(H|L)Mux$")>;
    562 def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMHH(64)?$")>;
    563 def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMHL(64)?$")>;
    564 def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMLH(64)?$")>;
    565 def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMLL(64)?$")>;
    566 
    567 // Compare logical characters under mask
    568 def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr],
    569              (instregex "CLM(H|Y)?$")>;
    570 
    571 //===----------------------------------------------------------------------===//
    572 // Prefetch and execution hint
    573 //===----------------------------------------------------------------------===//
    574 
    575 def : InstRW<[WLat1, LSU, NormalGr], (instregex "PFD(RL)?$")>;
    576 def : InstRW<[WLat1, FXb, NormalGr], (instregex "BPP$")>;
    577 def : InstRW<[FXb, EndGroup], (instregex "BPRP$")>;
    578 def : InstRW<[WLat1, FXb, NormalGr], (instregex "NIAI$")>;
    579 
    580 //===----------------------------------------------------------------------===//
    581 // Atomic operations
    582 //===----------------------------------------------------------------------===//
    583 
    584 def : InstRW<[WLat1, FXb, EndGroup], (instregex "Serialize$")>;
    585 
    586 def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAA(G)?$")>;
    587 def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAAL(G)?$")>;
    588 def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAN(G)?$")>;
    589 def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAO(G)?$")>;
    590 def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAX(G)?$")>;
    591 
    592 // Test and set
    593 def : InstRW<[WLat2LSU, FXb, LSU, EndGroup], (instregex "TS$")>;
    594 
    595 // Compare and swap
    596 def : InstRW<[WLat3LSU, WLat3LSU, FXa, FXb, LSU, GroupAlone],
    597              (instregex "CS(G|Y)?$")>;
    598 
    599 // Compare double and swap
    600 def : InstRW<[WLat6LSU, WLat6LSU, FXa3, FXb2, LSU, GroupAlone],
    601              (instregex "CDS(Y)?$")>;
    602 def : InstRW<[WLat15, WLat15, FXa2, FXb4, LSU3, GroupAlone],
    603              (instregex "CDSG$")>;
    604 
    605 // Compare and swap and store
    606 def : InstRW<[WLat30, MCD], (instregex "CSST$")>;
    607 
    608 // Perform locked operation
    609 def : InstRW<[WLat30, MCD], (instregex "PLO$")>;
    610 
    611 // Load/store pair from/to quadword
    612 def : InstRW<[WLat4LSU, LSU2, GroupAlone], (instregex "LPQ$")>;
    613 def : InstRW<[WLat1, FXb2, LSU, GroupAlone], (instregex "STPQ$")>;
    614 
    615 // Load pair disjoint
    616 def : InstRW<[WLat1LSU, WLat1LSU, LSU2, GroupAlone], (instregex "LPD(G)?$")>;
    617 
    618 //===----------------------------------------------------------------------===//
    619 // Translate and convert
    620 //===----------------------------------------------------------------------===//
    621 
    622 def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "TR$")>;
    623 def : InstRW<[WLat30, WLat30, WLat30, FXa3, LSU2, GroupAlone],
    624              (instregex "TRT$")>;
    625 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TRTR$")>;
    626 def : InstRW<[WLat30, WLat30, MCD], (instregex "TRE$")>;
    627 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TRT(R)?E(Opt)?$")>;
    628 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TR(T|O)(T|O)(Opt)?$")>;
    629 def : InstRW<[WLat30, WLat30, WLat30, MCD],
    630              (instregex "CU(12|14|21|24|41|42)(Opt)?$")>;
    631 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "(CUUTF|CUTFU)(Opt)?$")>;
    632 
    633 //===----------------------------------------------------------------------===//
    634 // Message-security assist
    635 //===----------------------------------------------------------------------===//
    636 
    637 def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD],
    638              (instregex "KM(C|F|O|CTR)?$")>;
    639 def : InstRW<[WLat30, WLat30, WLat30, MCD],
    640              (instregex "(KIMD|KLMD|KMAC|PCC|PPNO)$")>;
    641 
    642 //===----------------------------------------------------------------------===//
    643 // Decimal arithmetic
    644 //===----------------------------------------------------------------------===//
    645 
    646 def : InstRW<[WLat30, RegReadAdv, FXb, VecDF2, LSU2, GroupAlone],
    647              (instregex "CVBG$")>;
    648 def : InstRW<[WLat30, RegReadAdv, FXb, VecDF, LSU, GroupAlone],
    649              (instregex "CVB(Y)?$")>;
    650 def : InstRW<[WLat1, FXb3, VecDF4, LSU, GroupAlone], (instregex "CVDG$")>;
    651 def : InstRW<[WLat1, FXb2, VecDF, LSU, GroupAlone], (instregex "CVD(Y)?$")>;
    652 def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "MV(N|O|Z)$")>;
    653 def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "(PACK|PKA|PKU)$")>;
    654 def : InstRW<[WLat12, LSU5, GroupAlone], (instregex "UNPK(A|U)$")>;
    655 def : InstRW<[WLat1, FXb, LSU2, Cracked], (instregex "UNPK$")>;
    656 
    657 def : InstRW<[WLat5LSU, FXb, VecDFX, LSU3, GroupAlone],
    658              (instregex "(A|S|ZA)P$")>;
    659 def : InstRW<[WLat1, FXb, VecDFX4, LSU3, GroupAlone], (instregex "(M|D)P$")>;
    660 def : InstRW<[WLat15, FXb, VecDFX2, LSU2, GroupAlone], (instregex "SRP$")>;
    661 def : InstRW<[WLat8, VecDFX, LSU, LSU, GroupAlone], (instregex "CP$")>;
    662 def : InstRW<[WLat3LSU, VecDFX, LSU, Cracked], (instregex "TP$")>;
    663 def : InstRW<[WLat30, MCD], (instregex "ED(MK)?$")>;
    664 
    665 //===----------------------------------------------------------------------===//
    666 // Access registers
    667 //===----------------------------------------------------------------------===//
    668 
    669 // Extract/set/copy access register
    670 def : InstRW<[WLat3, LSU, NormalGr], (instregex "(EAR|SAR|CPYA)$")>;
    671 
    672 // Load address extended
    673 def : InstRW<[WLat5, LSU, FXa, Cracked], (instregex "LAE(Y)?$")>;
    674 
    675 // Load/store access multiple (not modeled precisely)
    676 def : InstRW<[WLat20, WLat20, LSU5, GroupAlone], (instregex "LAM(Y)?$")>;
    677 def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "STAM(Y)?$")>;
    678 
    679 //===----------------------------------------------------------------------===//
    680 // Program mask and addressing mode
    681 //===----------------------------------------------------------------------===//
    682 
    683 // Insert Program Mask
    684 def : InstRW<[WLat3, FXa, EndGroup], (instregex "IPM$")>;
    685 
    686 // Set Program Mask
    687 def : InstRW<[WLat3, LSU, EndGroup], (instregex "SPM$")>;
    688 
    689 // Branch and link
    690 def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "BAL(R)?$")>;
    691 
    692 // Test addressing mode
    693 def : InstRW<[WLat1, FXb, NormalGr], (instregex "TAM$")>;
    694 
    695 // Set addressing mode
    696 def : InstRW<[WLat1, FXb, EndGroup], (instregex "SAM(24|31|64)$")>;
    697 
    698 // Branch (and save) and set mode.
    699 def : InstRW<[WLat1, FXa, FXb, GroupAlone], (instregex "BSM$")>;
    700 def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "BASSM$")>;
    701 
    702 //===----------------------------------------------------------------------===//
    703 // Transactional execution
    704 //===----------------------------------------------------------------------===//
    705 
    706 // Transaction begin
    707 def : InstRW<[WLat9, LSU2, FXb5, GroupAlone], (instregex "TBEGIN(C)?$")>;
    708 
    709 // Transaction end
    710 def : InstRW<[WLat1, FXb, GroupAlone], (instregex "TEND$")>;
    711 
    712 // Transaction abort
    713 def : InstRW<[WLat30, MCD], (instregex "TABORT$")>;
    714 
    715 // Extract Transaction Nesting Depth
    716 def : InstRW<[WLat1, FXa, NormalGr], (instregex "ETND$")>;
    717 
    718 // Nontransactional store
    719 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "NTSTG$")>;
    720 
    721 //===----------------------------------------------------------------------===//
    722 // Processor assist
    723 //===----------------------------------------------------------------------===//
    724 
    725 def : InstRW<[WLat30, MCD], (instregex "PPA$")>;
    726 
    727 //===----------------------------------------------------------------------===//
    728 // Miscellaneous Instructions.
    729 //===----------------------------------------------------------------------===//
    730 
    731 // Find leftmost one
    732 def : InstRW<[WLat7, WLat7, FXa2, GroupAlone], (instregex "FLOGR$")>;
    733 
    734 // Population count
    735 def : InstRW<[WLat3, WLat3, FXa, NormalGr], (instregex "POPCNT$")>;
    736 
    737 // String instructions
    738 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "SRST(U)?$")>;
    739 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CUSE$")>;
    740 
    741 // Various complex instructions
    742 def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], (instregex "CFC$")>;
    743 def : InstRW<[WLat30, WLat30, WLat30, WLat30, WLat30, WLat30, MCD],
    744              (instregex "UPT$")>;
    745 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CKSM$")>;
    746 def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], (instregex "CMPSC$")>;
    747 
    748 // Execute
    749 def : InstRW<[WLat1, FXb, GroupAlone], (instregex "EX(RL)?$")>;
    750 
    751 //===----------------------------------------------------------------------===//
    752 // .insn directive instructions
    753 //===----------------------------------------------------------------------===//
    754 
    755 // An "empty" sched-class will be assigned instead of the "invalid sched-class".
    756 // getNumDecoderSlots() will then return 1 instead of 0.
    757 def : InstRW<[], (instregex "Insn.*")>;
    758 
    759 
    760 // ----------------------------- Floating point ----------------------------- //
    761 
    762 //===----------------------------------------------------------------------===//
    763 // FP: Move instructions
    764 //===----------------------------------------------------------------------===//
    765 
    766 // Load zero
    767 def : InstRW<[WLat1, FXb, NormalGr], (instregex "LZ(DR|ER)$")>;
    768 def : InstRW<[WLat2, FXb2, Cracked], (instregex "LZXR$")>;
    769 
    770 // Load
    771 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "LER$")>;
    772 def : InstRW<[WLat1, FXb, NormalGr], (instregex "LD(R|R32|GR)$")>;
    773 def : InstRW<[WLat3, FXb, NormalGr], (instregex "LGDR$")>;
    774 def : InstRW<[WLat2, FXb2, GroupAlone], (instregex "LXR$")>;
    775 
    776 // Load and Test
    777 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "LT(E|D)BR$")>;
    778 def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "LT(E|D)BRCompare$")>;
    779 def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone],
    780              (instregex "LTXBR(Compare)?$")>;
    781 
    782 // Copy sign
    783 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "CPSDR(d|s)(d|s)$")>;
    784 
    785 //===----------------------------------------------------------------------===//
    786 // FP: Load instructions
    787 //===----------------------------------------------------------------------===//
    788 
    789 def : InstRW<[WLat2LSU, VecXsPm, LSU, NormalGr], (instregex "LE(Y)?$")>;
    790 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LD(Y|E32)?$")>;
    791 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LX$")>;
    792 
    793 //===----------------------------------------------------------------------===//
    794 // FP: Store instructions
    795 //===----------------------------------------------------------------------===//
    796 
    797 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "ST(E|D)(Y)?$")>;
    798 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STX$")>;
    799 
    800 //===----------------------------------------------------------------------===//
    801 // FP: Conversion instructions
    802 //===----------------------------------------------------------------------===//
    803 
    804 // Load rounded
    805 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "LEDBR(A)?$")>;
    806 def : InstRW<[WLat9, VecDF2, NormalGr], (instregex "L(E|D)XBR(A)?$")>;
    807 
    808 // Load lengthened
    809 def : InstRW<[WLat7LSU, VecBF, LSU, NormalGr], (instregex "LDEB$")>;
    810 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "LDEBR$")>;
    811 def : InstRW<[WLat8LSU, VecBF4, LSU, GroupAlone], (instregex "LX(E|D)B$")>;
    812 def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "LX(E|D)BR$")>;
    813 
    814 // Convert from fixed / logical
    815 def : InstRW<[WLat8, FXb, VecBF, Cracked], (instregex "C(E|D)(F|G)BR(A)?$")>;
    816 def : InstRW<[WLat11, FXb, VecDF4, GroupAlone], (instregex "CX(F|G)BR(A)?$")>;
    817 def : InstRW<[WLat8, FXb, VecBF, Cracked], (instregex "C(E|D)L(F|G)BR$")>;
    818 def : InstRW<[WLat11, FXb, VecDF4, GroupAlone], (instregex "CXL(F|G)BR$")>;
    819 
    820 // Convert to fixed / logical
    821 def : InstRW<[WLat10, WLat10, FXb, VecBF, Cracked],
    822              (instregex "C(F|G)(E|D)BR(A)?$")>;
    823 def : InstRW<[WLat12, WLat12, FXb, VecDF2, Cracked],
    824              (instregex "C(F|G)XBR(A)?$")>;
    825 def : InstRW<[WLat10, WLat10, FXb, VecBF, GroupAlone], (instregex "CLFEBR$")>;
    826 def : InstRW<[WLat10, WLat10, FXb, VecBF, Cracked], (instregex "CLFDBR$")>;
    827 def : InstRW<[WLat10, WLat10, FXb, VecBF, Cracked], (instregex "CLG(E|D)BR$")>;
    828 def : InstRW<[WLat12, WLat12, FXb, VecDF2, Cracked], (instregex "CL(F|G)XBR$")>;
    829 
    830 //===----------------------------------------------------------------------===//
    831 // FP: Unary arithmetic
    832 //===----------------------------------------------------------------------===//
    833 
    834 // Load Complement / Negative / Positive
    835 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "L(C|N|P)(E|D)BR$")>;
    836 def : InstRW<[WLat1, FXb, NormalGr], (instregex "L(C|N|P)DFR(_32)?$")>;
    837 def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "L(C|N|P)XBR$")>;
    838 
    839 // Square root
    840 def : InstRW<[WLat30, VecFPd, LSU, NormalGr], (instregex "SQ(E|D)B$")>;
    841 def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "SQ(E|D)BR$")>;
    842 def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "SQXBR$")>;
    843 
    844 // Load FP integer
    845 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "FI(E|D)BR(A)?$")>;
    846 def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "FIXBR(A)?$")>;
    847 
    848 //===----------------------------------------------------------------------===//
    849 // FP: Binary arithmetic
    850 //===----------------------------------------------------------------------===//
    851 
    852 // Addition
    853 def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr],
    854              (instregex "A(E|D)B$")>;
    855 def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "A(E|D)BR$")>;
    856 def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "AXBR$")>;
    857 
    858 // Subtraction
    859 def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr],
    860              (instregex "S(E|D)B$")>;
    861 def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "S(E|D)BR$")>;
    862 def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "SXBR$")>;
    863 
    864 // Multiply
    865 def : InstRW<[WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr],
    866              (instregex "M(D|DE|EE)B$")>;
    867 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "M(D|DE|EE)BR$")>;
    868 def : InstRW<[WLat8LSU, RegReadAdv, VecBF4, LSU, GroupAlone],
    869              (instregex "MXDB$")>;
    870 def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "MXDBR$")>;
    871 def : InstRW<[WLat20, VecDF4, GroupAlone], (instregex "MXBR$")>;
    872 
    873 // Multiply and add / subtract
    874 def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone],
    875              (instregex "M(A|S)EB$")>;
    876 def : InstRW<[WLat7, VecBF, GroupAlone], (instregex "M(A|S)EBR$")>;
    877 def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone],
    878              (instregex "M(A|S)DB$")>;
    879 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "M(A|S)DBR$")>;
    880 
    881 // Division
    882 def : InstRW<[WLat30, RegReadAdv, VecFPd, LSU, NormalGr],
    883              (instregex "D(E|D)B$")>;
    884 def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "D(E|D)BR$")>;
    885 def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "DXBR$")>;
    886 
    887 // Divide to integer
    888 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "DI(E|D)BR$")>;
    889 
    890 //===----------------------------------------------------------------------===//
    891 // FP: Comparisons
    892 //===----------------------------------------------------------------------===//
    893 
    894 // Compare
    895 def : InstRW<[WLat3LSU, RegReadAdv, VecXsPm, LSU, NormalGr],
    896              (instregex "(K|C)(E|D)B$")>;
    897 def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "(K|C)(E|D)BR$")>;
    898 def : InstRW<[WLat9, VecDF2, GroupAlone], (instregex "(K|C)XBR$")>;
    899 
    900 // Test Data Class
    901 def : InstRW<[WLat5, LSU, VecXsPm, NormalGr], (instregex "TC(E|D)B$")>;
    902 def : InstRW<[WLat10, LSU2, VecDF4, GroupAlone], (instregex "TCXB$")>;
    903 
    904 //===----------------------------------------------------------------------===//
    905 // FP: Floating-point control register instructions
    906 //===----------------------------------------------------------------------===//
    907 
    908 def : InstRW<[WLat4, FXa, LSU, GroupAlone], (instregex "EFPC$")>;
    909 def : InstRW<[WLat1, FXb, LSU, GroupAlone], (instregex "STFPC$")>;
    910 def : InstRW<[WLat3, LSU, GroupAlone], (instregex "SFPC$")>;
    911 def : InstRW<[WLat3LSU, LSU2, GroupAlone], (instregex "LFPC$")>;
    912 def : InstRW<[WLat30, MCD], (instregex "SFASR$")>;
    913 def : InstRW<[WLat30, MCD], (instregex "LFAS$")>;
    914 def : InstRW<[WLat3, FXb, GroupAlone], (instregex "SRNM(B|T)?$")>;
    915 
    916 
    917 // --------------------- Hexadecimal floating point ------------------------- //
    918 
    919 //===----------------------------------------------------------------------===//
    920 // HFP: Move instructions
    921 //===----------------------------------------------------------------------===//
    922 
    923 // Load and Test
    924 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "LT(E|D)R$")>;
    925 def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "LTXR$")>;
    926 
    927 //===----------------------------------------------------------------------===//
    928 // HFP: Conversion instructions
    929 //===----------------------------------------------------------------------===//
    930 
    931 // Load rounded
    932 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "(LEDR|LRER)$")>;
    933 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "LEXR$")>;
    934 def : InstRW<[WLat9, VecDF2, NormalGr], (instregex "(LDXR|LRDR)$")>;
    935 
    936 // Load lengthened
    937 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LDE$")>;
    938 def : InstRW<[WLat1, FXb, NormalGr], (instregex "LDER$")>;
    939 def : InstRW<[WLat8LSU, VecBF4, LSU, GroupAlone], (instregex "LX(E|D)$")>;
    940 def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "LX(E|D)R$")>;
    941 
    942 // Convert from fixed
    943 def : InstRW<[WLat8, FXb, VecBF, Cracked], (instregex "C(E|D)(F|G)R$")>;
    944 def : InstRW<[WLat11, FXb, VecDF4, GroupAlone], (instregex "CX(F|G)R$")>;
    945 
    946 // Convert to fixed
    947 def : InstRW<[WLat10, WLat10, FXb, VecBF, Cracked], (instregex "C(F|G)(E|D)R$")>;
    948 def : InstRW<[WLat12, WLat12, FXb, VecDF2, Cracked], (instregex "C(F|G)XR$")>;
    949 
    950 // Convert BFP to HFP / HFP to BFP.
    951 def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "THD(E)?R$")>;
    952 def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "TB(E)?DR$")>;
    953 
    954 //===----------------------------------------------------------------------===//
    955 // HFP: Unary arithmetic
    956 //===----------------------------------------------------------------------===//
    957 
    958 // Load Complement / Negative / Positive
    959 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "L(C|N|P)(E|D)R$")>;
    960 def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "L(C|N|P)XR$")>;
    961 
    962 // Halve
    963 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "H(E|D)R$")>;
    964 
    965 // Square root
    966 def : InstRW<[WLat30, VecFPd, LSU, NormalGr], (instregex "SQ(E|D)$")>;
    967 def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "SQ(E|D)R$")>;
    968 def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "SQXR$")>;
    969 
    970 // Load FP integer
    971 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "FI(E|D)R$")>;
    972 def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "FIXR$")>;
    973 
    974 //===----------------------------------------------------------------------===//
    975 // HFP: Binary arithmetic
    976 //===----------------------------------------------------------------------===//
    977 
    978 // Addition
    979 def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr],
    980              (instregex "A(E|D|U|W)$")>;
    981 def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "A(E|D|U|W)R$")>;
    982 def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "AXR$")>;
    983 
    984 // Subtraction
    985 def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr],
    986              (instregex "S(E|D|U|W)$")>;
    987 def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "S(E|D|U|W)R$")>;
    988 def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "SXR$")>;
    989 
    990 // Multiply
    991 def : InstRW<[WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr],
    992              (instregex "M(D|DE|E|EE)$")>;
    993 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "M(D|DE|E|EE)R$")>;
    994 def : InstRW<[WLat8LSU, RegReadAdv, VecBF4, LSU, GroupAlone],
    995              (instregex "MXD$")>;
    996 def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "MXDR$")>;
    997 def : InstRW<[WLat30, VecDF4, GroupAlone], (instregex "MXR$")>;
    998 def : InstRW<[WLat8LSU, RegReadAdv, VecBF4, LSU, GroupAlone],
    999              (instregex "MY$")>;
   1000 def : InstRW<[WLat7LSU, RegReadAdv, VecBF2, LSU, GroupAlone],
   1001              (instregex "MY(H|L)$")>;
   1002 def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "MYR$")>;
   1003 def : InstRW<[WLat7, VecBF, GroupAlone], (instregex "MY(H|L)R$")>;
   1004 
   1005 // Multiply and add / subtract
   1006 def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone],
   1007              (instregex "M(A|S)(E|D)$")>;
   1008 def : InstRW<[WLat7, VecBF, GroupAlone], (instregex "M(A|S)(E|D)R$")>;
   1009 def : InstRW<[WLat8LSU, RegReadAdv, RegReadAdv, VecBF4, LSU, GroupAlone],
   1010              (instregex "MAY$")>;
   1011 def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone],
   1012              (instregex "MAY(H|L)$")>;
   1013 def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "MAYR$")>;
   1014 def : InstRW<[WLat7, VecBF, GroupAlone], (instregex "MAY(H|L)R$")>;
   1015 
   1016 // Division
   1017 def : InstRW<[WLat30, RegReadAdv, VecFPd, LSU, NormalGr],
   1018              (instregex "D(E|D)$")>;
   1019 def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "D(E|D)R$")>;
   1020 def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "DXR$")>;
   1021 
   1022 //===----------------------------------------------------------------------===//
   1023 // HFP: Comparisons
   1024 //===----------------------------------------------------------------------===//
   1025 
   1026 // Compare
   1027 def : InstRW<[WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr],
   1028              (instregex "C(E|D)$")>;
   1029 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "C(E|D)R$")>;
   1030 def : InstRW<[WLat10, VecDF2, GroupAlone], (instregex "CXR$")>;
   1031 
   1032 
   1033 // ------------------------ Decimal floating point -------------------------- //
   1034 
   1035 //===----------------------------------------------------------------------===//
   1036 // DFP: Move instructions
   1037 //===----------------------------------------------------------------------===//
   1038 
   1039 // Load and Test
   1040 def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "LTDTR$")>;
   1041 def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "LTXTR$")>;
   1042 
   1043 //===----------------------------------------------------------------------===//
   1044 // DFP: Conversion instructions
   1045 //===----------------------------------------------------------------------===//
   1046 
   1047 // Load rounded
   1048 def : InstRW<[WLat15, VecDF, NormalGr], (instregex "LEDTR$")>;
   1049 def : InstRW<[WLat15, VecDF2, NormalGr], (instregex "LDXTR$")>;
   1050 
   1051 // Load lengthened
   1052 def : InstRW<[WLat8, VecDF, NormalGr], (instregex "LDETR$")>;
   1053 def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "LXDTR$")>;
   1054 
   1055 // Convert from fixed / logical
   1056 def : InstRW<[WLat30, FXb, VecDF, Cracked], (instregex "CD(F|G)TR(A)?$")>;
   1057 def : InstRW<[WLat30, FXb, VecDF4, GroupAlone], (instregex "CX(F|G)TR(A)?$")>;
   1058 def : InstRW<[WLat30, FXb, VecDF, Cracked], (instregex "CDL(F|G)TR$")>;
   1059 def : InstRW<[WLat30, FXb, VecDF4, GroupAlone], (instregex "CXL(F|G)TR$")>;
   1060 
   1061 // Convert to fixed / logical
   1062 def : InstRW<[WLat30, WLat30, FXb, VecDF, Cracked],
   1063              (instregex "C(F|G)DTR(A)?$")>;
   1064 def : InstRW<[WLat30, WLat30, FXb, VecDF2, Cracked],
   1065              (instregex "C(F|G)XTR(A)?$")>;
   1066 def : InstRW<[WLat30, WLat30, FXb, VecDF, Cracked], (instregex "CL(F|G)DTR$")>;
   1067 def : InstRW<[WLat30, WLat30, FXb, VecDF2, Cracked], (instregex "CL(F|G)XTR$")>;
   1068 
   1069 // Convert from / to signed / unsigned packed
   1070 def : InstRW<[WLat9, FXb, VecDF, Cracked], (instregex "CD(S|U)TR$")>;
   1071 def : InstRW<[WLat12, FXb2, VecDF4, GroupAlone], (instregex "CX(S|U)TR$")>;
   1072 def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "C(S|U)DTR$")>;
   1073 def : InstRW<[WLat15, FXb2, VecDF4, GroupAlone], (instregex "C(S|U)XTR$")>;
   1074 
   1075 // Convert from / to zoned
   1076 def : InstRW<[WLat8LSU, LSU, VecDF, Cracked], (instregex "CDZT$")>;
   1077 def : InstRW<[WLat16LSU, LSU2, VecDF4, GroupAlone], (instregex "CXZT$")>;
   1078 def : InstRW<[WLat1, FXb, LSU, VecDF, Cracked], (instregex "CZDT$")>;
   1079 def : InstRW<[WLat1, FXb, LSU, VecDF2, GroupAlone], (instregex "CZXT$")>;
   1080 
   1081 // Convert from / to packed
   1082 def : InstRW<[WLat8LSU, LSU, VecDF, Cracked], (instregex "CDPT$")>;
   1083 def : InstRW<[WLat16LSU, LSU2, VecDF4, GroupAlone], (instregex "CXPT$")>;
   1084 def : InstRW<[WLat1, FXb, LSU, VecDF, Cracked], (instregex "CPDT$")>;
   1085 def : InstRW<[WLat1, FXb, LSU, VecDF2, GroupAlone], (instregex "CPXT$")>;
   1086 
   1087 // Perform floating-point operation
   1088 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "PFPO$")>;
   1089 
   1090 //===----------------------------------------------------------------------===//
   1091 // DFP: Unary arithmetic
   1092 //===----------------------------------------------------------------------===//
   1093 
   1094 // Load FP integer
   1095 def : InstRW<[WLat8, VecDF, NormalGr], (instregex "FIDTR$")>;
   1096 def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "FIXTR$")>;
   1097 
   1098 // Extract biased exponent
   1099 def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "EEDTR$")>;
   1100 def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "EEXTR$")>;
   1101 
   1102 // Extract significance
   1103 def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "ESDTR$")>;
   1104 def : InstRW<[WLat12, FXb, VecDF2, Cracked], (instregex "ESXTR$")>;
   1105 
   1106 //===----------------------------------------------------------------------===//
   1107 // DFP: Binary arithmetic
   1108 //===----------------------------------------------------------------------===//
   1109 
   1110 // Addition
   1111 def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "ADTR(A)?$")>;
   1112 def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "AXTR(A)?$")>;
   1113 
   1114 // Subtraction
   1115 def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "SDTR(A)?$")>;
   1116 def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "SXTR(A)?$")>;
   1117 
   1118 // Multiply
   1119 def : InstRW<[WLat30, VecDF, NormalGr], (instregex "MDTR(A)?$")>;
   1120 def : InstRW<[WLat30, VecDF4, GroupAlone], (instregex "MXTR(A)?$")>;
   1121 
   1122 // Division
   1123 def : InstRW<[WLat30, VecDF, NormalGr], (instregex "DDTR(A)?$")>;
   1124 def : InstRW<[WLat30, VecDF4, GroupAlone], (instregex "DXTR(A)?$")>;
   1125 
   1126 // Quantize
   1127 def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "QADTR$")>;
   1128 def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "QAXTR$")>;
   1129 
   1130 // Reround
   1131 def : InstRW<[WLat9, WLat9, FXb, VecDF, Cracked], (instregex "RRDTR$")>;
   1132 def : InstRW<[WLat11, WLat11, FXb, VecDF4, GroupAlone], (instregex "RRXTR$")>;
   1133 
   1134 // Shift significand left/right
   1135 def : InstRW<[WLat11LSU, LSU, VecDF, GroupAlone], (instregex "S(L|R)DT$")>;
   1136 def : InstRW<[WLat11LSU, LSU, VecDF4, GroupAlone], (instregex "S(L|R)XT$")>;
   1137 
   1138 // Insert biased exponent
   1139 def : InstRW<[WLat9, FXb, VecDF, Cracked], (instregex "IEDTR$")>;
   1140 def : InstRW<[WLat11, FXb, VecDF4, GroupAlone], (instregex "IEXTR$")>;
   1141 
   1142 //===----------------------------------------------------------------------===//
   1143 // DFP: Comparisons
   1144 //===----------------------------------------------------------------------===//
   1145 
   1146 // Compare
   1147 def : InstRW<[WLat8, VecDF, NormalGr], (instregex "(K|C)DTR$")>;
   1148 def : InstRW<[WLat9, VecDF2, GroupAlone], (instregex "(K|C)XTR$")>;
   1149 
   1150 // Compare biased exponent
   1151 def : InstRW<[WLat8, VecDF, NormalGr], (instregex "CEDTR$")>;
   1152 def : InstRW<[WLat8, VecDF, NormalGr], (instregex "CEXTR$")>;
   1153 
   1154 // Test Data Class/Group
   1155 def : InstRW<[WLat15, LSU, VecDF, NormalGr], (instregex "TD(C|G)(E|D)T$")>;
   1156 def : InstRW<[WLat15, LSU, VecDF2, GroupAlone], (instregex "TD(C|G)XT$")>;
   1157 
   1158 
   1159 // --------------------------------- Vector --------------------------------- //
   1160 
   1161 //===----------------------------------------------------------------------===//
   1162 // Vector: Move instructions
   1163 //===----------------------------------------------------------------------===//
   1164 
   1165 def : InstRW<[WLat1, FXb, NormalGr], (instregex "VLR(32|64)?$")>;
   1166 def : InstRW<[WLat4, FXb, NormalGr], (instregex "VLGV(B|F|G|H)?$")>;
   1167 def : InstRW<[WLat1, FXb, NormalGr], (instregex "VLVG(B|F|G|H)?$")>;
   1168 def : InstRW<[WLat3, FXb, NormalGr], (instregex "VLVGP(32)?$")>;
   1169 
   1170 //===----------------------------------------------------------------------===//
   1171 // Vector: Immediate instructions
   1172 //===----------------------------------------------------------------------===//
   1173 
   1174 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VZERO$")>;
   1175 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VONE$")>;
   1176 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VGBM$")>;
   1177 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VGM(B|F|G|H)?$")>;
   1178 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VREPI(B|F|G|H)?$")>;
   1179 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VLEI(B|F|G|H)$")>;
   1180 
   1181 //===----------------------------------------------------------------------===//
   1182 // Vector: Loads
   1183 //===----------------------------------------------------------------------===//
   1184 
   1185 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VL(BB)?$")>;
   1186 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLL$")>;
   1187 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VL(32|64)$")>;
   1188 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLLEZ(B|F|G|H)?$")>;
   1189 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLREP(B|F|G|H)?$")>;
   1190 def : InstRW<[WLat2LSU, RegReadAdv, VecXsPm, LSU, NormalGr],
   1191              (instregex "VLE(B|F|G|H)$")>;
   1192 def : InstRW<[WLat6LSU, RegReadAdv, FXb, LSU, VecXsPm, Cracked],
   1193              (instregex "VGE(F|G)$")>;
   1194 def : InstRW<[WLat4LSU, WLat4LSU, LSU5, GroupAlone], (instregex "VLM$")>;
   1195 
   1196 //===----------------------------------------------------------------------===//
   1197 // Vector: Stores
   1198 //===----------------------------------------------------------------------===//
   1199 
   1200 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VST(L|32|64)?$")>;
   1201 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VSTE(F|G)$")>;
   1202 def : InstRW<[WLat1, FXb, LSU, VecXsPm, Cracked], (instregex "VSTE(B|H)$")>;
   1203 def : InstRW<[WLat1, LSU2, FXb3, GroupAlone], (instregex "VSTM$")>;
   1204 def : InstRW<[WLat1, FXb2, LSU, Cracked], (instregex "VSCE(F|G)$")>;
   1205 
   1206 //===----------------------------------------------------------------------===//
   1207 // Vector: Selects and permutes
   1208 //===----------------------------------------------------------------------===//
   1209 
   1210 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMRH(B|F|G|H)?$")>;
   1211 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMRL(B|F|G|H)?$")>;
   1212 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPERM$")>;
   1213 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPDI$")>;
   1214 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VREP(B|F|G|H)?$")>;
   1215 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSEL$")>;
   1216 
   1217 //===----------------------------------------------------------------------===//
   1218 // Vector: Widening and narrowing
   1219 //===----------------------------------------------------------------------===//
   1220 
   1221 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPK(F|G|H)?$")>;
   1222 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPKS(F|G|H)?$")>;
   1223 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VPKS(F|G|H)S$")>;
   1224 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPKLS(F|G|H)?$")>;
   1225 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VPKLS(F|G|H)S$")>;
   1226 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSEG(B|F|H)?$")>;
   1227 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPH(B|F|H)?$")>;
   1228 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPL(B|F)?$")>;
   1229 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPLH(B|F|H|W)?$")>;
   1230 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPLL(B|F|H)?$")>;
   1231 
   1232 //===----------------------------------------------------------------------===//
   1233 // Vector: Integer arithmetic
   1234 //===----------------------------------------------------------------------===//
   1235 
   1236 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VA(B|F|G|H|Q|C|CQ)?$")>;
   1237 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VACC(B|F|G|H|Q|C|CQ)?$")>;
   1238 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VAVG(B|F|G|H)?$")>;
   1239 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VAVGL(B|F|G|H)?$")>;
   1240 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VN(C|O)?$")>;
   1241 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VO$")>;
   1242 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VCKSM$")>;
   1243 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCLZ(B|F|G|H)?$")>;
   1244 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCTZ(B|F|G|H)?$")>;
   1245 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VX$")>;
   1246 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VGFM?$")>;
   1247 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VGFMA(B|F|G|H)?$")>;
   1248 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VGFM(B|F|G|H)$")>;
   1249 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VLC(B|F|G|H)?$")>;
   1250 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VLP(B|F|G|H)?$")>;
   1251 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMX(B|F|G|H)?$")>;
   1252 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMXL(B|F|G|H)?$")>;
   1253 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMN(B|F|G|H)?$")>;
   1254 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMNL(B|F|G|H)?$")>;
   1255 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAL(B|F)?$")>;
   1256 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMALE(B|F|H)?$")>;
   1257 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMALH(B|F|H|W)?$")>;
   1258 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMALO(B|F|H)?$")>;
   1259 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAO(B|F|H)?$")>;
   1260 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAE(B|F|H)?$")>;
   1261 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAH(B|F|H)?$")>;
   1262 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VME(B|F|H)?$")>;
   1263 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMH(B|F|H)?$")>;
   1264 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VML(B|F)?$")>;
   1265 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMLE(B|F|H)?$")>;
   1266 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMLH(B|F|H|W)?$")>;
   1267 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMLO(B|F|H)?$")>;
   1268 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMO(B|F|H)?$")>;
   1269 
   1270 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPOPCT$")>;
   1271 
   1272 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VERLL(B|F|G|H)?$")>;
   1273 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VERLLV(B|F|G|H)?$")>;
   1274 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VERIM(B|F|G|H)?$")>;
   1275 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESL(B|F|G|H)?$")>;
   1276 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESLV(B|F|G|H)?$")>;
   1277 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRA(B|F|G|H)?$")>;
   1278 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRAV(B|F|G|H)?$")>;
   1279 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRL(B|F|G|H)?$")>;
   1280 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRLV(B|F|G|H)?$")>;
   1281 
   1282 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSL(DB)?$")>;
   1283 def : InstRW<[WLat3, VecXsPm2, NormalGr], (instregex "VSLB$")>;
   1284 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSR(A|L)$")>;
   1285 def : InstRW<[WLat3, VecXsPm2, NormalGr], (instregex "VSR(A|L)B$")>;
   1286 
   1287 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSB(I|IQ|CBI|CBIQ)?$")>;
   1288 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSCBI(B|F|G|H|Q)?$")>;
   1289 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VS(F|G|H|Q)?$")>;
   1290 
   1291 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VSUM(B|H)?$")>;
   1292 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VSUMG(F|H)?$")>;
   1293 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VSUMQ(F|G)?$")>;
   1294 
   1295 //===----------------------------------------------------------------------===//
   1296 // Vector: Integer comparison
   1297 //===----------------------------------------------------------------------===//
   1298 
   1299 def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "VEC(B|F|G|H)?$")>;
   1300 def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "VECL(B|F|G|H)?$")>;
   1301 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H)?$")>;
   1302 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H)S$")>;
   1303 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCH(B|F|G|H)?$")>;
   1304 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCH(B|F|G|H)S$")>;
   1305 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCHL(B|F|G|H)?$")>;
   1306 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCHL(B|F|G|H)S$")>;
   1307 def : InstRW<[WLat4, VecStr, NormalGr], (instregex "VTM$")>;
   1308 
   1309 //===----------------------------------------------------------------------===//
   1310 // Vector: Floating-point arithmetic
   1311 //===----------------------------------------------------------------------===//
   1312 
   1313 // Conversion and rounding
   1314 def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VCD(L)?G$")>;
   1315 def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VCD(L)?GB$")>;
   1316 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WCD(L)?GB$")>;
   1317 def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VC(L)?GD$")>;
   1318 def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VC(L)?GDB$")>;
   1319 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WC(L)?GDB$")>;
   1320 def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VL(DE|ED)$")>;
   1321 def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VL(DE|ED)B$")>;
   1322 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WL(DE|ED)B$")>;
   1323 def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFI$")>;
   1324 def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFIDB$")>;
   1325 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WFIDB$")>;
   1326 
   1327 // Sign operations
   1328 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VFPSO$")>;
   1329 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "(V|W)FPSODB$")>;
   1330 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "(V|W)FL(C|N|P)DB$")>;
   1331 
   1332 // Test data class
   1333 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VFTCI$")>;
   1334 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "(V|W)FTCIDB$")>;
   1335 
   1336 // Add / subtract
   1337 def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VF(A|S)$")>;
   1338 def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VF(A|S)DB$")>;
   1339 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WF(A|S)DB$")>;
   1340 
   1341 // Multiply / multiply-and-add/subtract
   1342 def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFM$")>;
   1343 def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFMDB$")>;
   1344 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WFMDB$")>;
   1345 def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFM(A|S)$")>;
   1346 def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFM(A|S)DB$")>;
   1347 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WFM(A|S)DB$")>;
   1348 
   1349 // Divide / square root
   1350 def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "VFD$")>;
   1351 def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "(V|W)FDDB$")>;
   1352 def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "VFSQ$")>;
   1353 def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "(V|W)FSQDB$")>;
   1354 
   1355 //===----------------------------------------------------------------------===//
   1356 // Vector: Floating-point comparison
   1357 //===----------------------------------------------------------------------===//
   1358 
   1359 def : InstRW<[WLat2, WLat2, VecXsPm, NormalGr], (instregex "VFC(E|H|HE)$")>;
   1360 def : InstRW<[WLat2, WLat2, VecXsPm, NormalGr], (instregex "VFC(E|H|HE)DB$")>;
   1361 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFC(E|H|HE)DB$")>;
   1362 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VFC(E|H|HE)DBS$")>;
   1363 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "WFC(E|H|HE)DBS$")>;
   1364 def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "WF(C|K)$")>;
   1365 def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "WF(C|K)DB$")>;
   1366 
   1367 //===----------------------------------------------------------------------===//
   1368 // Vector: Floating-point insertion and extraction
   1369 //===----------------------------------------------------------------------===//
   1370 
   1371 def : InstRW<[WLat1, FXb, NormalGr], (instregex "LEFR$")>;
   1372 def : InstRW<[WLat4, FXb, NormalGr], (instregex "LFER$")>;
   1373 
   1374 //===----------------------------------------------------------------------===//
   1375 // Vector: String instructions
   1376 //===----------------------------------------------------------------------===//
   1377 
   1378 def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFAE(B)?$")>;
   1379 def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFAE(F|H)$")>;
   1380 def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VFAE(B|F|H)S$")>;
   1381 def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFAEZ(B|F|H)$")>;
   1382 def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VFAEZ(B|F|H)S$")>;
   1383 def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFEE(B|F|H|ZB|ZF|ZH)?$")>;
   1384 def : InstRW<[WLat4, WLat4, VecStr, NormalGr],
   1385              (instregex "VFEE(B|F|H|ZB|ZF|ZH)S$")>;
   1386 def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFENE(B|F|H|ZB|ZF|ZH)?$")>;
   1387 def : InstRW<[WLat4, WLat4, VecStr, NormalGr],
   1388              (instregex "VFENE(B|F|H|ZB|ZF|ZH)S$")>;
   1389 def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VISTR(B|F|H)?$")>;
   1390 def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VISTR(B|F|H)S$")>;
   1391 def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VSTRC(B|F|H)?$")>;
   1392 def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VSTRC(B|F|H)S$")>;
   1393 def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VSTRCZ(B|F|H)$")>;
   1394 def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VSTRCZ(B|F|H)S$")>;
   1395 
   1396 
   1397 // -------------------------------- System ---------------------------------- //
   1398 
   1399 //===----------------------------------------------------------------------===//
   1400 // System: Program-Status Word Instructions
   1401 //===----------------------------------------------------------------------===//
   1402 
   1403 def : InstRW<[WLat30, WLat30, MCD], (instregex "EPSW$")>;
   1404 def : InstRW<[WLat30, MCD], (instregex "LPSW(E)?$")>;
   1405 def : InstRW<[WLat3, FXa, GroupAlone], (instregex "IPK$")>;
   1406 def : InstRW<[WLat1, LSU, EndGroup], (instregex "SPKA$")>;
   1407 def : InstRW<[WLat1, LSU, EndGroup], (instregex "SSM$")>;
   1408 def : InstRW<[WLat1, FXb, LSU, GroupAlone], (instregex "ST(N|O)SM$")>;
   1409 def : InstRW<[WLat3, FXa, NormalGr], (instregex "IAC$")>;
   1410 def : InstRW<[WLat1, LSU, EndGroup], (instregex "SAC(F)?$")>;
   1411 
   1412 //===----------------------------------------------------------------------===//
   1413 // System: Control Register Instructions
   1414 //===----------------------------------------------------------------------===//
   1415 
   1416 def : InstRW<[WLat4LSU, WLat4LSU, LSU2, GroupAlone], (instregex "LCTL(G)?$")>;
   1417 def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "STCT(L|G)$")>;
   1418 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "E(P|S)A(I)?R$")>;
   1419 def : InstRW<[WLat30, MCD], (instregex "SSA(I)?R$")>;
   1420 def : InstRW<[WLat30, MCD], (instregex "ESEA$")>;
   1421 
   1422 //===----------------------------------------------------------------------===//
   1423 // System: Prefix-Register Instructions
   1424 //===----------------------------------------------------------------------===//
   1425 
   1426 def : InstRW<[WLat30, MCD], (instregex "S(T)?PX$")>;
   1427 
   1428 //===----------------------------------------------------------------------===//
   1429 // System: Storage-Key and Real Memory Instructions
   1430 //===----------------------------------------------------------------------===//
   1431 
   1432 def : InstRW<[WLat30, MCD], (instregex "ISKE$")>;
   1433 def : InstRW<[WLat30, MCD], (instregex "IVSK$")>;
   1434 def : InstRW<[WLat30, MCD], (instregex "SSKE(Opt)?$")>;
   1435 def : InstRW<[WLat30, MCD], (instregex "RRB(E|M)$")>;
   1436 def : InstRW<[WLat30, MCD], (instregex "PFMF$")>;
   1437 def : InstRW<[WLat30, WLat30, MCD], (instregex "TB$")>;
   1438 def : InstRW<[WLat30, MCD], (instregex "PGIN$")>;
   1439 def : InstRW<[WLat30, MCD], (instregex "PGOUT$")>;
   1440 
   1441 //===----------------------------------------------------------------------===//
   1442 // System: Dynamic-Address-Translation Instructions
   1443 //===----------------------------------------------------------------------===//
   1444 
   1445 def : InstRW<[WLat30, MCD], (instregex "IPTE(Opt)?(Opt)?$")>;
   1446 def : InstRW<[WLat30, MCD], (instregex "IDTE(Opt)?$")>;
   1447 def : InstRW<[WLat30, MCD], (instregex "CRDTE(Opt)?$")>;
   1448 def : InstRW<[WLat30, MCD], (instregex "PTLB$")>;
   1449 def : InstRW<[WLat30, WLat30, MCD], (instregex "CSP(G)?$")>;
   1450 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "LPTEA$")>;
   1451 def : InstRW<[WLat30, WLat30, MCD], (instregex "LRA(Y|G)?$")>;
   1452 def : InstRW<[WLat30, MCD], (instregex "STRAG$")>;
   1453 def : InstRW<[WLat30, MCD], (instregex "LURA(G)?$")>;
   1454 def : InstRW<[WLat30, MCD], (instregex "STUR(A|G)$")>;
   1455 def : InstRW<[WLat30, MCD], (instregex "TPROT$")>;
   1456 
   1457 //===----------------------------------------------------------------------===//
   1458 // System: Memory-move Instructions
   1459 //===----------------------------------------------------------------------===//
   1460 
   1461 def : InstRW<[WLat4LSU, FXa2, FXb, LSU5, GroupAlone], (instregex "MVC(K|P|S)$")>;
   1462 def : InstRW<[WLat1, FXa, LSU5, GroupAlone], (instregex "MVC(S|D)K$")>;
   1463 def : InstRW<[WLat30, MCD], (instregex "MVCOS$")>;
   1464 def : InstRW<[WLat30, MCD], (instregex "MVPG$")>;
   1465 
   1466 //===----------------------------------------------------------------------===//
   1467 // System: Address-Space Instructions
   1468 //===----------------------------------------------------------------------===//
   1469 
   1470 def : InstRW<[WLat30, MCD], (instregex "LASP$")>;
   1471 def : InstRW<[WLat1, LSU, GroupAlone], (instregex "PALB$")>;
   1472 def : InstRW<[WLat30, MCD], (instregex "PC$")>;
   1473 def : InstRW<[WLat30, MCD], (instregex "PR$")>;
   1474 def : InstRW<[WLat30, MCD], (instregex "PT(I)?$")>;
   1475 def : InstRW<[WLat30, MCD], (instregex "RP$")>;
   1476 def : InstRW<[WLat30, MCD], (instregex "BS(G|A)$")>;
   1477 def : InstRW<[WLat30, MCD], (instregex "TAR$")>;
   1478 
   1479 //===----------------------------------------------------------------------===//
   1480 // System: Linkage-Stack Instructions
   1481 //===----------------------------------------------------------------------===//
   1482 
   1483 def : InstRW<[WLat30, MCD], (instregex "BAKR$")>;
   1484 def : InstRW<[WLat30, MCD], (instregex "EREG(G)?$")>;
   1485 def : InstRW<[WLat30, WLat30, MCD], (instregex "(E|M)STA$")>;
   1486 
   1487 //===----------------------------------------------------------------------===//
   1488 // System: Time-Related Instructions
   1489 //===----------------------------------------------------------------------===//
   1490 
   1491 def : InstRW<[WLat30, MCD], (instregex "PTFF$")>;
   1492 def : InstRW<[WLat30, MCD], (instregex "SCK(PF|C)?$")>;
   1493 def : InstRW<[WLat1, LSU2, GroupAlone], (instregex "SPT$")>;
   1494 def : InstRW<[WLat15, LSU3, FXa2, FXb, GroupAlone], (instregex "STCK(F)?$")>;
   1495 def : InstRW<[WLat20, LSU4, FXa2, FXb2, GroupAlone], (instregex "STCKE$")>;
   1496 def : InstRW<[WLat30, MCD], (instregex "STCKC$")>;
   1497 def : InstRW<[WLat1, LSU2, FXb, Cracked], (instregex "STPT$")>;
   1498 
   1499 //===----------------------------------------------------------------------===//
   1500 // System: CPU-Related Instructions
   1501 //===----------------------------------------------------------------------===//
   1502 
   1503 def : InstRW<[WLat30, MCD], (instregex "STAP$")>;
   1504 def : InstRW<[WLat30, MCD], (instregex "STIDP$")>;
   1505 def : InstRW<[WLat30, WLat30, MCD], (instregex "STSI$")>;
   1506 def : InstRW<[WLat30, WLat30, MCD], (instregex "STFL(E)?$")>;
   1507 def : InstRW<[WLat30, MCD], (instregex "ECAG$")>;
   1508 def : InstRW<[WLat30, WLat30, MCD], (instregex "ECTG$")>;
   1509 def : InstRW<[WLat30, MCD], (instregex "PTF$")>;
   1510 def : InstRW<[WLat30, MCD], (instregex "PCKMO$")>;
   1511 
   1512 //===----------------------------------------------------------------------===//
   1513 // System: Miscellaneous Instructions
   1514 //===----------------------------------------------------------------------===//
   1515 
   1516 def : InstRW<[WLat30, MCD], (instregex "SVC$")>;
   1517 def : InstRW<[WLat1, FXb, GroupAlone], (instregex "MC$")>;
   1518 def : InstRW<[WLat30, MCD], (instregex "DIAG$")>;
   1519 def : InstRW<[WLat1, FXb, NormalGr], (instregex "TRAC(E|G)$")>;
   1520 def : InstRW<[WLat30, MCD], (instregex "TRAP(2|4)$")>;
   1521 def : InstRW<[WLat30, MCD], (instregex "SIG(P|A)$")>;
   1522 def : InstRW<[WLat30, MCD], (instregex "SIE$")>;
   1523 
   1524 //===----------------------------------------------------------------------===//
   1525 // System: CPU-Measurement Facility Instructions
   1526 //===----------------------------------------------------------------------===//
   1527 
   1528 def : InstRW<[WLat1, FXb, NormalGr], (instregex "LPP$")>;
   1529 def : InstRW<[WLat30, WLat30, MCD], (instregex "ECPGA$")>;
   1530 def : InstRW<[WLat30, WLat30, MCD], (instregex "E(C|P)CTR$")>;
   1531 def : InstRW<[WLat30, MCD], (instregex "LCCTL$")>;
   1532 def : InstRW<[WLat30, MCD], (instregex "L(P|S)CTL$")>;
   1533 def : InstRW<[WLat30, MCD], (instregex "Q(S|CTR)I$")>;
   1534 def : InstRW<[WLat30, MCD], (instregex "S(C|P)CTR$")>;
   1535 
   1536 //===----------------------------------------------------------------------===//
   1537 // System: I/O Instructions
   1538 //===----------------------------------------------------------------------===//
   1539 
   1540 def : InstRW<[WLat30, MCD], (instregex "(C|H|R|X)SCH$")>;
   1541 def : InstRW<[WLat30, MCD], (instregex "(M|S|ST|T)SCH$")>;
   1542 def : InstRW<[WLat30, MCD], (instregex "RCHP$")>;
   1543 def : InstRW<[WLat30, MCD], (instregex "SCHM$")>;
   1544 def : InstRW<[WLat30, MCD], (instregex "STC(PS|RW)$")>;
   1545 def : InstRW<[WLat30, MCD], (instregex "TPI$")>;
   1546 def : InstRW<[WLat30, MCD], (instregex "SAL$")>;
   1547 
   1548 }
   1549 
   1550