1 //-- SystemZScheduleZ14.td - SystemZ Scheduling Definitions ----*- tblgen -*-=// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file defines the machine model for Z14 to support instruction 11 // scheduling and other instruction cost heuristics. 12 // 13 // Pseudos expanded right after isel do not need to be modelled here. 14 // 15 //===----------------------------------------------------------------------===// 16 17 def Z14Model : SchedMachineModel { 18 19 let UnsupportedFeatures = Arch12UnsupportedFeatures.List; 20 21 let IssueWidth = 6; // Number of instructions decoded per cycle. 22 let MicroOpBufferSize = 60; // Issue queues 23 let LoadLatency = 1; // Optimistic load latency. 24 25 let PostRAScheduler = 1; 26 27 // Extra cycles for a mispredicted branch. 28 let MispredictPenalty = 20; 29 } 30 31 let SchedModel = Z14Model in { 32 // These definitions need the SchedModel value. They could be put in a 33 // subtarget common include file, but it seems the include system in Tablegen 34 // currently (2016) rejects multiple includes of same file. 35 36 // Decoder grouping rules 37 let NumMicroOps = 1 in { 38 def : WriteRes<NormalGr, []>; 39 def : WriteRes<BeginGroup, []> { let BeginGroup = 1; } 40 def : WriteRes<EndGroup, []> { let EndGroup = 1; } 41 } 42 def : WriteRes<Cracked, []> { 43 let NumMicroOps = 2; 44 let BeginGroup = 1; 45 } 46 def : WriteRes<GroupAlone, []> { 47 let NumMicroOps = 3; 48 let BeginGroup = 1; 49 let EndGroup = 1; 50 } 51 52 // Incoming latency removed from the register operand which is used together 53 // with a memory operand by the instruction. 54 def : ReadAdvance<RegReadAdv, 4>; 55 56 // LoadLatency (above) is not used for instructions in this file. This is 57 // instead the role of LSULatency, which is the latency value added to the 58 // result of loads and instructions with folded memory operands. 59 def : WriteRes<LSULatency, []> { let Latency = 4; let NumMicroOps = 0; } 60 61 let NumMicroOps = 0 in { 62 foreach L = 1-30 in 63 def : WriteRes<!cast<SchedWrite>("WLat"#L), []> { let Latency = L; } 64 } 65 66 // Execution units. 67 def Z14_FXaUnit : ProcResource<2>; 68 def Z14_FXbUnit : ProcResource<2>; 69 def Z14_LSUnit : ProcResource<2>; 70 def Z14_VecUnit : ProcResource<2>; 71 def Z14_VecFPdUnit : ProcResource<2> { let BufferSize = 1; /* blocking */ } 72 def Z14_VBUnit : ProcResource<2>; 73 def Z14_MCD : ProcResource<1>; 74 75 // Subtarget specific definitions of scheduling resources. 76 let NumMicroOps = 0 in { 77 def : WriteRes<FXa, [Z14_FXaUnit]>; 78 def : WriteRes<FXb, [Z14_FXbUnit]>; 79 def : WriteRes<LSU, [Z14_LSUnit]>; 80 def : WriteRes<VecBF, [Z14_VecUnit]>; 81 def : WriteRes<VecDF, [Z14_VecUnit]>; 82 def : WriteRes<VecDFX, [Z14_VecUnit]>; 83 def : WriteRes<VecMul, [Z14_VecUnit]>; 84 def : WriteRes<VecStr, [Z14_VecUnit]>; 85 def : WriteRes<VecXsPm, [Z14_VecUnit]>; 86 foreach Num = 2-5 in { let ResourceCycles = [Num] in { 87 def : WriteRes<!cast<SchedWrite>("FXa"#Num), [Z14_FXaUnit]>; 88 def : WriteRes<!cast<SchedWrite>("FXb"#Num), [Z14_FXbUnit]>; 89 def : WriteRes<!cast<SchedWrite>("LSU"#Num), [Z14_LSUnit]>; 90 def : WriteRes<!cast<SchedWrite>("VecBF"#Num), [Z14_VecUnit]>; 91 def : WriteRes<!cast<SchedWrite>("VecDF"#Num), [Z14_VecUnit]>; 92 def : WriteRes<!cast<SchedWrite>("VecDFX"#Num), [Z14_VecUnit]>; 93 def : WriteRes<!cast<SchedWrite>("VecMul"#Num), [Z14_VecUnit]>; 94 def : WriteRes<!cast<SchedWrite>("VecStr"#Num), [Z14_VecUnit]>; 95 def : WriteRes<!cast<SchedWrite>("VecXsPm"#Num), [Z14_VecUnit]>; 96 }} 97 98 def : WriteRes<VecFPd, [Z14_VecFPdUnit]> { let ResourceCycles = [30]; } 99 100 def : WriteRes<VBU, [Z14_VBUnit]>; // Virtual Branching Unit 101 } 102 103 def : WriteRes<MCD, [Z14_MCD]> { let NumMicroOps = 3; 104 let BeginGroup = 1; 105 let EndGroup = 1; } 106 107 // -------------------------- INSTRUCTIONS ---------------------------------- // 108 109 // InstRW constructs have been used in order to preserve the 110 // readability of the InstrInfo files. 111 112 // For each instruction, as matched by a regexp, provide a list of 113 // resources that it needs. These will be combined into a SchedClass. 114 115 //===----------------------------------------------------------------------===// 116 // Stack allocation 117 //===----------------------------------------------------------------------===// 118 119 // Pseudo -> LA / LAY 120 def : InstRW<[WLat1, FXa, NormalGr], (instregex "ADJDYNALLOC$")>; 121 122 //===----------------------------------------------------------------------===// 123 // Branch instructions 124 //===----------------------------------------------------------------------===// 125 126 // Branch 127 def : InstRW<[WLat1, VBU, NormalGr], (instregex "(Call)?BRC(L)?(Asm.*)?$")>; 128 def : InstRW<[WLat1, VBU, NormalGr], (instregex "(Call)?J(G)?(Asm.*)?$")>; 129 def : InstRW<[WLat1, FXb, NormalGr], (instregex "(Call)?BC(R)?(Asm.*)?$")>; 130 def : InstRW<[WLat1, FXb, NormalGr], (instregex "(Call)?B(R)?(Asm.*)?$")>; 131 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "BI(C)?(Asm.*)?$")>; 132 def : InstRW<[WLat1, FXa, EndGroup], (instregex "BRCT(G)?$")>; 133 def : InstRW<[WLat1, FXa, FXb, GroupAlone], (instregex "BRCTH$")>; 134 def : InstRW<[WLat1, FXa, FXb, GroupAlone], (instregex "BCT(G)?(R)?$")>; 135 def : InstRW<[WLat1, FXa2, FXb2, GroupAlone], 136 (instregex "B(R)?X(H|L).*$")>; 137 138 // Compare and branch 139 def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(L)?(G)?(I|R)J(Asm.*)?$")>; 140 def : InstRW<[WLat1, FXb2, GroupAlone], 141 (instregex "C(L)?(G)?(I|R)B(Call|Return|Asm.*)?$")>; 142 143 //===----------------------------------------------------------------------===// 144 // Trap instructions 145 //===----------------------------------------------------------------------===// 146 147 // Trap 148 def : InstRW<[WLat1, VBU, NormalGr], (instregex "(Cond)?Trap$")>; 149 150 // Compare and trap 151 def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(G)?(I|R)T(Asm.*)?$")>; 152 def : InstRW<[WLat1, FXb, NormalGr], (instregex "CL(G)?RT(Asm.*)?$")>; 153 def : InstRW<[WLat1, FXb, NormalGr], (instregex "CL(F|G)IT(Asm.*)?$")>; 154 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "CL(G)?T(Asm.*)?$")>; 155 156 //===----------------------------------------------------------------------===// 157 // Call and return instructions 158 //===----------------------------------------------------------------------===// 159 160 // Call 161 def : InstRW<[WLat1, VBU, FXa2, GroupAlone], (instregex "(Call)?BRAS$")>; 162 def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "(Call)?BRASL$")>; 163 def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "(Call)?BAS(R)?$")>; 164 def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "TLS_(G|L)DCALL$")>; 165 166 // Return 167 def : InstRW<[WLat1, FXb, EndGroup], (instregex "Return$")>; 168 def : InstRW<[WLat1, FXb, NormalGr], (instregex "CondReturn$")>; 169 170 //===----------------------------------------------------------------------===// 171 // Move instructions 172 //===----------------------------------------------------------------------===// 173 174 // Moves 175 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "MV(G|H)?HI$")>; 176 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "MVI(Y)?$")>; 177 178 // Move character 179 def : InstRW<[WLat1, FXb, LSU3, GroupAlone], (instregex "MVC$")>; 180 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "MVCL(E|U)?$")>; 181 182 // Pseudo -> reg move 183 def : InstRW<[WLat1, FXa, NormalGr], (instregex "COPY(_TO_REGCLASS)?$")>; 184 def : InstRW<[WLat1, FXa, NormalGr], (instregex "EXTRACT_SUBREG$")>; 185 def : InstRW<[WLat1, FXa, NormalGr], (instregex "INSERT_SUBREG$")>; 186 def : InstRW<[WLat1, FXa, NormalGr], (instregex "REG_SEQUENCE$")>; 187 188 // Loads 189 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L(Y|FH|RL|Mux)?$")>; 190 def : InstRW<[LSULatency, LSULatency, LSU, NormalGr], (instregex "LCBB$")>; 191 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LG(RL)?$")>; 192 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L128$")>; 193 194 def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLIH(F|H|L)$")>; 195 def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLIL(F|H|L)$")>; 196 197 def : InstRW<[WLat1, FXa, NormalGr], (instregex "LG(F|H)I$")>; 198 def : InstRW<[WLat1, FXa, NormalGr], (instregex "LHI(Mux)?$")>; 199 def : InstRW<[WLat1, FXa, NormalGr], (instregex "LR(Mux)?$")>; 200 201 // Load and zero rightmost byte 202 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LZR(F|G)$")>; 203 204 // Load and trap 205 def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "L(FH|G)?AT$")>; 206 207 // Load and test 208 def : InstRW<[WLat1LSU, WLat1LSU, LSU, FXa, NormalGr], (instregex "LT(G)?$")>; 209 def : InstRW<[WLat1, FXa, NormalGr], (instregex "LT(G)?R$")>; 210 211 // Stores 212 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STG(RL)?$")>; 213 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "ST128$")>; 214 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "ST(Y|FH|RL|Mux)?$")>; 215 216 // String moves. 217 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "MVST$")>; 218 219 //===----------------------------------------------------------------------===// 220 // Conditional move instructions 221 //===----------------------------------------------------------------------===// 222 223 def : InstRW<[WLat2, FXa, NormalGr], (instregex "LOCRMux$")>; 224 def : InstRW<[WLat2, FXa, NormalGr], (instregex "LOC(G|FH)?R(Asm.*)?$")>; 225 def : InstRW<[WLat2, FXa, NormalGr], (instregex "LOC(G|H)?HI(Mux|(Asm.*))?$")>; 226 def : InstRW<[WLat2LSU, RegReadAdv, FXa, LSU, NormalGr], 227 (instregex "LOC(G|FH|Mux)?(Asm.*)?$")>; 228 def : InstRW<[WLat1, FXb, LSU, NormalGr], 229 (instregex "STOC(G|FH|Mux)?(Asm.*)?$")>; 230 231 //===----------------------------------------------------------------------===// 232 // Sign extensions 233 //===----------------------------------------------------------------------===// 234 235 def : InstRW<[WLat1, FXa, NormalGr], (instregex "L(B|H|G)R$")>; 236 def : InstRW<[WLat1, FXa, NormalGr], (instregex "LG(B|H|F)R$")>; 237 238 def : InstRW<[WLat1LSU, WLat1LSU, FXa, LSU, NormalGr], (instregex "LTGF$")>; 239 def : InstRW<[WLat1, FXa, NormalGr], (instregex "LTGFR$")>; 240 241 def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LB(H|Mux)?$")>; 242 def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LH(Y)?$")>; 243 def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LH(H|Mux|RL)$")>; 244 def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LG(B|H|F)$")>; 245 def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LG(H|F)RL$")>; 246 247 //===----------------------------------------------------------------------===// 248 // Zero extensions 249 //===----------------------------------------------------------------------===// 250 251 def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLCR(Mux)?$")>; 252 def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLHR(Mux)?$")>; 253 def : InstRW<[WLat1, FXa, NormalGr], (instregex "LLG(C|H|F|T)R$")>; 254 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLC(Mux)?$")>; 255 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLH(Mux)?$")>; 256 def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LL(C|H)H$")>; 257 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLHRL$")>; 258 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLG(C|H|F|T|HRL|FRL)$")>; 259 260 // Load and zero rightmost byte 261 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLZRGF$")>; 262 263 // Load and trap 264 def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "LLG(F|T)?AT$")>; 265 266 //===----------------------------------------------------------------------===// 267 // Truncations 268 //===----------------------------------------------------------------------===// 269 270 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STC(H|Y|Mux)?$")>; 271 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STH(H|Y|RL|Mux)?$")>; 272 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STCM(H|Y)?$")>; 273 274 //===----------------------------------------------------------------------===// 275 // Multi-register moves 276 //===----------------------------------------------------------------------===// 277 278 // Load multiple (estimated average of 5 ops) 279 def : InstRW<[WLat10, WLat10, LSU5, GroupAlone], (instregex "LM(H|Y|G)?$")>; 280 281 // Load multiple disjoint 282 def : InstRW<[WLat30, WLat30, MCD], (instregex "LMD$")>; 283 284 // Store multiple 285 def : InstRW<[WLat1, LSU2, FXb3, GroupAlone], (instregex "STM(G|H|Y)?$")>; 286 287 //===----------------------------------------------------------------------===// 288 // Byte swaps 289 //===----------------------------------------------------------------------===// 290 291 def : InstRW<[WLat1, FXa, NormalGr], (instregex "LRV(G)?R$")>; 292 def : InstRW<[WLat1LSU, FXa, LSU, NormalGr], (instregex "LRV(G|H)?$")>; 293 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STRV(G|H)?$")>; 294 def : InstRW<[WLat30, MCD], (instregex "MVCIN$")>; 295 296 //===----------------------------------------------------------------------===// 297 // Load address instructions 298 //===----------------------------------------------------------------------===// 299 300 def : InstRW<[WLat1, FXa, NormalGr], (instregex "LA(Y|RL)?$")>; 301 302 // Load the Global Offset Table address ( -> larl ) 303 def : InstRW<[WLat1, FXa, NormalGr], (instregex "GOT$")>; 304 305 //===----------------------------------------------------------------------===// 306 // Absolute and Negation 307 //===----------------------------------------------------------------------===// 308 309 def : InstRW<[WLat1, WLat1, FXa, NormalGr], (instregex "LP(G)?R$")>; 310 def : InstRW<[WLat2, WLat2, FXa2, Cracked], (instregex "L(N|P)GFR$")>; 311 def : InstRW<[WLat1, WLat1, FXa, NormalGr], (instregex "LN(R|GR)$")>; 312 def : InstRW<[WLat1, FXa, NormalGr], (instregex "LC(R|GR)$")>; 313 def : InstRW<[WLat2, WLat2, FXa2, Cracked], (instregex "LCGFR$")>; 314 315 //===----------------------------------------------------------------------===// 316 // Insertion 317 //===----------------------------------------------------------------------===// 318 319 def : InstRW<[WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], (instregex "IC(Y)?$")>; 320 def : InstRW<[WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 321 (instregex "IC32(Y)?$")>; 322 def : InstRW<[WLat1LSU, RegReadAdv, WLat1LSU, FXa, LSU, NormalGr], 323 (instregex "ICM(H|Y)?$")>; 324 def : InstRW<[WLat1, FXa, NormalGr], (instregex "II(F|H|L)Mux$")>; 325 def : InstRW<[WLat1, FXa, NormalGr], (instregex "IIHF(64)?$")>; 326 def : InstRW<[WLat1, FXa, NormalGr], (instregex "IIHH(64)?$")>; 327 def : InstRW<[WLat1, FXa, NormalGr], (instregex "IIHL(64)?$")>; 328 def : InstRW<[WLat1, FXa, NormalGr], (instregex "IILF(64)?$")>; 329 def : InstRW<[WLat1, FXa, NormalGr], (instregex "IILH(64)?$")>; 330 def : InstRW<[WLat1, FXa, NormalGr], (instregex "IILL(64)?$")>; 331 332 //===----------------------------------------------------------------------===// 333 // Addition 334 //===----------------------------------------------------------------------===// 335 336 def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 337 (instregex "A(Y)?$")>; 338 def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr], 339 (instregex "AH(Y)?$")>; 340 def : InstRW<[WLat1, FXa, NormalGr], (instregex "AIH$")>; 341 def : InstRW<[WLat1, FXa, NormalGr], (instregex "AFI(Mux)?$")>; 342 def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 343 (instregex "AG$")>; 344 def : InstRW<[WLat1, FXa, NormalGr], (instregex "AGFI$")>; 345 def : InstRW<[WLat1, FXa, NormalGr], (instregex "AGHI(K)?$")>; 346 def : InstRW<[WLat1, FXa, NormalGr], (instregex "AGR(K)?$")>; 347 def : InstRW<[WLat1, FXa, NormalGr], (instregex "AHI(K)?$")>; 348 def : InstRW<[WLat1, FXa, NormalGr], (instregex "AHIMux(K)?$")>; 349 def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 350 (instregex "AL(Y)?$")>; 351 def : InstRW<[WLat1, FXa, NormalGr], (instregex "AL(FI|HSIK)$")>; 352 def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 353 (instregex "ALG(F)?$")>; 354 def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALGHSIK$")>; 355 def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALGF(I|R)$")>; 356 def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALGR(K)?$")>; 357 def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALR(K)?$")>; 358 def : InstRW<[WLat1, FXa, NormalGr], (instregex "AR(K)?$")>; 359 def : InstRW<[WLat1, FXa, NormalGr], (instregex "A(L)?HHHR$")>; 360 def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "A(L)?HHLR$")>; 361 def : InstRW<[WLat1, FXa, NormalGr], (instregex "ALSIH(N)?$")>; 362 def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "A(L)?(G)?SI$")>; 363 364 // Logical addition with carry 365 def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, GroupAlone], 366 (instregex "ALC(G)?$")>; 367 def : InstRW<[WLat2, WLat2, FXa, GroupAlone], (instregex "ALC(G)?R$")>; 368 369 // Add with sign extension (16/32 -> 64) 370 def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr], 371 (instregex "AG(F|H)$")>; 372 def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "AGFR$")>; 373 374 //===----------------------------------------------------------------------===// 375 // Subtraction 376 //===----------------------------------------------------------------------===// 377 378 def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 379 (instregex "S(G|Y)?$")>; 380 def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr], 381 (instregex "SH(Y)?$")>; 382 def : InstRW<[WLat1, FXa, NormalGr], (instregex "SGR(K)?$")>; 383 def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLFI$")>; 384 def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 385 (instregex "SL(G|GF|Y)?$")>; 386 def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLGF(I|R)$")>; 387 def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLGR(K)?$")>; 388 def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLR(K)?$")>; 389 def : InstRW<[WLat1, FXa, NormalGr], (instregex "SR(K)?$")>; 390 def : InstRW<[WLat1, FXa, NormalGr], (instregex "S(L)?HHHR$")>; 391 def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "S(L)?HHLR$")>; 392 393 // Subtraction with borrow 394 def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, GroupAlone], 395 (instregex "SLB(G)?$")>; 396 def : InstRW<[WLat2, WLat2, FXa, GroupAlone], (instregex "SLB(G)?R$")>; 397 398 // Subtraction with sign extension (16/32 -> 64) 399 def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXa, LSU, NormalGr], 400 (instregex "SG(F|H)$")>; 401 def : InstRW<[WLat2, WLat2, FXa, NormalGr], (instregex "SGFR$")>; 402 403 //===----------------------------------------------------------------------===// 404 // AND 405 //===----------------------------------------------------------------------===// 406 407 def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 408 (instregex "N(G|Y)?$")>; 409 def : InstRW<[WLat1, FXa, NormalGr], (instregex "NGR(K)?$")>; 410 def : InstRW<[WLat1, FXa, NormalGr], (instregex "NI(FMux|HMux|LMux)$")>; 411 def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "NI(Y)?$")>; 412 def : InstRW<[WLat1, FXa, NormalGr], (instregex "NIHF(64)?$")>; 413 def : InstRW<[WLat1, FXa, NormalGr], (instregex "NIHH(64)?$")>; 414 def : InstRW<[WLat1, FXa, NormalGr], (instregex "NIHL(64)?$")>; 415 def : InstRW<[WLat1, FXa, NormalGr], (instregex "NILF(64)?$")>; 416 def : InstRW<[WLat1, FXa, NormalGr], (instregex "NILH(64)?$")>; 417 def : InstRW<[WLat1, FXa, NormalGr], (instregex "NILL(64)?$")>; 418 def : InstRW<[WLat1, FXa, NormalGr], (instregex "NR(K)?$")>; 419 def : InstRW<[WLat3LSU, LSU2, FXb, Cracked], (instregex "NC$")>; 420 421 //===----------------------------------------------------------------------===// 422 // OR 423 //===----------------------------------------------------------------------===// 424 425 def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 426 (instregex "O(G|Y)?$")>; 427 def : InstRW<[WLat1, FXa, NormalGr], (instregex "OGR(K)?$")>; 428 def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "OI(Y)?$")>; 429 def : InstRW<[WLat1, FXa, NormalGr], (instregex "OI(FMux|HMux|LMux)$")>; 430 def : InstRW<[WLat1, FXa, NormalGr], (instregex "OIHF(64)?$")>; 431 def : InstRW<[WLat1, FXa, NormalGr], (instregex "OIHH(64)?$")>; 432 def : InstRW<[WLat1, FXa, NormalGr], (instregex "OIHL(64)?$")>; 433 def : InstRW<[WLat1, FXa, NormalGr], (instregex "OILF(64)?$")>; 434 def : InstRW<[WLat1, FXa, NormalGr], (instregex "OILH(64)?$")>; 435 def : InstRW<[WLat1, FXa, NormalGr], (instregex "OILL(64)?$")>; 436 def : InstRW<[WLat1, FXa, NormalGr], (instregex "OR(K)?$")>; 437 def : InstRW<[WLat3LSU, LSU2, FXb, Cracked], (instregex "OC$")>; 438 439 //===----------------------------------------------------------------------===// 440 // XOR 441 //===----------------------------------------------------------------------===// 442 443 def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXa, LSU, NormalGr], 444 (instregex "X(G|Y)?$")>; 445 def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "XI(Y)?$")>; 446 def : InstRW<[WLat1, FXa, NormalGr], (instregex "XIFMux$")>; 447 def : InstRW<[WLat1, FXa, NormalGr], (instregex "XGR(K)?$")>; 448 def : InstRW<[WLat1, FXa, NormalGr], (instregex "XIHF(64)?$")>; 449 def : InstRW<[WLat1, FXa, NormalGr], (instregex "XILF(64)?$")>; 450 def : InstRW<[WLat1, FXa, NormalGr], (instregex "XR(K)?$")>; 451 def : InstRW<[WLat3LSU, LSU2, FXb, Cracked], (instregex "XC$")>; 452 453 //===----------------------------------------------------------------------===// 454 // Multiplication 455 //===----------------------------------------------------------------------===// 456 457 def : InstRW<[WLat5LSU, RegReadAdv, FXa, LSU, NormalGr], 458 (instregex "MS(GF|Y)?$")>; 459 def : InstRW<[WLat5, FXa, NormalGr], (instregex "MS(R|FI)$")>; 460 def : InstRW<[WLat7LSU, RegReadAdv, FXa, LSU, NormalGr], (instregex "MSG$")>; 461 def : InstRW<[WLat7, FXa, NormalGr], (instregex "MSGR$")>; 462 def : InstRW<[WLat5, FXa, NormalGr], (instregex "MSGF(I|R)$")>; 463 def : InstRW<[WLat8LSU, RegReadAdv, FXa2, LSU, GroupAlone], (instregex "MLG$")>; 464 def : InstRW<[WLat8, FXa2, GroupAlone], (instregex "MLGR$")>; 465 def : InstRW<[WLat4, FXa, NormalGr], (instregex "MGHI$")>; 466 def : InstRW<[WLat4, FXa, NormalGr], (instregex "MHI$")>; 467 def : InstRW<[WLat4LSU, RegReadAdv, FXa, LSU, NormalGr], (instregex "MH(Y)?$")>; 468 def : InstRW<[WLat6, FXa2, GroupAlone], (instregex "M(L)?R$")>; 469 def : InstRW<[WLat6LSU, RegReadAdv, FXa2, LSU, GroupAlone], 470 (instregex "M(FY|L)?$")>; 471 def : InstRW<[WLat8, RegReadAdv, FXa, LSU, NormalGr], (instregex "MGH$")>; 472 def : InstRW<[WLat12, RegReadAdv, FXa2, LSU, GroupAlone], (instregex "MG$")>; 473 def : InstRW<[WLat8, FXa2, GroupAlone], (instregex "MGRK$")>; 474 def : InstRW<[WLat6LSU, WLat6LSU, RegReadAdv, FXa, LSU, NormalGr], 475 (instregex "MSC$")>; 476 def : InstRW<[WLat8LSU, WLat8LSU, RegReadAdv, FXa, LSU, NormalGr], 477 (instregex "MSGC$")>; 478 def : InstRW<[WLat6, WLat6, FXa, NormalGr], (instregex "MSRKC$")>; 479 def : InstRW<[WLat8, WLat8, FXa, NormalGr], (instregex "MSGRKC$")>; 480 481 //===----------------------------------------------------------------------===// 482 // Division and remainder 483 //===----------------------------------------------------------------------===// 484 485 def : InstRW<[WLat20, FXa4, GroupAlone], (instregex "DR$")>; 486 def : InstRW<[WLat30, RegReadAdv, FXa4, LSU, GroupAlone], (instregex "D$")>; 487 def : InstRW<[WLat30, FXa2, GroupAlone], (instregex "DSG(F)?R$")>; 488 def : InstRW<[WLat30, RegReadAdv, FXa2, LSU, GroupAlone], 489 (instregex "DSG(F)?$")>; 490 def : InstRW<[WLat20, FXa4, GroupAlone], (instregex "DLR$")>; 491 def : InstRW<[WLat30, FXa4, GroupAlone], (instregex "DLGR$")>; 492 def : InstRW<[WLat30, RegReadAdv, FXa4, LSU, GroupAlone], (instregex "DL(G)?$")>; 493 494 //===----------------------------------------------------------------------===// 495 // Shifts 496 //===----------------------------------------------------------------------===// 497 498 def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLL(G|K)?$")>; 499 def : InstRW<[WLat1, FXa, NormalGr], (instregex "SRL(G|K)?$")>; 500 def : InstRW<[WLat1, FXa, NormalGr], (instregex "SRA(G|K)?$")>; 501 def : InstRW<[WLat1, FXa, NormalGr], (instregex "SLA(G|K)?$")>; 502 def : InstRW<[WLat5LSU, WLat5LSU, FXa4, LSU, GroupAlone], 503 (instregex "S(L|R)D(A|L)$")>; 504 505 // Rotate 506 def : InstRW<[WLat2LSU, FXa, LSU, NormalGr], (instregex "RLL(G)?$")>; 507 508 // Rotate and insert 509 def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBG(N|32)?$")>; 510 def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBH(G|H|L)$")>; 511 def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBL(G|H|L)$")>; 512 def : InstRW<[WLat1, FXa, NormalGr], (instregex "RISBMux$")>; 513 514 // Rotate and Select 515 def : InstRW<[WLat2, WLat2, FXa2, Cracked], (instregex "R(N|O|X)SBG$")>; 516 517 //===----------------------------------------------------------------------===// 518 // Comparison 519 //===----------------------------------------------------------------------===// 520 521 def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], 522 (instregex "C(G|Y|Mux)?$")>; 523 def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CRL$")>; 524 def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(F|H)I(Mux)?$")>; 525 def : InstRW<[WLat1, FXb, NormalGr], (instregex "CG(F|H)I$")>; 526 def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CG(HSI|RL)$")>; 527 def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(G)?R$")>; 528 def : InstRW<[WLat1, FXb, NormalGr], (instregex "CIH$")>; 529 def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CHF$")>; 530 def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CHSI$")>; 531 def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], 532 (instregex "CL(Y|Mux)?$")>; 533 def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLFHSI$")>; 534 def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLFI(Mux)?$")>; 535 def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CLG$")>; 536 def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLG(HRL|HSI)$")>; 537 def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CLGF$")>; 538 def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLGFRL$")>; 539 def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLGF(I|R)$")>; 540 def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLGR$")>; 541 def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLGRL$")>; 542 def : InstRW<[WLat1LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CLHF$")>; 543 def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLH(RL|HSI)$")>; 544 def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLIH$")>; 545 def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLI(Y)?$")>; 546 def : InstRW<[WLat1, FXb, NormalGr], (instregex "CLR$")>; 547 def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "CLRL$")>; 548 def : InstRW<[WLat1, FXb, NormalGr], (instregex "C(L)?HHR$")>; 549 def : InstRW<[WLat2, FXb, NormalGr], (instregex "C(L)?HLR$")>; 550 551 // Compare halfword 552 def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CH(Y)?$")>; 553 def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "CHRL$")>; 554 def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CGH$")>; 555 def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "CGHRL$")>; 556 def : InstRW<[WLat2LSU, FXa, FXb, LSU, Cracked], (instregex "CHHSI$")>; 557 558 // Compare with sign extension (32 -> 64) 559 def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], (instregex "CGF$")>; 560 def : InstRW<[WLat2LSU, FXb, LSU, NormalGr], (instregex "CGFRL$")>; 561 def : InstRW<[WLat2, FXb, NormalGr], (instregex "CGFR$")>; 562 563 // Compare logical character 564 def : InstRW<[WLat6, FXb, LSU2, Cracked], (instregex "CLC$")>; 565 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CLCL(E|U)?$")>; 566 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CLST$")>; 567 568 // Test under mask 569 def : InstRW<[WLat1LSU, FXb, LSU, NormalGr], (instregex "TM(Y)?$")>; 570 def : InstRW<[WLat1, FXb, NormalGr], (instregex "TM(H|L)Mux$")>; 571 def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMHH(64)?$")>; 572 def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMHL(64)?$")>; 573 def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMLH(64)?$")>; 574 def : InstRW<[WLat1, FXb, NormalGr], (instregex "TMLL(64)?$")>; 575 576 // Compare logical characters under mask 577 def : InstRW<[WLat2LSU, RegReadAdv, FXb, LSU, NormalGr], 578 (instregex "CLM(H|Y)?$")>; 579 580 //===----------------------------------------------------------------------===// 581 // Prefetch and execution hint 582 //===----------------------------------------------------------------------===// 583 584 def : InstRW<[WLat1, LSU, NormalGr], (instregex "PFD(RL)?$")>; 585 def : InstRW<[WLat1, FXb, NormalGr], (instregex "BPP$")>; 586 def : InstRW<[FXb, EndGroup], (instregex "BPRP$")>; 587 def : InstRW<[WLat1, FXb, NormalGr], (instregex "NIAI$")>; 588 589 //===----------------------------------------------------------------------===// 590 // Atomic operations 591 //===----------------------------------------------------------------------===// 592 593 def : InstRW<[WLat1, FXb, EndGroup], (instregex "Serialize$")>; 594 595 def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAA(G)?$")>; 596 def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAAL(G)?$")>; 597 def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAN(G)?$")>; 598 def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAO(G)?$")>; 599 def : InstRW<[WLat2LSU, WLat2LSU, FXb, LSU, NormalGr], (instregex "LAX(G)?$")>; 600 601 // Test and set 602 def : InstRW<[WLat2LSU, FXb, LSU, EndGroup], (instregex "TS$")>; 603 604 // Compare and swap 605 def : InstRW<[WLat3LSU, WLat3LSU, FXa, FXb, LSU, GroupAlone], 606 (instregex "CS(G|Y)?$")>; 607 608 // Compare double and swap 609 def : InstRW<[WLat6LSU, WLat6LSU, FXa3, FXb2, LSU, GroupAlone], 610 (instregex "CDS(Y)?$")>; 611 def : InstRW<[WLat15, WLat15, FXa2, FXb4, LSU3, 612 GroupAlone], (instregex "CDSG$")>; 613 614 // Compare and swap and store 615 def : InstRW<[WLat30, MCD], (instregex "CSST$")>; 616 617 // Perform locked operation 618 def : InstRW<[WLat30, MCD], (instregex "PLO$")>; 619 620 // Load/store pair from/to quadword 621 def : InstRW<[WLat4LSU, LSU2, GroupAlone], (instregex "LPQ$")>; 622 def : InstRW<[WLat1, FXb2, LSU, GroupAlone], (instregex "STPQ$")>; 623 624 // Load pair disjoint 625 def : InstRW<[WLat1LSU, WLat1LSU, LSU2, GroupAlone], (instregex "LPD(G)?$")>; 626 627 //===----------------------------------------------------------------------===// 628 // Translate and convert 629 //===----------------------------------------------------------------------===// 630 631 def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "TR$")>; 632 def : InstRW<[WLat30, WLat30, WLat30, FXa3, LSU2, GroupAlone], 633 (instregex "TRT$")>; 634 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TRTR$")>; 635 def : InstRW<[WLat30, WLat30, MCD], (instregex "TRE$")>; 636 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TRT(R)?E(Opt)?$")>; 637 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TR(T|O)(T|O)(Opt)?$")>; 638 def : InstRW<[WLat30, WLat30, WLat30, MCD], 639 (instregex "CU(12|14|21|24|41|42)(Opt)?$")>; 640 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "(CUUTF|CUTFU)(Opt)?$")>; 641 642 //===----------------------------------------------------------------------===// 643 // Message-security assist 644 //===----------------------------------------------------------------------===// 645 646 def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], 647 (instregex "KM(C|F|O|CTR|A)?$")>; 648 def : InstRW<[WLat30, WLat30, WLat30, MCD], 649 (instregex "(KIMD|KLMD|KMAC)$")>; 650 def : InstRW<[WLat30, WLat30, WLat30, MCD], 651 (instregex "(PCC|PPNO|PRNO)$")>; 652 653 //===----------------------------------------------------------------------===// 654 // Guarded storage 655 //===----------------------------------------------------------------------===// 656 657 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LGG$")>; 658 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLGFSG$")>; 659 def : InstRW<[WLat30, MCD], (instregex "(L|ST)GSC$")>; 660 661 //===----------------------------------------------------------------------===// 662 // Decimal arithmetic 663 //===----------------------------------------------------------------------===// 664 665 def : InstRW<[WLat30, RegReadAdv, FXb, VecDF2, LSU2, GroupAlone], 666 (instregex "CVBG$")>; 667 def : InstRW<[WLat30, RegReadAdv, FXb, VecDF, LSU, GroupAlone], 668 (instregex "CVB(Y)?$")>; 669 def : InstRW<[WLat1, FXb3, VecDF4, LSU, GroupAlone], (instregex "CVDG$")>; 670 def : InstRW<[WLat1, FXb2, VecDF, LSU, GroupAlone], (instregex "CVD(Y)?$")>; 671 def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "MV(N|O|Z)$")>; 672 def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "(PACK|PKA|PKU)$")>; 673 def : InstRW<[WLat12, LSU5, GroupAlone], (instregex "UNPK(A|U)$")>; 674 def : InstRW<[WLat1, FXb, LSU2, Cracked], (instregex "UNPK$")>; 675 676 def : InstRW<[WLat5LSU, FXb, VecDFX, LSU3, GroupAlone], 677 (instregex "(A|S|ZA)P$")>; 678 def : InstRW<[WLat1, FXb, VecDFX4, LSU3, GroupAlone], (instregex "(M|D)P$")>; 679 def : InstRW<[WLat15, FXb, VecDFX2, LSU2, GroupAlone], (instregex "SRP$")>; 680 def : InstRW<[WLat8, VecDFX, LSU, LSU, GroupAlone], (instregex "CP$")>; 681 def : InstRW<[WLat3LSU, VecDFX, LSU, Cracked], (instregex "TP$")>; 682 def : InstRW<[WLat30, MCD], (instregex "ED(MK)?$")>; 683 684 //===----------------------------------------------------------------------===// 685 // Access registers 686 //===----------------------------------------------------------------------===// 687 688 // Extract/set/copy access register 689 def : InstRW<[WLat3, LSU, NormalGr], (instregex "(EAR|SAR|CPYA)$")>; 690 691 // Load address extended 692 def : InstRW<[WLat5, LSU, FXa, Cracked], (instregex "LAE(Y)?$")>; 693 694 // Load/store access multiple (not modeled precisely) 695 def : InstRW<[WLat20, WLat20, LSU5, GroupAlone], (instregex "LAM(Y)?$")>; 696 def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "STAM(Y)?$")>; 697 698 //===----------------------------------------------------------------------===// 699 // Program mask and addressing mode 700 //===----------------------------------------------------------------------===// 701 702 // Insert Program Mask 703 def : InstRW<[WLat3, FXa, EndGroup], (instregex "IPM$")>; 704 705 // Set Program Mask 706 def : InstRW<[WLat3, LSU, EndGroup], (instregex "SPM$")>; 707 708 // Branch and link 709 def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "BAL(R)?$")>; 710 711 // Test addressing mode 712 def : InstRW<[WLat1, FXb, NormalGr], (instregex "TAM$")>; 713 714 // Set addressing mode 715 def : InstRW<[WLat1, FXb, EndGroup], (instregex "SAM(24|31|64)$")>; 716 717 // Branch (and save) and set mode. 718 def : InstRW<[WLat1, FXa, FXb, GroupAlone], (instregex "BSM$")>; 719 def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "BASSM$")>; 720 721 //===----------------------------------------------------------------------===// 722 // Transactional execution 723 //===----------------------------------------------------------------------===// 724 725 // Transaction begin 726 def : InstRW<[WLat9, LSU2, FXb5, GroupAlone], (instregex "TBEGIN(C)?$")>; 727 728 // Transaction end 729 def : InstRW<[WLat1, FXb, GroupAlone], (instregex "TEND$")>; 730 731 // Transaction abort 732 def : InstRW<[WLat30, MCD], (instregex "TABORT$")>; 733 734 // Extract Transaction Nesting Depth 735 def : InstRW<[WLat1, FXa, NormalGr], (instregex "ETND$")>; 736 737 // Nontransactional store 738 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "NTSTG$")>; 739 740 //===----------------------------------------------------------------------===// 741 // Processor assist 742 //===----------------------------------------------------------------------===// 743 744 def : InstRW<[WLat1, FXb, GroupAlone], (instregex "PPA$")>; 745 746 //===----------------------------------------------------------------------===// 747 // Miscellaneous Instructions. 748 //===----------------------------------------------------------------------===// 749 750 // Find leftmost one 751 def : InstRW<[WLat5, WLat5, FXa2, GroupAlone], (instregex "FLOGR$")>; 752 753 // Population count 754 def : InstRW<[WLat3, WLat3, FXa, NormalGr], (instregex "POPCNT$")>; 755 756 // String instructions 757 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "SRST(U)?$")>; 758 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CUSE$")>; 759 760 // Various complex instructions 761 def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], (instregex "CFC$")>; 762 def : InstRW<[WLat30, WLat30, WLat30, WLat30, WLat30, WLat30, MCD], 763 (instregex "UPT$")>; 764 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CKSM$")>; 765 def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], (instregex "CMPSC$")>; 766 767 // Execute 768 def : InstRW<[WLat1, FXb, GroupAlone], (instregex "EX(RL)?$")>; 769 770 //===----------------------------------------------------------------------===// 771 // .insn directive instructions 772 //===----------------------------------------------------------------------===// 773 774 // An "empty" sched-class will be assigned instead of the "invalid sched-class". 775 // getNumDecoderSlots() will then return 1 instead of 0. 776 def : InstRW<[], (instregex "Insn.*")>; 777 778 779 // ----------------------------- Floating point ----------------------------- // 780 781 //===----------------------------------------------------------------------===// 782 // FP: Move instructions 783 //===----------------------------------------------------------------------===// 784 785 // Load zero 786 def : InstRW<[WLat1, FXb, NormalGr], (instregex "LZ(DR|ER)$")>; 787 def : InstRW<[WLat2, FXb2, Cracked], (instregex "LZXR$")>; 788 789 // Load 790 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "LER$")>; 791 def : InstRW<[WLat1, FXb, NormalGr], (instregex "LD(R|R32|GR)$")>; 792 def : InstRW<[WLat3, FXb, NormalGr], (instregex "LGDR$")>; 793 def : InstRW<[WLat2, FXb2, GroupAlone], (instregex "LXR$")>; 794 795 // Load and Test 796 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "LT(E|D)BR$")>; 797 def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "LT(E|D)BRCompare$")>; 798 def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], 799 (instregex "LTXBR(Compare)?$")>; 800 801 // Copy sign 802 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "CPSDR(d|s)(d|s)$")>; 803 804 //===----------------------------------------------------------------------===// 805 // FP: Load instructions 806 //===----------------------------------------------------------------------===// 807 808 def : InstRW<[WLat2LSU, VecXsPm, LSU, NormalGr], (instregex "LE(Y)?$")>; 809 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LD(Y|E32)?$")>; 810 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LX$")>; 811 812 //===----------------------------------------------------------------------===// 813 // FP: Store instructions 814 //===----------------------------------------------------------------------===// 815 816 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "ST(E|D)(Y)?$")>; 817 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STX$")>; 818 819 //===----------------------------------------------------------------------===// 820 // FP: Conversion instructions 821 //===----------------------------------------------------------------------===// 822 823 // Load rounded 824 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "LEDBR(A)?$")>; 825 def : InstRW<[WLat9, VecDF2, NormalGr], (instregex "L(E|D)XBR(A)?$")>; 826 827 // Load lengthened 828 def : InstRW<[WLat7LSU, VecBF, LSU, NormalGr], (instregex "LDEB$")>; 829 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "LDEBR$")>; 830 def : InstRW<[WLat8LSU, VecBF4, LSU, GroupAlone], (instregex "LX(E|D)B$")>; 831 def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "LX(E|D)BR$")>; 832 833 // Convert from fixed / logical 834 def : InstRW<[WLat8, FXb, VecBF, Cracked], (instregex "C(E|D)(F|G)BR(A)?$")>; 835 def : InstRW<[WLat11, FXb, VecDF4, GroupAlone], (instregex "CX(F|G)BR(A)?$")>; 836 def : InstRW<[WLat8, FXb, VecBF, Cracked], (instregex "C(E|D)L(F|G)BR$")>; 837 def : InstRW<[WLat11, FXb, VecDF4, GroupAlone], (instregex "CXL(F|G)BR$")>; 838 839 // Convert to fixed / logical 840 def : InstRW<[WLat10, WLat10, FXb, VecBF, Cracked], 841 (instregex "C(F|G)(E|D)BR(A)?$")>; 842 def : InstRW<[WLat12, WLat12, FXb, VecDF2, Cracked], 843 (instregex "C(F|G)XBR(A)?$")>; 844 def : InstRW<[WLat10, WLat10, FXb, VecBF, GroupAlone], (instregex "CLFEBR$")>; 845 def : InstRW<[WLat10, WLat10, FXb, VecBF, Cracked], (instregex "CLFDBR$")>; 846 def : InstRW<[WLat10, WLat10, FXb, VecBF, Cracked], (instregex "CLG(E|D)BR$")>; 847 def : InstRW<[WLat12, WLat12, FXb, VecDF2, Cracked], (instregex "CL(F|G)XBR$")>; 848 849 //===----------------------------------------------------------------------===// 850 // FP: Unary arithmetic 851 //===----------------------------------------------------------------------===// 852 853 // Load Complement / Negative / Positive 854 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "L(C|N|P)(E|D)BR$")>; 855 def : InstRW<[WLat1, FXb, NormalGr], (instregex "L(C|N|P)DFR(_32)?$")>; 856 def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "L(C|N|P)XBR$")>; 857 858 // Square root 859 def : InstRW<[WLat30, VecFPd, LSU, NormalGr], (instregex "SQ(E|D)B$")>; 860 def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "SQ(E|D)BR$")>; 861 def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "SQXBR$")>; 862 863 // Load FP integer 864 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "FI(E|D)BR(A)?$")>; 865 def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "FIXBR(A)?$")>; 866 867 //===----------------------------------------------------------------------===// 868 // FP: Binary arithmetic 869 //===----------------------------------------------------------------------===// 870 871 // Addition 872 def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr], 873 (instregex "A(E|D)B$")>; 874 def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "A(E|D)BR$")>; 875 def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "AXBR$")>; 876 877 // Subtraction 878 def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr], 879 (instregex "S(E|D)B$")>; 880 def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "S(E|D)BR$")>; 881 def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "SXBR$")>; 882 883 // Multiply 884 def : InstRW<[WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr], 885 (instregex "M(D|DE|EE)B$")>; 886 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "M(D|DE|EE)BR$")>; 887 def : InstRW<[WLat8LSU, RegReadAdv, VecBF4, LSU, GroupAlone], 888 (instregex "MXDB$")>; 889 def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "MXDBR$")>; 890 def : InstRW<[WLat20, VecDF4, GroupAlone], (instregex "MXBR$")>; 891 892 // Multiply and add / subtract 893 def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone], 894 (instregex "M(A|S)EB$")>; 895 def : InstRW<[WLat7, VecBF, GroupAlone], (instregex "M(A|S)EBR$")>; 896 def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone], 897 (instregex "M(A|S)DB$")>; 898 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "M(A|S)DBR$")>; 899 900 // Division 901 def : InstRW<[WLat30, RegReadAdv, VecFPd, LSU, NormalGr], 902 (instregex "D(E|D)B$")>; 903 def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "D(E|D)BR$")>; 904 def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "DXBR$")>; 905 906 // Divide to integer 907 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "DI(E|D)BR$")>; 908 909 //===----------------------------------------------------------------------===// 910 // FP: Comparisons 911 //===----------------------------------------------------------------------===// 912 913 // Compare 914 def : InstRW<[WLat3LSU, RegReadAdv, VecXsPm, LSU, NormalGr], 915 (instregex "(K|C)(E|D)B$")>; 916 def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "(K|C)(E|D)BR$")>; 917 def : InstRW<[WLat9, VecDF2, GroupAlone], (instregex "(K|C)XBR$")>; 918 919 // Test Data Class 920 def : InstRW<[WLat5, LSU, VecXsPm, NormalGr], (instregex "TC(E|D)B$")>; 921 def : InstRW<[WLat10, LSU2, VecDF4, GroupAlone], (instregex "TCXB$")>; 922 923 //===----------------------------------------------------------------------===// 924 // FP: Floating-point control register instructions 925 //===----------------------------------------------------------------------===// 926 927 def : InstRW<[WLat4, FXa, LSU, GroupAlone], (instregex "EFPC$")>; 928 def : InstRW<[WLat1, FXb, LSU, GroupAlone], (instregex "STFPC$")>; 929 def : InstRW<[WLat3, LSU, GroupAlone], (instregex "SFPC$")>; 930 def : InstRW<[WLat3LSU, LSU2, GroupAlone], (instregex "LFPC$")>; 931 def : InstRW<[WLat30, MCD], (instregex "SFASR$")>; 932 def : InstRW<[WLat30, MCD], (instregex "LFAS$")>; 933 def : InstRW<[WLat3, FXb, GroupAlone], (instregex "SRNM(B|T)?$")>; 934 935 936 // --------------------- Hexadecimal floating point ------------------------- // 937 938 //===----------------------------------------------------------------------===// 939 // HFP: Move instructions 940 //===----------------------------------------------------------------------===// 941 942 // Load and Test 943 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "LT(E|D)R$")>; 944 def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "LTXR$")>; 945 946 //===----------------------------------------------------------------------===// 947 // HFP: Conversion instructions 948 //===----------------------------------------------------------------------===// 949 950 // Load rounded 951 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "(LEDR|LRER)$")>; 952 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "LEXR$")>; 953 def : InstRW<[WLat9, VecDF2, NormalGr], (instregex "(LDXR|LRDR)$")>; 954 955 // Load lengthened 956 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LDE$")>; 957 def : InstRW<[WLat1, FXb, NormalGr], (instregex "LDER$")>; 958 def : InstRW<[WLat8LSU, VecBF4, LSU, GroupAlone], (instregex "LX(E|D)$")>; 959 def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "LX(E|D)R$")>; 960 961 // Convert from fixed 962 def : InstRW<[WLat8, FXb, VecBF, Cracked], (instregex "C(E|D)(F|G)R$")>; 963 def : InstRW<[WLat11, FXb, VecDF4, GroupAlone], (instregex "CX(F|G)R$")>; 964 965 // Convert to fixed 966 def : InstRW<[WLat10, WLat10, FXb, VecBF, Cracked], (instregex "C(F|G)(E|D)R$")>; 967 def : InstRW<[WLat12, WLat12, FXb, VecDF2, Cracked], (instregex "C(F|G)XR$")>; 968 969 // Convert BFP to HFP / HFP to BFP. 970 def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "THD(E)?R$")>; 971 def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "TB(E)?DR$")>; 972 973 //===----------------------------------------------------------------------===// 974 // HFP: Unary arithmetic 975 //===----------------------------------------------------------------------===// 976 977 // Load Complement / Negative / Positive 978 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "L(C|N|P)(E|D)R$")>; 979 def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "L(C|N|P)XR$")>; 980 981 // Halve 982 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "H(E|D)R$")>; 983 984 // Square root 985 def : InstRW<[WLat30, VecFPd, LSU, NormalGr], (instregex "SQ(E|D)$")>; 986 def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "SQ(E|D)R$")>; 987 def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "SQXR$")>; 988 989 // Load FP integer 990 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "FI(E|D)R$")>; 991 def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "FIXR$")>; 992 993 //===----------------------------------------------------------------------===// 994 // HFP: Binary arithmetic 995 //===----------------------------------------------------------------------===// 996 997 // Addition 998 def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr], 999 (instregex "A(E|D|U|W)$")>; 1000 def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "A(E|D|U|W)R$")>; 1001 def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "AXR$")>; 1002 1003 // Subtraction 1004 def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr], 1005 (instregex "S(E|D|U|W)$")>; 1006 def : InstRW<[WLat7, WLat7, VecBF, NormalGr], (instregex "S(E|D|U|W)R$")>; 1007 def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "SXR$")>; 1008 1009 // Multiply 1010 def : InstRW<[WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr], 1011 (instregex "M(D|DE|E|EE)$")>; 1012 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "M(D|DE|E|EE)R$")>; 1013 def : InstRW<[WLat8LSU, RegReadAdv, VecBF4, LSU, GroupAlone], 1014 (instregex "MXD$")>; 1015 def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "MXDR$")>; 1016 def : InstRW<[WLat30, VecDF4, GroupAlone], (instregex "MXR$")>; 1017 def : InstRW<[WLat8LSU, RegReadAdv, VecBF4, LSU, GroupAlone], (instregex "MY$")>; 1018 def : InstRW<[WLat7LSU, RegReadAdv, VecBF2, LSU, GroupAlone], 1019 (instregex "MY(H|L)$")>; 1020 def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "MYR$")>; 1021 def : InstRW<[WLat7, VecBF, GroupAlone], (instregex "MY(H|L)R$")>; 1022 1023 // Multiply and add / subtract 1024 def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone], 1025 (instregex "M(A|S)(E|D)$")>; 1026 def : InstRW<[WLat7, VecBF, GroupAlone], (instregex "M(A|S)(E|D)R$")>; 1027 def : InstRW<[WLat8LSU, RegReadAdv, RegReadAdv, VecBF4, LSU, GroupAlone], 1028 (instregex "MAY$")>; 1029 def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, VecBF2, LSU, GroupAlone], 1030 (instregex "MAY(H|L)$")>; 1031 def : InstRW<[WLat8, VecBF4, GroupAlone], (instregex "MAYR$")>; 1032 def : InstRW<[WLat7, VecBF, GroupAlone], (instregex "MAY(H|L)R$")>; 1033 1034 // Division 1035 def : InstRW<[WLat30, RegReadAdv, VecFPd, LSU, NormalGr], (instregex "D(E|D)$")>; 1036 def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "D(E|D)R$")>; 1037 def : InstRW<[WLat30, VecFPd, GroupAlone], (instregex "DXR$")>; 1038 1039 //===----------------------------------------------------------------------===// 1040 // HFP: Comparisons 1041 //===----------------------------------------------------------------------===// 1042 1043 // Compare 1044 def : InstRW<[WLat7LSU, RegReadAdv, VecBF, LSU, NormalGr], 1045 (instregex "C(E|D)$")>; 1046 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "C(E|D)R$")>; 1047 def : InstRW<[WLat10, VecDF2, GroupAlone], (instregex "CXR$")>; 1048 1049 1050 // ------------------------ Decimal floating point -------------------------- // 1051 1052 //===----------------------------------------------------------------------===// 1053 // DFP: Move instructions 1054 //===----------------------------------------------------------------------===// 1055 1056 // Load and Test 1057 def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "LTDTR$")>; 1058 def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "LTXTR$")>; 1059 1060 //===----------------------------------------------------------------------===// 1061 // DFP: Conversion instructions 1062 //===----------------------------------------------------------------------===// 1063 1064 // Load rounded 1065 def : InstRW<[WLat15, VecDF, NormalGr], (instregex "LEDTR$")>; 1066 def : InstRW<[WLat15, VecDF2, NormalGr], (instregex "LDXTR$")>; 1067 1068 // Load lengthened 1069 def : InstRW<[WLat8, VecDF, NormalGr], (instregex "LDETR$")>; 1070 def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "LXDTR$")>; 1071 1072 // Convert from fixed / logical 1073 def : InstRW<[WLat30, FXb, VecDF, Cracked], (instregex "CD(F|G)TR(A)?$")>; 1074 def : InstRW<[WLat30, FXb, VecDF4, GroupAlone], (instregex "CX(F|G)TR(A)?$")>; 1075 def : InstRW<[WLat30, FXb, VecDF, Cracked], (instregex "CDL(F|G)TR$")>; 1076 def : InstRW<[WLat30, FXb, VecDF4, GroupAlone], (instregex "CXL(F|G)TR$")>; 1077 1078 // Convert to fixed / logical 1079 def : InstRW<[WLat30, WLat30, FXb, VecDF, Cracked], 1080 (instregex "C(F|G)DTR(A)?$")>; 1081 def : InstRW<[WLat30, WLat30, FXb, VecDF2, Cracked], 1082 (instregex "C(F|G)XTR(A)?$")>; 1083 def : InstRW<[WLat30, WLat30, FXb, VecDF, Cracked], (instregex "CL(F|G)DTR$")>; 1084 def : InstRW<[WLat30, WLat30, FXb, VecDF2, Cracked], (instregex "CL(F|G)XTR$")>; 1085 1086 // Convert from / to signed / unsigned packed 1087 def : InstRW<[WLat9, FXb, VecDF, Cracked], (instregex "CD(S|U)TR$")>; 1088 def : InstRW<[WLat12, FXb2, VecDF4, GroupAlone], (instregex "CX(S|U)TR$")>; 1089 def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "C(S|U)DTR$")>; 1090 def : InstRW<[WLat15, FXb2, VecDF4, GroupAlone], (instregex "C(S|U)XTR$")>; 1091 1092 // Convert from / to zoned 1093 def : InstRW<[WLat8LSU, LSU, VecDF, Cracked], (instregex "CDZT$")>; 1094 def : InstRW<[WLat16LSU, LSU2, VecDF4, GroupAlone], (instregex "CXZT$")>; 1095 def : InstRW<[WLat1, FXb, LSU, VecDF, Cracked], (instregex "CZDT$")>; 1096 def : InstRW<[WLat1, FXb, LSU, VecDF2, GroupAlone], (instregex "CZXT$")>; 1097 1098 // Convert from / to packed 1099 def : InstRW<[WLat8LSU, LSU, VecDF, Cracked], (instregex "CDPT$")>; 1100 def : InstRW<[WLat16LSU, LSU2, VecDF4, GroupAlone], (instregex "CXPT$")>; 1101 def : InstRW<[WLat1, FXb, LSU, VecDF, Cracked], (instregex "CPDT$")>; 1102 def : InstRW<[WLat1, FXb, LSU, VecDF2, GroupAlone], (instregex "CPXT$")>; 1103 1104 // Perform floating-point operation 1105 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "PFPO$")>; 1106 1107 //===----------------------------------------------------------------------===// 1108 // DFP: Unary arithmetic 1109 //===----------------------------------------------------------------------===// 1110 1111 // Load FP integer 1112 def : InstRW<[WLat8, VecDF, NormalGr], (instregex "FIDTR$")>; 1113 def : InstRW<[WLat10, VecDF4, GroupAlone], (instregex "FIXTR$")>; 1114 1115 // Extract biased exponent 1116 def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "EEDTR$")>; 1117 def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "EEXTR$")>; 1118 1119 // Extract significance 1120 def : InstRW<[WLat11, FXb, VecDF, Cracked], (instregex "ESDTR$")>; 1121 def : InstRW<[WLat12, FXb, VecDF2, Cracked], (instregex "ESXTR$")>; 1122 1123 //===----------------------------------------------------------------------===// 1124 // DFP: Binary arithmetic 1125 //===----------------------------------------------------------------------===// 1126 1127 // Addition 1128 def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "ADTR(A)?$")>; 1129 def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "AXTR(A)?$")>; 1130 1131 // Subtraction 1132 def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "SDTR(A)?$")>; 1133 def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "SXTR(A)?$")>; 1134 1135 // Multiply 1136 def : InstRW<[WLat30, VecDF, NormalGr], (instregex "MDTR(A)?$")>; 1137 def : InstRW<[WLat30, VecDF4, GroupAlone], (instregex "MXTR(A)?$")>; 1138 1139 // Division 1140 def : InstRW<[WLat30, VecDF, NormalGr], (instregex "DDTR(A)?$")>; 1141 def : InstRW<[WLat30, VecDF4, GroupAlone], (instregex "DXTR(A)?$")>; 1142 1143 // Quantize 1144 def : InstRW<[WLat8, WLat8, VecDF, NormalGr], (instregex "QADTR$")>; 1145 def : InstRW<[WLat10, WLat10, VecDF4, GroupAlone], (instregex "QAXTR$")>; 1146 1147 // Reround 1148 def : InstRW<[WLat9, WLat9, FXb, VecDF, Cracked], (instregex "RRDTR$")>; 1149 def : InstRW<[WLat11, WLat11, FXb, VecDF4, GroupAlone], (instregex "RRXTR$")>; 1150 1151 // Shift significand left/right 1152 def : InstRW<[WLat11LSU, LSU, VecDF, GroupAlone], (instregex "S(L|R)DT$")>; 1153 def : InstRW<[WLat11LSU, LSU, VecDF4, GroupAlone], (instregex "S(L|R)XT$")>; 1154 1155 // Insert biased exponent 1156 def : InstRW<[WLat9, FXb, VecDF, Cracked], (instregex "IEDTR$")>; 1157 def : InstRW<[WLat11, FXb, VecDF4, GroupAlone], (instregex "IEXTR$")>; 1158 1159 //===----------------------------------------------------------------------===// 1160 // DFP: Comparisons 1161 //===----------------------------------------------------------------------===// 1162 1163 // Compare 1164 def : InstRW<[WLat8, VecDF, NormalGr], (instregex "(K|C)DTR$")>; 1165 def : InstRW<[WLat9, VecDF2, GroupAlone], (instregex "(K|C)XTR$")>; 1166 1167 // Compare biased exponent 1168 def : InstRW<[WLat8, VecDF, NormalGr], (instregex "CEDTR$")>; 1169 def : InstRW<[WLat8, VecDF, NormalGr], (instregex "CEXTR$")>; 1170 1171 // Test Data Class/Group 1172 def : InstRW<[WLat15, LSU, VecDF, NormalGr], (instregex "TD(C|G)(E|D)T$")>; 1173 def : InstRW<[WLat15, LSU, VecDF2, GroupAlone], (instregex "TD(C|G)XT$")>; 1174 1175 1176 // --------------------------------- Vector --------------------------------- // 1177 1178 //===----------------------------------------------------------------------===// 1179 // Vector: Move instructions 1180 //===----------------------------------------------------------------------===// 1181 1182 def : InstRW<[WLat1, FXb, NormalGr], (instregex "VLR(32|64)?$")>; 1183 def : InstRW<[WLat3, FXb, NormalGr], (instregex "VLGV(B|F|G|H)?$")>; 1184 def : InstRW<[WLat1, FXb, NormalGr], (instregex "VLVG(B|F|G|H)?$")>; 1185 def : InstRW<[WLat3, FXb, NormalGr], (instregex "VLVGP(32)?$")>; 1186 1187 //===----------------------------------------------------------------------===// 1188 // Vector: Immediate instructions 1189 //===----------------------------------------------------------------------===// 1190 1191 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VZERO$")>; 1192 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VONE$")>; 1193 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VGBM$")>; 1194 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VGM(B|F|G|H)?$")>; 1195 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VREPI(B|F|G|H)?$")>; 1196 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VLEI(B|F|G|H)$")>; 1197 1198 //===----------------------------------------------------------------------===// 1199 // Vector: Loads 1200 //===----------------------------------------------------------------------===// 1201 1202 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VL(BB)?$")>; 1203 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLL$")>; 1204 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VL(32|64)$")>; 1205 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLLEZ(B|F|G|H|LF)?$")>; 1206 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLREP(B|F|G|H)?$")>; 1207 def : InstRW<[WLat2LSU, RegReadAdv, VecXsPm, LSU, NormalGr], 1208 (instregex "VLE(B|F|G|H)$")>; 1209 def : InstRW<[WLat5LSU, RegReadAdv, FXb, LSU, VecXsPm, Cracked], 1210 (instregex "VGE(F|G)$")>; 1211 def : InstRW<[WLat4LSU, WLat4LSU, LSU5, GroupAlone], (instregex "VLM$")>; 1212 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "VLRL(R)?$")>; 1213 1214 //===----------------------------------------------------------------------===// 1215 // Vector: Stores 1216 //===----------------------------------------------------------------------===// 1217 1218 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VST(L|32|64)?$")>; 1219 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VSTE(F|G)$")>; 1220 def : InstRW<[WLat1, FXb, LSU, VecXsPm, Cracked], (instregex "VSTE(B|H)$")>; 1221 def : InstRW<[WLat1, LSU2, FXb3, GroupAlone], (instregex "VSTM$")>; 1222 def : InstRW<[WLat1, FXb2, LSU, Cracked], (instregex "VSCE(F|G)$")>; 1223 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "VSTRL(R)?$")>; 1224 1225 //===----------------------------------------------------------------------===// 1226 // Vector: Selects and permutes 1227 //===----------------------------------------------------------------------===// 1228 1229 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMRH(B|F|G|H)?$")>; 1230 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMRL(B|F|G|H)?$")>; 1231 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPERM$")>; 1232 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPDI$")>; 1233 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VBPERM$")>; 1234 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VREP(B|F|G|H)?$")>; 1235 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSEL$")>; 1236 1237 //===----------------------------------------------------------------------===// 1238 // Vector: Widening and narrowing 1239 //===----------------------------------------------------------------------===// 1240 1241 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPK(F|G|H)?$")>; 1242 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPKS(F|G|H)?$")>; 1243 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VPKS(F|G|H)S$")>; 1244 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPKLS(F|G|H)?$")>; 1245 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VPKLS(F|G|H)S$")>; 1246 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSEG(B|F|H)?$")>; 1247 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPH(B|F|H)?$")>; 1248 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPL(B|F)?$")>; 1249 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPLH(B|F|H|W)?$")>; 1250 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VUPLL(B|F|H)?$")>; 1251 1252 //===----------------------------------------------------------------------===// 1253 // Vector: Integer arithmetic 1254 //===----------------------------------------------------------------------===// 1255 1256 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VA(B|F|G|H|Q|C|CQ)?$")>; 1257 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VACC(B|F|G|H|Q|C|CQ)?$")>; 1258 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VAVG(B|F|G|H)?$")>; 1259 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VAVGL(B|F|G|H)?$")>; 1260 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VN(C|O|N|X)?$")>; 1261 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VO(C)?$")>; 1262 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VCKSM$")>; 1263 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCLZ(B|F|G|H)?$")>; 1264 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCTZ(B|F|G|H)?$")>; 1265 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VX$")>; 1266 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VGFM?$")>; 1267 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VGFMA(B|F|G|H)?$")>; 1268 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VGFM(B|F|G|H)$")>; 1269 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VLC(B|F|G|H)?$")>; 1270 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VLP(B|F|G|H)?$")>; 1271 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMX(B|F|G|H)?$")>; 1272 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMXL(B|F|G|H)?$")>; 1273 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMN(B|F|G|H)?$")>; 1274 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VMNL(B|F|G|H)?$")>; 1275 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAL(B|F)?$")>; 1276 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMALE(B|F|H)?$")>; 1277 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMALH(B|F|H|W)?$")>; 1278 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMALO(B|F|H)?$")>; 1279 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAO(B|F|H)?$")>; 1280 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAE(B|F|H)?$")>; 1281 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMAH(B|F|H)?$")>; 1282 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VME(B|F|H)?$")>; 1283 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMH(B|F|H)?$")>; 1284 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VML(B|F)?$")>; 1285 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMLE(B|F|H)?$")>; 1286 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMLH(B|F|H|W)?$")>; 1287 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMLO(B|F|H)?$")>; 1288 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VMO(B|F|H)?$")>; 1289 def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VMSL(G)?$")>; 1290 1291 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VPOPCT(B|F|G|H)?$")>; 1292 1293 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VERLL(B|F|G|H)?$")>; 1294 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VERLLV(B|F|G|H)?$")>; 1295 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VERIM(B|F|G|H)?$")>; 1296 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESL(B|F|G|H)?$")>; 1297 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESLV(B|F|G|H)?$")>; 1298 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRA(B|F|G|H)?$")>; 1299 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRAV(B|F|G|H)?$")>; 1300 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRL(B|F|G|H)?$")>; 1301 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VESRLV(B|F|G|H)?$")>; 1302 1303 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSL(DB)?$")>; 1304 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSLB$")>; 1305 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSR(A|L)$")>; 1306 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSR(A|L)B$")>; 1307 1308 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSB(I|IQ|CBI|CBIQ)?$")>; 1309 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VSCBI(B|F|G|H|Q)?$")>; 1310 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VS(F|G|H|Q)?$")>; 1311 1312 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VSUM(B|H)?$")>; 1313 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VSUMG(F|H)?$")>; 1314 def : InstRW<[WLat4, VecMul, NormalGr], (instregex "VSUMQ(F|G)?$")>; 1315 1316 //===----------------------------------------------------------------------===// 1317 // Vector: Integer comparison 1318 //===----------------------------------------------------------------------===// 1319 1320 def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "VEC(B|F|G|H)?$")>; 1321 def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "VECL(B|F|G|H)?$")>; 1322 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H)?$")>; 1323 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H)S$")>; 1324 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCH(B|F|G|H)?$")>; 1325 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCH(B|F|G|H)S$")>; 1326 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCHL(B|F|G|H)?$")>; 1327 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCHL(B|F|G|H)S$")>; 1328 def : InstRW<[WLat4, VecStr, NormalGr], (instregex "VTM$")>; 1329 1330 //===----------------------------------------------------------------------===// 1331 // Vector: Floating-point arithmetic 1332 //===----------------------------------------------------------------------===// 1333 1334 // Conversion and rounding 1335 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "VCD(L)?G$")>; 1336 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "VCD(L)?GB$")>; 1337 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WCD(L)?GB$")>; 1338 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "VC(L)?GD$")>; 1339 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "VC(L)?GDB$")>; 1340 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WC(L)?GDB$")>; 1341 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "VL(DE|ED)$")>; 1342 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "VL(DE|ED)B$")>; 1343 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WL(DE|ED)B$")>; 1344 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "VFL(L|R)$")>; 1345 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "VFL(LS|RD)$")>; 1346 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WFL(LS|RD)$")>; 1347 def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "WFLLD$")>; 1348 def : InstRW<[WLat10, VecDF2, NormalGr], (instregex "WFLRX$")>; 1349 def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFI$")>; 1350 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "VFIDB$")>; 1351 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WFIDB$")>; 1352 def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFISB$")>; 1353 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WFISB$")>; 1354 def : InstRW<[WLat10, VecDF2, NormalGr], (instregex "WFIXB$")>; 1355 1356 // Sign operations 1357 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VFPSO$")>; 1358 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "(V|W)FPSODB$")>; 1359 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "(V|W)FPSOSB$")>; 1360 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFPSOXB$")>; 1361 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "(V|W)FL(C|N|P)DB$")>; 1362 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "(V|W)FL(C|N|P)SB$")>; 1363 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFL(C|N|P)XB$")>; 1364 1365 // Minimum / maximum 1366 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VF(MAX|MIN)$")>; 1367 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VF(MAX|MIN)DB$")>; 1368 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WF(MAX|MIN)DB$")>; 1369 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VF(MAX|MIN)SB$")>; 1370 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WF(MAX|MIN)SB$")>; 1371 def : InstRW<[WLat2, VecDFX, NormalGr], (instregex "WF(MAX|MIN)XB$")>; 1372 1373 // Test data class 1374 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VFTCI$")>; 1375 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "(V|W)FTCIDB$")>; 1376 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "(V|W)FTCISB$")>; 1377 def : InstRW<[WLat3, WLat3, VecDFX, NormalGr], (instregex "WFTCIXB$")>; 1378 1379 // Add / subtract 1380 def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VF(A|S)$")>; 1381 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "VF(A|S)DB$")>; 1382 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WF(A|S)DB$")>; 1383 def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VF(A|S)SB$")>; 1384 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WF(A|S)SB$")>; 1385 def : InstRW<[WLat10, VecDF2, NormalGr], (instregex "WF(A|S)XB$")>; 1386 1387 // Multiply / multiply-and-add/subtract 1388 def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFM$")>; 1389 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "VFMDB$")>; 1390 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WFM(D|S)B$")>; 1391 def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VFMSB$")>; 1392 def : InstRW<[WLat20, VecDF2, NormalGr], (instregex "WFMXB$")>; 1393 def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VF(N)?M(A|S)$")>; 1394 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "VF(N)?M(A|S)DB$")>; 1395 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WF(N)?M(A|S)DB$")>; 1396 def : InstRW<[WLat8, VecBF2, NormalGr], (instregex "VF(N)?M(A|S)SB$")>; 1397 def : InstRW<[WLat7, VecBF, NormalGr], (instregex "WF(N)?M(A|S)SB$")>; 1398 def : InstRW<[WLat30, VecDF2, NormalGr], (instregex "WF(N)?M(A|S)XB$")>; 1399 1400 // Divide / square root 1401 def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "VFD$")>; 1402 def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "(V|W)FDDB$")>; 1403 def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "(V|W)FDSB$")>; 1404 def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "WFDXB$")>; 1405 def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "VFSQ$")>; 1406 def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "(V|W)FSQDB$")>; 1407 def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "(V|W)FSQSB$")>; 1408 def : InstRW<[WLat30, VecFPd, NormalGr], (instregex "WFSQXB$")>; 1409 1410 //===----------------------------------------------------------------------===// 1411 // Vector: Floating-point comparison 1412 //===----------------------------------------------------------------------===// 1413 1414 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VF(C|K)(E|H|HE)$")>; 1415 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VF(C|K)(E|H|HE)DB$")>; 1416 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFC(E|H|HE)DB$")>; 1417 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFK(E|H|HE)DB$")>; 1418 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VF(C|K)(E|H|HE)SB$")>; 1419 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFC(E|H|HE)SB$")>; 1420 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "WFK(E|H|HE)SB$")>; 1421 def : InstRW<[WLat2, VecDFX, NormalGr], (instregex "WFC(E|H|HE)XB$")>; 1422 def : InstRW<[WLat2, VecDFX, NormalGr], (instregex "WFK(E|H|HE)XB$")>; 1423 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VFC(E|H|HE)DBS$")>; 1424 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VFK(E|H|HE)DBS$")>; 1425 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], 1426 (instregex "WF(C|K)(E|H|HE)DBS$")>; 1427 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], 1428 (instregex "VF(C|K)(E|H|HE)SBS$")>; 1429 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "WFC(E|H|HE)SBS$")>; 1430 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "WFK(E|H|HE)SBS$")>; 1431 def : InstRW<[WLat3, WLat3, VecDFX, NormalGr], (instregex "WFC(E|H|HE)XBS$")>; 1432 def : InstRW<[WLat3, WLat3, VecDFX, NormalGr], (instregex "WFK(E|H|HE)XBS$")>; 1433 def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "WF(C|K)$")>; 1434 def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "WF(C|K)DB$")>; 1435 def : InstRW<[WLat3, VecXsPm, NormalGr], (instregex "WF(C|K)SB$")>; 1436 def : InstRW<[WLat3, VecDFX, NormalGr], (instregex "WF(C|K)XB$")>; 1437 1438 //===----------------------------------------------------------------------===// 1439 // Vector: Floating-point insertion and extraction 1440 //===----------------------------------------------------------------------===// 1441 1442 def : InstRW<[WLat1, FXb, NormalGr], (instregex "LEFR$")>; 1443 def : InstRW<[WLat3, FXb, NormalGr], (instregex "LFER$")>; 1444 1445 //===----------------------------------------------------------------------===// 1446 // Vector: String instructions 1447 //===----------------------------------------------------------------------===// 1448 1449 def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFAE(B)?$")>; 1450 def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFAE(F|H)$")>; 1451 def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VFAE(B|F|H)S$")>; 1452 def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFAEZ(B|F|H)$")>; 1453 def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VFAEZ(B|F|H)S$")>; 1454 def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFEE(B|F|H|ZB|ZF|ZH)?$")>; 1455 def : InstRW<[WLat4, WLat4, VecStr, NormalGr], 1456 (instregex "VFEE(B|F|H|ZB|ZF|ZH)S$")>; 1457 def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VFENE(B|F|H|ZB|ZF|ZH)?$")>; 1458 def : InstRW<[WLat4, WLat4, VecStr, NormalGr], 1459 (instregex "VFENE(B|F|H|ZB|ZF|ZH)S$")>; 1460 def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VISTR(B|F|H)?$")>; 1461 def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VISTR(B|F|H)S$")>; 1462 def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VSTRC(B|F|H)?$")>; 1463 def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VSTRC(B|F|H)S$")>; 1464 def : InstRW<[WLat3, VecStr, NormalGr], (instregex "VSTRCZ(B|F|H)$")>; 1465 def : InstRW<[WLat4, WLat4, VecStr, NormalGr], (instregex "VSTRCZ(B|F|H)S$")>; 1466 1467 //===----------------------------------------------------------------------===// 1468 // Vector: Packed-decimal instructions 1469 //===----------------------------------------------------------------------===// 1470 1471 def : InstRW<[WLat10, VecDF2, NormalGr], (instregex "VLIP$")>; 1472 def : InstRW<[WLat6, VecDFX, LSU, GroupAlone], (instregex "VPKZ$")>; 1473 def : InstRW<[WLat1, VecDFX, FXb, LSU, Cracked], (instregex "VUPKZ$")>; 1474 def : InstRW<[WLat20, WLat20, VecDF2, FXb, GroupAlone], (instregex "VCVB(G)?$")>; 1475 def : InstRW<[WLat20, WLat20, VecDF2, FXb, GroupAlone], (instregex "VCVD(G)?$")>; 1476 def : InstRW<[WLat4, WLat4, VecDFX, NormalGr], (instregex "V(A|S)P$")>; 1477 def : InstRW<[WLat30, WLat30, VecDF2, GroupAlone], (instregex "VM(S)?P$")>; 1478 def : InstRW<[WLat30, WLat30, VecDF2, GroupAlone], (instregex "V(D|R)P$")>; 1479 def : InstRW<[WLat30, WLat30, MCD], (instregex "VSDP$")>; 1480 def : InstRW<[WLat10, WLat10, VecDF2, NormalGr], (instregex "VSRP$")>; 1481 def : InstRW<[WLat4, WLat4, VecDFX, NormalGr], (instregex "VPSOP$")>; 1482 def : InstRW<[WLat2, VecDFX, NormalGr], (instregex "V(T|C)P$")>; 1483 1484 1485 // -------------------------------- System ---------------------------------- // 1486 1487 //===----------------------------------------------------------------------===// 1488 // System: Program-Status Word Instructions 1489 //===----------------------------------------------------------------------===// 1490 1491 def : InstRW<[WLat30, WLat30, MCD], (instregex "EPSW$")>; 1492 def : InstRW<[WLat20, GroupAlone], (instregex "LPSW(E)?$")>; 1493 def : InstRW<[WLat3, FXa, GroupAlone], (instregex "IPK$")>; 1494 def : InstRW<[WLat1, LSU, EndGroup], (instregex "SPKA$")>; 1495 def : InstRW<[WLat1, LSU, EndGroup], (instregex "SSM$")>; 1496 def : InstRW<[WLat1, FXb, LSU, GroupAlone], (instregex "ST(N|O)SM$")>; 1497 def : InstRW<[WLat3, FXa, NormalGr], (instregex "IAC$")>; 1498 def : InstRW<[WLat1, LSU, EndGroup], (instregex "SAC(F)?$")>; 1499 1500 //===----------------------------------------------------------------------===// 1501 // System: Control Register Instructions 1502 //===----------------------------------------------------------------------===// 1503 1504 def : InstRW<[WLat4LSU, WLat4LSU, LSU2, GroupAlone], (instregex "LCTL(G)?$")>; 1505 def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "STCT(L|G)$")>; 1506 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "E(P|S)A(I)?R$")>; 1507 def : InstRW<[WLat30, MCD], (instregex "SSA(I)?R$")>; 1508 def : InstRW<[WLat30, MCD], (instregex "ESEA$")>; 1509 1510 //===----------------------------------------------------------------------===// 1511 // System: Prefix-Register Instructions 1512 //===----------------------------------------------------------------------===// 1513 1514 def : InstRW<[WLat30, MCD], (instregex "S(T)?PX$")>; 1515 1516 //===----------------------------------------------------------------------===// 1517 // System: Storage-Key and Real Memory Instructions 1518 //===----------------------------------------------------------------------===// 1519 1520 def : InstRW<[WLat30, MCD], (instregex "ISKE$")>; 1521 def : InstRW<[WLat30, MCD], (instregex "IVSK$")>; 1522 def : InstRW<[WLat30, MCD], (instregex "SSKE(Opt)?$")>; 1523 def : InstRW<[WLat30, MCD], (instregex "RRB(E|M)$")>; 1524 def : InstRW<[WLat30, MCD], (instregex "IRBM$")>; 1525 def : InstRW<[WLat30, MCD], (instregex "PFMF$")>; 1526 def : InstRW<[WLat30, WLat30, MCD], (instregex "TB$")>; 1527 def : InstRW<[WLat30, MCD], (instregex "PGIN$")>; 1528 def : InstRW<[WLat30, MCD], (instregex "PGOUT$")>; 1529 1530 //===----------------------------------------------------------------------===// 1531 // System: Dynamic-Address-Translation Instructions 1532 //===----------------------------------------------------------------------===// 1533 1534 def : InstRW<[WLat30, MCD], (instregex "IPTE(Opt)?(Opt)?$")>; 1535 def : InstRW<[WLat30, MCD], (instregex "IDTE(Opt)?$")>; 1536 def : InstRW<[WLat30, MCD], (instregex "CRDTE(Opt)?$")>; 1537 def : InstRW<[WLat30, MCD], (instregex "PTLB$")>; 1538 def : InstRW<[WLat30, WLat30, MCD], (instregex "CSP(G)?$")>; 1539 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "LPTEA$")>; 1540 def : InstRW<[WLat30, WLat30, MCD], (instregex "LRA(Y|G)?$")>; 1541 def : InstRW<[WLat30, MCD], (instregex "STRAG$")>; 1542 def : InstRW<[WLat30, MCD], (instregex "LURA(G)?$")>; 1543 def : InstRW<[WLat30, MCD], (instregex "STUR(A|G)$")>; 1544 def : InstRW<[WLat30, MCD], (instregex "TPROT$")>; 1545 1546 //===----------------------------------------------------------------------===// 1547 // System: Memory-move Instructions 1548 //===----------------------------------------------------------------------===// 1549 1550 def : InstRW<[WLat4LSU, FXa2, FXb, LSU5, GroupAlone], (instregex "MVC(K|P|S)$")>; 1551 def : InstRW<[WLat1, FXa, LSU5, GroupAlone], (instregex "MVC(S|D)K$")>; 1552 def : InstRW<[WLat30, MCD], (instregex "MVCOS$")>; 1553 def : InstRW<[WLat30, MCD], (instregex "MVPG$")>; 1554 1555 //===----------------------------------------------------------------------===// 1556 // System: Address-Space Instructions 1557 //===----------------------------------------------------------------------===// 1558 1559 def : InstRW<[WLat30, MCD], (instregex "LASP$")>; 1560 def : InstRW<[WLat1, LSU, GroupAlone], (instregex "PALB$")>; 1561 def : InstRW<[WLat30, MCD], (instregex "PC$")>; 1562 def : InstRW<[WLat30, MCD], (instregex "PR$")>; 1563 def : InstRW<[WLat30, MCD], (instregex "PT(I)?$")>; 1564 def : InstRW<[WLat30, MCD], (instregex "RP$")>; 1565 def : InstRW<[WLat30, MCD], (instregex "BS(G|A)$")>; 1566 def : InstRW<[WLat30, MCD], (instregex "TAR$")>; 1567 1568 //===----------------------------------------------------------------------===// 1569 // System: Linkage-Stack Instructions 1570 //===----------------------------------------------------------------------===// 1571 1572 def : InstRW<[WLat30, MCD], (instregex "BAKR$")>; 1573 def : InstRW<[WLat30, MCD], (instregex "EREG(G)?$")>; 1574 def : InstRW<[WLat30, WLat30, MCD], (instregex "(E|M)STA$")>; 1575 1576 //===----------------------------------------------------------------------===// 1577 // System: Time-Related Instructions 1578 //===----------------------------------------------------------------------===// 1579 1580 def : InstRW<[WLat30, MCD], (instregex "PTFF$")>; 1581 def : InstRW<[WLat30, MCD], (instregex "SCK(PF|C)?$")>; 1582 def : InstRW<[WLat1, LSU2, GroupAlone], (instregex "SPT$")>; 1583 def : InstRW<[WLat15, LSU3, FXa2, FXb, GroupAlone], (instregex "STCK(F)?$")>; 1584 def : InstRW<[WLat20, LSU4, FXa2, FXb2, GroupAlone], (instregex "STCKE$")>; 1585 def : InstRW<[WLat30, MCD], (instregex "STCKC$")>; 1586 def : InstRW<[WLat1, LSU2, FXb, Cracked], (instregex "STPT$")>; 1587 1588 //===----------------------------------------------------------------------===// 1589 // System: CPU-Related Instructions 1590 //===----------------------------------------------------------------------===// 1591 1592 def : InstRW<[WLat30, MCD], (instregex "STAP$")>; 1593 def : InstRW<[WLat30, MCD], (instregex "STIDP$")>; 1594 def : InstRW<[WLat30, WLat30, MCD], (instregex "STSI$")>; 1595 def : InstRW<[WLat30, WLat30, MCD], (instregex "STFL(E)?$")>; 1596 def : InstRW<[WLat30, MCD], (instregex "ECAG$")>; 1597 def : InstRW<[WLat30, WLat30, MCD], (instregex "ECTG$")>; 1598 def : InstRW<[WLat30, MCD], (instregex "PTF$")>; 1599 def : InstRW<[WLat30, MCD], (instregex "PCKMO$")>; 1600 1601 //===----------------------------------------------------------------------===// 1602 // System: Miscellaneous Instructions 1603 //===----------------------------------------------------------------------===// 1604 1605 def : InstRW<[WLat30, MCD], (instregex "SVC$")>; 1606 def : InstRW<[WLat1, FXb, GroupAlone], (instregex "MC$")>; 1607 def : InstRW<[WLat30, MCD], (instregex "DIAG$")>; 1608 def : InstRW<[WLat1, FXb, NormalGr], (instregex "TRAC(E|G)$")>; 1609 def : InstRW<[WLat30, MCD], (instregex "TRAP(2|4)$")>; 1610 def : InstRW<[WLat30, MCD], (instregex "SIG(P|A)$")>; 1611 def : InstRW<[WLat30, MCD], (instregex "SIE$")>; 1612 1613 //===----------------------------------------------------------------------===// 1614 // System: CPU-Measurement Facility Instructions 1615 //===----------------------------------------------------------------------===// 1616 1617 def : InstRW<[WLat1, FXb, NormalGr], (instregex "LPP$")>; 1618 def : InstRW<[WLat30, WLat30, MCD], (instregex "ECPGA$")>; 1619 def : InstRW<[WLat30, WLat30, MCD], (instregex "E(C|P)CTR$")>; 1620 def : InstRW<[WLat30, MCD], (instregex "LCCTL$")>; 1621 def : InstRW<[WLat30, MCD], (instregex "L(P|S)CTL$")>; 1622 def : InstRW<[WLat30, MCD], (instregex "Q(S|CTR)I$")>; 1623 def : InstRW<[WLat30, MCD], (instregex "S(C|P)CTR$")>; 1624 1625 //===----------------------------------------------------------------------===// 1626 // System: I/O Instructions 1627 //===----------------------------------------------------------------------===// 1628 1629 def : InstRW<[WLat30, MCD], (instregex "(C|H|R|X)SCH$")>; 1630 def : InstRW<[WLat30, MCD], (instregex "(M|S|ST|T)SCH$")>; 1631 def : InstRW<[WLat30, MCD], (instregex "RCHP$")>; 1632 def : InstRW<[WLat30, MCD], (instregex "SCHM$")>; 1633 def : InstRW<[WLat30, MCD], (instregex "STC(PS|RW)$")>; 1634 def : InstRW<[WLat30, MCD], (instregex "TPI$")>; 1635 def : InstRW<[WLat30, MCD], (instregex "SAL$")>; 1636 1637 } 1638 1639