1 ; RUN: opt -basicaa -memoryssa -analyze < %s 2>&1 -S | FileCheck %s 2 ; RUN: opt -aa-pipeline=basic-aa -passes='print<memoryssa>,verify<memoryssa>' -S < %s 2>&1 | FileCheck %s 3 ; 4 ; We weren't properly considering the args in callsites in equality or hashing. 5 6 target triple = "armv7-dcg-linux-gnueabi" 7 8 ; CHECK-LABEL: define <8 x i16> @vpx_idct32_32_neon 9 define <8 x i16> @vpx_idct32_32_neon(i8* %p, <8 x i16> %v) { 10 entry: 11 ; CHECK: MemoryUse(liveOnEntry) 12 %load1 = call <8 x i16> @llvm.arm.neon.vld1.v8i16.p0i8(i8* %p, i32 2) #4 ; load CSE replacement 13 14 ; CHECK: 1 = MemoryDef(liveOnEntry) 15 call void @llvm.arm.neon.vst1.p0i8.v8i16(i8* %p, <8 x i16> %v, i32 2) #4 ; clobber 16 17 %p_next = getelementptr inbounds i8, i8* %p, i32 16 18 ; CHECK: MemoryUse(liveOnEntry) 19 %load2 = call <8 x i16> @llvm.arm.neon.vld1.v8i16.p0i8(i8* %p_next, i32 2) #4 ; non-aliasing load needed to trigger bug 20 21 ; CHECK: MemoryUse(1) 22 %load3 = call <8 x i16> @llvm.arm.neon.vld1.v8i16.p0i8(i8* %p, i32 2) #4 ; load CSE removed 23 24 %add = add <8 x i16> %load1, %load2 25 %ret = add <8 x i16> %add, %load3 26 ret <8 x i16> %ret 27 } 28 29 ; Function Attrs: argmemonly nounwind readonly 30 declare <8 x i16> @llvm.arm.neon.vld1.v8i16.p0i8(i8*, i32) #2 31 32 ; Function Attrs: argmemonly nounwind 33 declare void @llvm.arm.neon.vst1.p0i8.v8i16(i8*, <8 x i16>, i32) #1 34 35 attributes #1 = { argmemonly nounwind } 36 attributes #2 = { argmemonly nounwind readonly } 37 attributes #3 = { nounwind readnone } 38 attributes #4 = { nounwind } 39
