1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2 # RUN: llc -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s 3 4 --- | 5 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128" 6 7 define void @aextload_s32_from_s16(i16 *%addr) { ret void } 8 9 define void @aextload_s32_from_s16_not_combined(i16 *%addr) { ret void } 10 ... 11 12 --- 13 name: aextload_s32_from_s16 14 legalized: true 15 regBankSelected: true 16 17 body: | 18 bb.0: 19 liveins: $x0 20 21 ; CHECK-LABEL: name: aextload_s32_from_s16 22 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 23 ; CHECK: [[T0:%[0-9]+]]:gpr32 = LDRHHui [[COPY]], 0 :: (load 2 from %ir.addr) 24 ; CHECK: $w0 = COPY [[T0]] 25 %0:gpr(p0) = COPY $x0 26 %1:gpr(s32) = G_LOAD %0 :: (load 2 from %ir.addr) 27 $w0 = COPY %1(s32) 28 ... 29 30 --- 31 name: aextload_s32_from_s16_not_combined 32 legalized: true 33 regBankSelected: true 34 35 body: | 36 bb.0: 37 liveins: $x0 38 39 ; CHECK-LABEL: name: aextload_s32_from_s16 40 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 41 ; CHECK: [[T0:%[0-9]+]]:gpr32 = LDRHHui [[COPY]], 0 :: (load 2 from %ir.addr) 42 ; CHECK: [[T1:%[0-9]+]]:gpr32all = COPY [[T0]] 43 ; CHECK: $w0 = COPY [[T1]] 44 %0:gpr(p0) = COPY $x0 45 %1:gpr(s16) = G_LOAD %0 :: (load 2 from %ir.addr) 46 %2:gpr(s32) = G_ANYEXT %1 47 $w0 = COPY %2(s32) 48 ... 49
