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      1 ; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple | FileCheck %s
      2 
      3 ; Check that building a vector from floats doesn't insert an unnecessary
      4 ; copy for lane zero.
      5 define <4 x float>  @foo(float %a, float %b, float %c, float %d) nounwind {
      6 ; CHECK-LABEL: foo:
      7 ; CHECK-NOT: mov.s v0[0], v0[0]
      8 ; CHECK: mov.s v0[1], v1[0]
      9 ; CHECK: mov.s v0[2], v2[0]
     10 ; CHECK: mov.s v0[3], v3[0]
     11 ; CHECK: ret
     12   %1 = insertelement <4 x float> undef, float %a, i32 0
     13   %2 = insertelement <4 x float> %1, float %b, i32 1
     14   %3 = insertelement <4 x float> %2, float %c, i32 2
     15   %4 = insertelement <4 x float> %3, float %d, i32 3
     16   ret <4 x float> %4
     17 }
     18 
     19 define <8 x i16> @build_all_zero(<8 x i16> %a) #1 {
     20 ; CHECK-LABEL: build_all_zero:
     21 ; CHECK: mov	w[[GREG:[0-9]+]], #44672
     22 ; CHECK-NEXT:	fmov	s[[FREG:[0-9]+]], w[[GREG]]
     23 ; CHECK-NEXT:	mul.8h	v0, v0, v[[FREG]]
     24   %b = add <8 x i16> %a, <i16 -32768, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef>
     25   %c = mul <8 x i16> %b, <i16 -20864, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef, i16 undef>
     26   ret <8 x i16> %c
     27 }
     28 
     29 ; There is an optimization in DAG Combiner as following:
     30 ;   fold (concat_vectors (BUILD_VECTOR A, B, ...), (BUILD_VECTOR C, D, ...))
     31 ;        -> (BUILD_VECTOR A, B, ..., C, D, ...)
     32 ; This case checks when A,B and C,D are different types, there should be no
     33 ; assertion failure.
     34 define <8 x i16> @concat_2_build_vector(<4 x i16> %in0) {
     35 ; CHECK-LABEL: concat_2_build_vector:
     36 ; CHECK: movi
     37   %vshl_n = shl <4 x i16> %in0, <i16 8, i16 8, i16 8, i16 8>
     38   %vshl_n2 = shl <4 x i16> %vshl_n, <i16 9, i16 9, i16 9, i16 9>
     39   %shuffle.i = shufflevector <4 x i16> %vshl_n2, <4 x i16> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
     40   ret <8 x i16> %shuffle.i
     41 }
     42