1 ; RUN: llc < %s -mtriple=arm64-eabi -mcpu=cyclone | FileCheck %s 2 3 define i128 @shl(i128 %r, i128 %s) nounwind readnone { 4 ; CHECK-LABEL: shl: 5 ; CHECK: neg [[REV_SHIFT:x[0-9]+]], x2 6 ; CHECK: lsr [[LO_FOR_HI_NORMAL:x[0-9]+]], x0, [[REV_SHIFT]] 7 ; CHECK: cmp x2, #0 8 ; CHECK: csel [[LO_FOR_HI:x[0-9]+]], xzr, [[LO_FOR_HI_NORMAL]], eq 9 ; CHECK: lsl [[HI_FOR_HI:x[0-9]+]], x1, x2 10 ; CHECK: orr [[HI_NORMAL:x[0-9]+]], [[LO_FOR_HI]], [[HI_FOR_HI]] 11 ; CHECK: lsl [[HI_BIG_SHIFT:x[0-9]+]], x0, x2 12 ; CHECK: sub [[EXTRA_SHIFT:x[0-9]+]], x2, #64 13 ; CHECK: cmp [[EXTRA_SHIFT]], #0 14 ; CHECK: csel x1, [[HI_BIG_SHIFT]], [[HI_NORMAL]], ge 15 ; CHECK: csel x0, xzr, [[HI_BIG_SHIFT]], ge 16 ; CHECK: ret 17 18 %shl = shl i128 %r, %s 19 ret i128 %shl 20 } 21 22 define i128 @ashr(i128 %r, i128 %s) nounwind readnone { 23 ; CHECK-LABEL: ashr: 24 ; CHECK: neg [[REV_SHIFT:x[0-9]+]], x2 25 ; CHECK: lsl [[HI_FOR_LO_NORMAL:x[0-9]+]], x1, [[REV_SHIFT]] 26 ; CHECK: cmp x2, #0 27 ; CHECK: csel [[HI_FOR_LO:x[0-9]+]], xzr, [[HI_FOR_LO_NORMAL]], eq 28 ; CHECK: lsr [[LO_FOR_LO:x[0-9]+]], x0, x2 29 ; CHECK: orr [[LO_NORMAL:x[0-9]+]], [[LO_FOR_LO]], [[HI_FOR_LO]] 30 ; CHECK: asr [[LO_BIG_SHIFT:x[0-9]+]], x1, x2 31 ; CHECK: sub [[EXTRA_SHIFT:x[0-9]+]], x2, #64 32 ; CHECK: cmp [[EXTRA_SHIFT]], #0 33 ; CHECK: csel x0, [[LO_BIG_SHIFT]], [[LO_NORMAL]], ge 34 ; CHECK: asr [[BIGSHIFT_HI:x[0-9]+]], x1, #63 35 ; CHECK: csel x1, [[BIGSHIFT_HI]], [[LO_BIG_SHIFT]], ge 36 ; CHECK: ret 37 38 %shr = ashr i128 %r, %s 39 ret i128 %shr 40 } 41 42 define i128 @lshr(i128 %r, i128 %s) nounwind readnone { 43 ; CHECK-LABEL: lshr: 44 ; CHECK: neg [[REV_SHIFT:x[0-9]+]], x2 45 ; CHECK: lsl [[HI_FOR_LO_NORMAL:x[0-9]+]], x1, [[REV_SHIFT]] 46 ; CHECK: cmp x2, #0 47 ; CHECK: csel [[HI_FOR_LO:x[0-9]+]], xzr, [[HI_FOR_LO_NORMAL]], eq 48 ; CHECK: lsr [[LO_FOR_LO:x[0-9]+]], x0, x2 49 ; CHECK: orr [[LO_NORMAL:x[0-9]+]], [[LO_FOR_LO]], [[HI_FOR_LO]] 50 ; CHECK: lsr [[LO_BIG_SHIFT:x[0-9]+]], x1, x2 51 ; CHECK: cmp [[EXTRA_SHIFT]], #0 52 ; CHECK: csel x0, [[LO_BIG_SHIFT]], [[LO_NORMAL]], ge 53 ; CHECK: csel x1, xzr, [[LO_BIG_SHIFT]], ge 54 ; CHECK: ret 55 56 %shr = lshr i128 %r, %s 57 ret i128 %shr 58 } 59
