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      1 ; RUN: llc -mtriple=aarch64-eabi %s -o - | FileCheck %s
      2 
      3 ; These tests just check that the plumbing is in place for @llvm.bitreverse.
      4 
      5 declare <2 x i16> @llvm.bitreverse.v2i16(<2 x i16>) readnone
      6 
      7 define <2 x i16> @f(<2 x i16> %a) {
      8 ; CHECK-LABEL: f:
      9 ; CHECK: fmov [[REG1:w[0-9]+]], s0
     10 ; CHECK-DAG: rbit [[REG2:w[0-9]+]], [[REG1]]
     11 ; CHECK-DAG: fmov s0, [[REG2]]
     12 ; CHECK-DAG: mov [[REG3:w[0-9]+]], v0.s[1]
     13 ; CHECK-DAG: rbit [[REG4:w[0-9]+]], [[REG3]]
     14 ; CHECK-DAG: mov v0.s[1], [[REG4]]
     15 ; CHECK-DAG: ushr v0.2s, v0.2s, #16
     16   %b = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> %a)
     17   ret <2 x i16> %b
     18 }
     19 
     20 declare i8 @llvm.bitreverse.i8(i8) readnone
     21 
     22 define i8 @g(i8 %a) {
     23 ; CHECK-LABEL: g:
     24 ; CHECK: rbit [[REG:w[0-9]+]], w0
     25 ; CHECK-NEXT: lsr w0, [[REG]], #24
     26 ; CHECK-NEXT: ret
     27   %b = call i8 @llvm.bitreverse.i8(i8 %a)
     28   ret i8 %b
     29 }
     30 
     31 declare <8 x i8> @llvm.bitreverse.v8i8(<8 x i8>) readnone
     32 
     33 define <8 x i8> @g_vec(<8 x i8> %a) {
     34 ; CHECK-DAG: movi [[M1:v.*]], #15
     35 ; CHECK-DAG: movi [[M2:v.*]], #240
     36 ; CHECK:     and  [[A1:v.*]], v0.8b, [[M1]]
     37 ; CHECK:     and  [[A2:v.*]], v0.8b, [[M2]]
     38 ; CHECK-DAG: shl  [[L4:v.*]], [[A1]], #4
     39 ; CHECK-DAG: ushr [[R4:v.*]], [[A2]], #4
     40 ; CHECK-DAG: orr  [[V4:v.*]], [[R4]], [[L4]]
     41 
     42 ; CHECK-DAG: movi [[M3:v.*]], #51
     43 ; CHECK-DAG: movi [[M4:v.*]], #204
     44 ; CHECK:     and  [[A3:v.*]], [[V4]], [[M3]]
     45 ; CHECK:     and  [[A4:v.*]], [[V4]], [[M4]]
     46 ; CHECK-DAG: shl  [[L2:v.*]], [[A3]], #2
     47 ; CHECK-DAG: ushr [[R2:v.*]], [[A4]], #2
     48 ; CHECK-DAG: orr  [[V2:v.*]], [[R2]], [[L2]]
     49 
     50 ; CHECK-DAG: movi [[M5:v.*]], #85
     51 ; CHECK-DAG: movi [[M6:v.*]], #170
     52 ; CHECK:     and  [[A5:v.*]], [[V2]], [[M5]]
     53 ; CHECK:     and  [[A6:v.*]], [[V2]], [[M6]]
     54 ; CHECK-DAG: shl  [[L1:v.*]], [[A5]], #1
     55 ; CHECK-DAG: ushr [[R1:v.*]], [[A6]], #1
     56 ; CHECK:     orr  [[V1:v.*]], [[R1]], [[L1]]
     57 
     58 ; CHECK:     ret
     59   %b = call <8 x i8> @llvm.bitreverse.v8i8(<8 x i8> %a)
     60   ret <8 x i8> %b
     61 }
     62