1 ; RUN: llc -verify-machineinstrs -o - %s -mtriple=aarch64-none-apple-ios7.0 -mcpu=cyclone | FileCheck %s 2 3 ; Check trunc i64 operation is translated as a subregister access 4 ; eliminating an i32 induction varible. 5 6 ; CHECK-NOT: add {{x[0-9]+}}, {{x[0-9]+}}, #1 7 ; CHECK: add {{w[0-9]+}}, {{w[0-9]+}}, #1 8 ; CHECK-NEXT: cmp {{w[0-9]+}}, {{w[0-9]+}} 9 define void @test1_signed([8 x i8]* nocapture %a, i8* nocapture readonly %box, i8 %limit, i64 %inv) minsize { 10 entry: 11 %conv = zext i8 %limit to i32 12 %cmp223 = icmp eq i8 %limit, 0 13 br i1 %cmp223, label %for.end15, label %for.body4.lr.ph.us 14 15 for.body4.us: 16 %indvars.iv = phi i64 [ 0, %for.body4.lr.ph.us ], [ %indvars.iv.next, %for.body4.us ] 17 %arrayidx6.us = getelementptr inbounds [8 x i8], [8 x i8]* %a, i64 %indvars.iv, i64 %inv 18 %0 = load i8, i8* %arrayidx6.us, align 1 19 %idxprom7.us = zext i8 %0 to i64 20 %arrayidx8.us = getelementptr inbounds i8, i8* %box, i64 %idxprom7.us 21 %1 = load i8, i8* %arrayidx8.us, align 1 22 store i8 %1, i8* %arrayidx6.us, align 1 23 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 24 %2 = trunc i64 %indvars.iv.next to i32 25 %cmp2.us = icmp slt i32 %2, %conv 26 br i1 %cmp2.us, label %for.body4.us, label %for.cond1.for.inc13_crit_edge.us 27 28 for.body4.lr.ph.us: 29 %indvars.iv26 = phi i64 [ %indvars.iv.next27, %for.cond1.for.inc13_crit_edge.us ], [ 0, %entry ] 30 br label %for.body4.us 31 32 for.cond1.for.inc13_crit_edge.us: 33 %indvars.iv.next27 = add nuw nsw i64 %indvars.iv26, 1 34 %exitcond28 = icmp eq i64 %indvars.iv26, 3 35 br i1 %exitcond28, label %for.end15, label %for.body4.lr.ph.us 36 37 for.end15: 38 ret void 39 } 40
