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      1 ; RUN: llc -mtriple=aarch64-- -O0 -fast-isel -fast-isel-abort=4 -verify-machineinstrs < %s | FileCheck %s
      2 
      3 ; CHECK-LABEL: cmpxchg_monotonic_32:
      4 ; CHECK: [[RETRY:.LBB[0-9_]+]]:
      5 ; CHECK-NEXT:     mov [[STATUS:w[0-9]+]], #0
      6 ; CHECK-NEXT:     ldaxr [[OLD:w[0-9]+]], [x0]
      7 ; CHECK-NEXT:     cmp [[OLD]], w1
      8 ; CHECK-NEXT:     b.ne [[DONE:.LBB[0-9_]+]]
      9 ; CHECK-NEXT: // %bb.2:
     10 ; CHECK-NEXT:     stlxr [[STATUS]], w2, [x0]
     11 ; CHECK-NEXT:     cbnz [[STATUS]], [[RETRY]]
     12 ; CHECK-NEXT: [[DONE]]:
     13 ; CHECK-NEXT:     cmp [[OLD]], w1
     14 ; CHECK-NEXT:     cset [[STATUS:w[0-9]+]], eq
     15 ; CHECK-NEXT:     and [[STATUS32:w[0-9]+]], [[STATUS]], #0x1
     16 ; CHECK-NEXT:     str [[STATUS32]], [x3]
     17 ; CHECK-NEXT:     mov w0, [[OLD]]
     18 define i32 @cmpxchg_monotonic_32(i32* %p, i32 %cmp, i32 %new, i32* %ps) #0 {
     19   %tmp0 = cmpxchg i32* %p, i32 %cmp, i32 %new monotonic monotonic
     20   %tmp1 = extractvalue { i32, i1 } %tmp0, 0
     21   %tmp2 = extractvalue { i32, i1 } %tmp0, 1
     22   %tmp3 = zext i1 %tmp2 to i32
     23   store i32 %tmp3, i32* %ps
     24   ret i32 %tmp1
     25 }
     26 
     27 ; CHECK-LABEL: cmpxchg_acq_rel_32_load:
     28 ; CHECK:      // %bb.0:
     29 ; CHECK:     ldr [[NEW:w[0-9]+]], [x2]
     30 ; CHECK-NEXT: [[RETRY:.LBB[0-9_]+]]:
     31 ; CHECK-NEXT:     mov [[STATUS:w[0-9]+]], #0
     32 ; CHECK-NEXT:     ldaxr [[OLD:w[0-9]+]], [x0]
     33 ; CHECK-NEXT:     cmp [[OLD]], w1
     34 ; CHECK-NEXT:     b.ne [[DONE:.LBB[0-9_]+]]
     35 ; CHECK-NEXT: // %bb.2:
     36 ; CHECK-NEXT:     stlxr [[STATUS]], [[NEW]], [x0]
     37 ; CHECK-NEXT:     cbnz [[STATUS]], [[RETRY]]
     38 ; CHECK-NEXT: [[DONE]]:
     39 ; CHECK-NEXT:     cmp [[OLD]], w1
     40 ; CHECK-NEXT:     cset [[STATUS:w[0-9]+]], eq
     41 ; CHECK-NEXT:     and [[STATUS32:w[0-9]+]], [[STATUS]], #0x1
     42 ; CHECK-NEXT:     str [[STATUS32]], [x3]
     43 ; CHECK-NEXT:     mov w0, [[OLD]]
     44 define i32 @cmpxchg_acq_rel_32_load(i32* %p, i32 %cmp, i32* %pnew, i32* %ps) #0 {
     45   %new = load i32, i32* %pnew
     46   %tmp0 = cmpxchg i32* %p, i32 %cmp, i32 %new acq_rel acquire
     47   %tmp1 = extractvalue { i32, i1 } %tmp0, 0
     48   %tmp2 = extractvalue { i32, i1 } %tmp0, 1
     49   %tmp3 = zext i1 %tmp2 to i32
     50   store i32 %tmp3, i32* %ps
     51   ret i32 %tmp1
     52 }
     53 
     54 ; CHECK-LABEL: cmpxchg_seq_cst_64:
     55 ; CHECK: [[RETRY:.LBB[0-9_]+]]:
     56 ; CHECK-NEXT:     mov [[STATUS:w[0-9]+]], #0
     57 ; CHECK-NEXT:     ldaxr [[OLD:x[0-9]+]], [x0]
     58 ; CHECK-NEXT:     cmp [[OLD]], x1
     59 ; CHECK-NEXT:     b.ne [[DONE:.LBB[0-9_]+]]
     60 ; CHECK-NEXT: // %bb.2:
     61 ; CHECK-NEXT:     stlxr [[STATUS]], x2, [x0]
     62 ; CHECK-NEXT:     cbnz [[STATUS]], [[RETRY]]
     63 ; CHECK-NEXT: [[DONE]]:
     64 ; CHECK-NEXT:     cmp [[OLD]], x1
     65 ; CHECK-NEXT:     cset [[STATUS:w[0-9]+]], eq
     66 ; CHECK-NEXT:     and [[STATUS32:w[0-9]+]], [[STATUS]], #0x1
     67 ; CHECK-NEXT:     str [[STATUS32]], [x3]
     68 ; CHECK-NEXT:     mov x0, [[OLD]]
     69 define i64 @cmpxchg_seq_cst_64(i64* %p, i64 %cmp, i64 %new, i32* %ps) #0 {
     70   %tmp0 = cmpxchg i64* %p, i64 %cmp, i64 %new seq_cst seq_cst
     71   %tmp1 = extractvalue { i64, i1 } %tmp0, 0
     72   %tmp2 = extractvalue { i64, i1 } %tmp0, 1
     73   %tmp3 = zext i1 %tmp2 to i32
     74   store i32 %tmp3, i32* %ps
     75   ret i64 %tmp1
     76 }
     77 
     78 attributes #0 = { nounwind }
     79