1 ; RUN: llc -o - %s | FileCheck %s 2 ; Check that selection dag legalization of fcopysign works in cases with 3 ; different modes for the arguments. 4 target triple = "aarch64--" 5 6 declare fp128 @llvm.copysign.f128(fp128, fp128) 7 8 @val_float = global float zeroinitializer, align 4 9 @val_double = global double zeroinitializer, align 8 10 @val_fp128 = global fp128 zeroinitializer, align 16 11 12 ; CHECK-LABEL: copysign0 13 ; CHECK: ldr [[REG:x[0-9]+]], [x8, :lo12:val_double] 14 ; CHECK: and [[ANDREG:x[0-9]+]], [[REG]], #0x8000000000000000 15 ; CHECK: lsr x[[LSRREGNUM:[0-9]+]], [[ANDREG]], #56 16 ; CHECK: bfxil w[[LSRREGNUM]], w{{[0-9]+}}, #0, #7 17 ; CHECK: strb w[[LSRREGNUM]], 18 ; CHECK: ldr q{{[0-9]+}}, 19 define fp128 @copysign0() { 20 entry: 21 %v = load double, double* @val_double, align 8 22 %conv = fpext double %v to fp128 23 %call = tail call fp128 @llvm.copysign.f128(fp128 0xL00000000000000007FFF000000000000, fp128 %conv) #2 24 ret fp128 %call 25 } 26 27 ; CHECK-LABEL: copysign1 28 ; CHECK-DAG: ldr [[REG:q[0-9]+]], [x8, :lo12:val_fp128] 29 ; CHECK-DAG: ldr [[REG:w[0-9]+]], [x8, :lo12:val_float] 30 ; CHECK: and [[ANDREG:w[0-9]+]], [[REG]], #0x80000000 31 ; CHECK: lsr w[[LSRREGNUM:[0-9]+]], [[ANDREG]], #24 32 ; CHECK: bfxil w[[LSRREGNUM]], w{{[0-9]+}}, #0, #7 33 ; CHECK: strb w[[LSRREGNUM]], 34 ; CHECK: ldr q{{[0-9]+}}, 35 define fp128@copysign1() { 36 entry: 37 %v0 = load fp128, fp128* @val_fp128, align 16 38 %v1 = load float, float* @val_float, align 4 39 %conv = fpext float %v1 to fp128 40 %call = tail call fp128 @llvm.copysign.f128(fp128 %v0, fp128 %conv) 41 ret fp128 %call 42 } 43
