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      1 ; RUN: llc -verify-machineinstrs -enable-machine-outliner %s -o - | FileCheck %s
      2 ; RUN: llc -verify-machineinstrs -enable-machine-outliner -aarch64-redzone %s -o - | FileCheck %s -check-prefix=REDZONE
      3 
      4 ; Ensure that the MachineOutliner does not fire on functions which use a
      5 ; redzone. We don't care about what's actually outlined here. We just want to
      6 ; force behaviour in the outliner to make sure that it never acts on anything
      7 ; that might have a redzone.
      8 target triple = "arm64----"
      9 
     10 @x = common global i32 0, align 4
     11 declare void @baz() #0
     12 
     13 ; In AArch64FrameLowering, there are a couple special early exit cases where we
     14 ; *know* we don't use a redzone. The GHC calling convention is one of these
     15 ; cases. Make sure that we know we don't have a redzone even in these cases.
     16 define cc 10 void @bar() #0 {
     17   ; CHECK-LABEL: bar
     18   ; CHECK: bl OUTLINED_FUNCTION
     19   ; REDZONE-LABEL: bar
     20   ; REDZONE: bl OUTLINED_FUNCTION
     21   %1 = load i32, i32* @x, align 4
     22   %2 = add nsw i32 %1, 1
     23   store i32 %2, i32* @x, align 4
     24   call void @baz()
     25   %3 = load i32, i32* @x, align 4
     26   %4 = add nsw i32 %3, 1
     27   store i32 %4, i32* @x, align 4
     28   call void @baz()
     29   %5 = load i32, i32* @x, align 4
     30   %6 = add nsw i32 %5, 1
     31   store i32 %6, i32* @x, align 4
     32   ret void
     33 }
     34 
     35 ; foo() should have a redzone when compiled with -aarch64-redzone, and no
     36 ; redzone otherwise.
     37 define void @foo() #0 {
     38   ; CHECK-LABEL: foo
     39   ; CHECK: bl OUTLINED_FUNCTION
     40   ; REDZONE-LABEL: foo
     41   ; REDZONE-NOT: bl OUTLINED_FUNCTION
     42   %1 = alloca i32, align 4
     43   %2 = alloca i32, align 4
     44   %3 = alloca i32, align 4
     45   %4 = alloca i32, align 4
     46   store i32 0, i32* %1, align 4
     47   store i32 0, i32* %2, align 4
     48   store i32 0, i32* %3, align 4
     49   store i32 0, i32* %4, align 4
     50   %5 = load i32, i32* %1, align 4
     51   %6 = add nsw i32 %5, 1
     52   store i32 %6, i32* %1, align 4
     53   %7 = load i32, i32* %3, align 4
     54   %8 = add nsw i32 %7, 1
     55   store i32 %8, i32* %3, align 4
     56   %9 = load i32, i32* %4, align 4
     57   %10 = add nsw i32 %9, 1
     58   store i32 %10, i32* %4, align 4
     59   %11 = load i32, i32* %2, align 4
     60   %12 = add nsw i32 %11, 1
     61   store i32 %12, i32* %2, align 4
     62   %13 = load i32, i32* %1, align 4
     63   %14 = add nsw i32 %13, 1
     64   store i32 %14, i32* %1, align 4
     65   %15 = load i32, i32* %3, align 4
     66   %16 = add nsw i32 %15, 1
     67   store i32 %16, i32* %3, align 4
     68   %17 = load i32, i32* %4, align 4
     69   %18 = add nsw i32 %17, 1
     70   store i32 %18, i32* %4, align 4
     71   %19 = load i32, i32* %2, align 4
     72   %20 = add nsw i32 %19, -1
     73   store i32 %20, i32* %2, align 4
     74   ret void
     75 }
     76 
     77 attributes #0 = { noinline nounwind optnone }
     78