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      1 ; RUN: llc < %s -mtriple=aarch64-unknown-unknown -mcpu=cyclone -mattr=+slow-misaligned-128store | FileCheck %s --check-prefix=SPLITTING --check-prefix=CHECK
      2 ; RUN: llc < %s -mtriple=aarch64-eabi -mattr=-slow-misaligned-128store | FileCheck %s --check-prefix=MISALIGNED --check-prefix=CHECK
      3 
      4 @g0 = external global <3 x float>, align 16
      5 @g1 = external global <3 x float>, align 4
      6 
      7 ; CHECK: ldr q[[R0:[0-9]+]], {{\[}}[[R1:x[0-9]+]], :lo12:g0
      8 ; CHECK: str d[[R0]]
      9 
     10 define void @blam() {
     11   %tmp4 = getelementptr inbounds <3 x float>, <3 x float>* @g1, i64 0, i64 0
     12   %tmp5 = load <3 x float>, <3 x float>* @g0, align 16
     13   %tmp6 = extractelement <3 x float> %tmp5, i64 0
     14   store float %tmp6, float* %tmp4
     15   %tmp7 = getelementptr inbounds float, float* %tmp4, i64 1
     16   %tmp8 = load <3 x float>, <3 x float>* @g0, align 16
     17   %tmp9 = extractelement <3 x float> %tmp8, i64 1
     18   store float %tmp9, float* %tmp7
     19   ret void;
     20 }
     21 
     22 
     23 ; PR21711 - Merge vector stores into wider vector stores.
     24 
     25 ; On Cyclone, the stores should not get merged into a 16-byte store because
     26 ; unaligned 16-byte stores are slow. This test would infinite loop when
     27 ; the fastness of unaligned accesses was not specified correctly.
     28 
     29 define void @merge_vec_extract_stores(<4 x float> %v1, <2 x float>* %ptr) {
     30   %idx0 = getelementptr inbounds <2 x float>, <2 x float>* %ptr, i64 3
     31   %idx1 = getelementptr inbounds <2 x float>, <2 x float>* %ptr, i64 4
     32 
     33   %shuffle0 = shufflevector <4 x float> %v1, <4 x float> undef, <2 x i32> <i32 0, i32 1>
     34   %shuffle1 = shufflevector <4 x float> %v1, <4 x float> undef, <2 x i32> <i32 2, i32 3>
     35 
     36   store <2 x float> %shuffle0, <2 x float>* %idx0, align 8
     37   store <2 x float> %shuffle1, <2 x float>* %idx1, align 8
     38   ret void
     39 
     40 ; MISALIGNED-LABEL:    merge_vec_extract_stores
     41 ; MISALIGNED:          stur   q0, [x0, #24]
     42 ; MISALIGNED-NEXT:     ret
     43 
     44 ; FIXME: Ideally we would like to use a generic target for this test, but this relies
     45 ; on suppressing store pairs.
     46 
     47 ; SPLITTING-LABEL:    merge_vec_extract_stores
     48 ; SPLITTING:          ext   v1.16b, v0.16b, v0.16b, #8
     49 ; SPLITTING-NEXT:     str   d0, [x0, #24]
     50 ; SPLITTING-NEXT:     str   d1, [x0, #32]
     51 ; SPLITTING-NEXT:     ret
     52 }
     53