1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc -mtriple=aarch64-linux-gnu -fast-isel=0 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ISEL 3 ; RUN: llc -mtriple=aarch64-linux-gnu -fast-isel=1 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,FAST 4 5 define i32 @test1(i32 %x) { 6 ; CHECK-LABEL: test1: 7 ; CHECK: // %bb.0: 8 ; CHECK-NEXT: add w8, w0, #7 // =7 9 ; CHECK-NEXT: cmp w0, #0 // =0 10 ; CHECK-NEXT: csel w8, w8, w0, lt 11 ; CHECK-NEXT: asr w0, w8, #3 12 ; CHECK-NEXT: ret 13 %div = sdiv i32 %x, 8 14 ret i32 %div 15 } 16 17 define i32 @test2(i32 %x) { 18 ; CHECK-LABEL: test2: 19 ; CHECK: // %bb.0: 20 ; CHECK-NEXT: add w8, w0, #7 // =7 21 ; CHECK-NEXT: cmp w0, #0 // =0 22 ; CHECK-NEXT: csel w8, w8, w0, lt 23 ; CHECK-NEXT: neg w0, w8, asr #3 24 ; CHECK-NEXT: ret 25 %div = sdiv i32 %x, -8 26 ret i32 %div 27 } 28 29 define i32 @test3(i32 %x) { 30 ; CHECK-LABEL: test3: 31 ; CHECK: // %bb.0: 32 ; CHECK-NEXT: add w8, w0, #31 // =31 33 ; CHECK-NEXT: cmp w0, #0 // =0 34 ; CHECK-NEXT: csel w8, w8, w0, lt 35 ; CHECK-NEXT: asr w0, w8, #5 36 ; CHECK-NEXT: ret 37 %div = sdiv i32 %x, 32 38 ret i32 %div 39 } 40 41 define i64 @test4(i64 %x) { 42 ; CHECK-LABEL: test4: 43 ; CHECK: // %bb.0: 44 ; CHECK-NEXT: add x8, x0, #7 // =7 45 ; CHECK-NEXT: cmp x0, #0 // =0 46 ; CHECK-NEXT: csel x8, x8, x0, lt 47 ; CHECK-NEXT: asr x0, x8, #3 48 ; CHECK-NEXT: ret 49 %div = sdiv i64 %x, 8 50 ret i64 %div 51 } 52 53 define i64 @test5(i64 %x) { 54 ; CHECK-LABEL: test5: 55 ; CHECK: // %bb.0: 56 ; CHECK-NEXT: add x8, x0, #7 // =7 57 ; CHECK-NEXT: cmp x0, #0 // =0 58 ; CHECK-NEXT: csel x8, x8, x0, lt 59 ; CHECK-NEXT: neg x0, x8, asr #3 60 ; CHECK-NEXT: ret 61 %div = sdiv i64 %x, -8 62 ret i64 %div 63 } 64 65 define i64 @test6(i64 %x) { 66 ; CHECK-LABEL: test6: 67 ; CHECK: // %bb.0: 68 ; CHECK-NEXT: add x8, x0, #63 // =63 69 ; CHECK-NEXT: cmp x0, #0 // =0 70 ; CHECK-NEXT: csel x8, x8, x0, lt 71 ; CHECK-NEXT: asr x0, x8, #6 72 ; CHECK-NEXT: ret 73 %div = sdiv i64 %x, 64 74 ret i64 %div 75 } 76 77 define i64 @test7(i64 %x) { 78 ; CHECK-LABEL: test7: 79 ; CHECK: // %bb.0: 80 ; CHECK-NEXT: orr x8, xzr, #0xffffffffffff 81 ; CHECK-NEXT: add x8, x0, x8 82 ; CHECK-NEXT: cmp x0, #0 // =0 83 ; CHECK-NEXT: csel x8, x8, x0, lt 84 ; CHECK-NEXT: asr x0, x8, #48 85 ; CHECK-NEXT: ret 86 %div = sdiv i64 %x, 281474976710656 87 ret i64 %div 88 } 89 90
