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      1 # RUN: llc -march=amdgcn -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s -check-prefixes=GCN
      2 
      3 --- |
      4   define void @minnum(i32 addrspace(1)* %global0) { ret void }
      5 ...
      6 ---
      7 
      8 name:            minnum
      9 legalized:       true
     10 regBankSelected: true
     11 
     12 # GCN-LABEL: name: minnum
     13 body: |
     14   bb.0:
     15     liveins: $sgpr0, $vgpr0, $vgpr1, $vgpr3_vgpr4, $sgpr10_sgpr11, $vgpr10_vgpr11, $vgpr12_vgpr13
     16     ; GCN: [[SGPR0:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
     17     ; GCN: [[VGPR0:%[0-9]+]]:vgpr_32 = COPY $vgpr0
     18     ; GCN: [[VGPR1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
     19     %0:sgpr(s32) = COPY $sgpr0
     20     %1:vgpr(s32) = COPY $vgpr0
     21     %2:vgpr(s32) = COPY $vgpr1
     22     %3:vgpr(s64) = COPY $vgpr3_vgpr4
     23 
     24     ; GCN: [[SGPR64_0:%[0-9]+]]:sreg_64_xexec = COPY $sgpr10_sgpr11
     25     ; GCN: [[VGPR64_0:%[0-9]+]]:vreg_64 = COPY $vgpr10_vgpr11
     26     ; GCN: [[VGPR64_1:%[0-9]+]]:vreg_64 = COPY $vgpr12_vgpr13
     27     %10:sgpr(s64) = COPY $sgpr10_sgpr11
     28     %11:vgpr(s64) = COPY $vgpr10_vgpr11
     29     %12:vgpr(s64) = COPY $vgpr12_vgpr13
     30 
     31     ; minnum vs
     32     ; GCN: V_MIN_F32_e32 [[SGPR0]], [[VGPR0]]
     33     %4:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.minnum.f32), %1, %0
     34 
     35     ; minnum sv
     36     ; GCN: V_MIN_F32_e32 [[SGPR0]], [[VGPR0]]
     37     %5:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.minnum.f32), %0, %1
     38 
     39     ; minnum vv
     40     ; GCN: V_MIN_F32_e32 [[VGPR0]], [[VGPR1]]
     41     %6:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.minnum.f32), %1, %2
     42 
     43     G_STORE %4, %3 :: (store 4 into %ir.global0)
     44     G_STORE %5, %3 :: (store 4 into %ir.global0)
     45     G_STORE %6, %3 :: (store 4 into %ir.global0)
     46 
     47     ; 64-bit
     48 
     49     ; minnum vs
     50     ; GCN: V_MIN_F64 0, [[SGPR64_0]], 0, [[VGPR64_0]], 0, 0
     51     %14:vgpr(s64) = G_INTRINSIC intrinsic(@llvm.minnum.f64), %10, %11
     52 
     53     ; minnum sv
     54     ; GCN: V_MIN_F64 0, [[VGPR64_0]], 0, [[SGPR64_0]], 0, 0
     55     %15:vgpr(s64) = G_INTRINSIC intrinsic(@llvm.minnum.f64), %11, %10
     56 
     57     ; minnum vv
     58     ; GCN: V_MIN_F64 0, [[VGPR64_0]], 0, [[VGPR64_1]], 0, 0
     59     %16:vgpr(s64) = G_INTRINSIC intrinsic(@llvm.minnum.f64), %11, %12
     60 
     61     G_STORE %14, %3 :: (store 8 into %ir.global0)
     62     G_STORE %15, %3 :: (store 8 into %ir.global0)
     63     G_STORE %16, %3 :: (store 8 into %ir.global0)
     64 ...
     65 ---
     66