1 ; RUN: llc -mtriple amdgcn-amdhsa -mcpu=fiji -amdgpu-scalarize-global-loads -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s 2 3 declare i32 @llvm.amdgcn.workitem.id.x() 4 declare i32 @llvm.amdgcn.readfirstlane(i32) 5 6 ; GCN-LABEL: readfirstlane_uniform 7 ; GCN: s_load_dwordx2 s{{\[}}[[IN_ADDR:[0-9]+]]:1{{\]}}, s[4:5], 0x0 8 ; GCN: v_readfirstlane_b32 s[[SCALAR:[0-9]+]], v0 9 ; GCN: s_add_u32 s[[LOAD_ADDR:[0-9]+]], s[[IN_ADDR]], s[[SCALAR]] 10 ; GCN: s_load_dword s{{[0-9]+}}, s{{\[}}[[LOAD_ADDR]] 11 12 define amdgpu_kernel void @readfirstlane_uniform(float addrspace(1)* noalias nocapture readonly, float addrspace(1)* noalias nocapture readonly) { 13 %tid = tail call i32 @llvm.amdgcn.workitem.id.x() 14 %scalar = tail call i32 @llvm.amdgcn.readfirstlane(i32 %tid) 15 %idx = zext i32 %scalar to i64 16 %gep0 = getelementptr inbounds float, float addrspace(1)* %0, i64 %idx 17 %val = load float, float addrspace(1)* %gep0, align 4 18 %gep1 = getelementptr inbounds float, float addrspace(1)* %1, i64 10 19 store float %val, float addrspace(1)* %gep1, align 4 20 ret void 21 } 22
