1 ; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,SI %s 2 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,VI,GFX89 %s 3 ; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX9,GFX89 %s 4 5 declare i32 @llvm.amdgcn.workitem.id.x() nounwind readnone 6 declare i32 @llvm.amdgcn.workitem.id.y() nounwind readnone 7 8 ; GCN-LABEL: {{^}}anyext_i1_i32: 9 ; GCN: v_cndmask_b32_e64 10 define amdgpu_kernel void @anyext_i1_i32(i32 addrspace(1)* %out, i32 %cond) #0 { 11 entry: 12 %tmp = icmp eq i32 %cond, 0 13 %tmp1 = zext i1 %tmp to i8 14 %tmp2 = xor i8 %tmp1, -1 15 %tmp3 = and i8 %tmp2, 1 16 %tmp4 = zext i8 %tmp3 to i32 17 store i32 %tmp4, i32 addrspace(1)* %out 18 ret void 19 } 20 21 ; GCN-LABEL: {{^}}s_anyext_i16_i32: 22 ; GFX89: v_add_u16_e32 [[ADD:v[0-9]+]], 23 ; GFX89: v_xor_b32_e32 [[XOR:v[0-9]+]], -1, [[ADD]] 24 ; GFX89: v_and_b32_e32 [[AND:v[0-9]+]], 1, [[XOR]] 25 ; GFX89: buffer_store_dword [[AND]] 26 define amdgpu_kernel void @s_anyext_i16_i32(i32 addrspace(1)* %out, i16 addrspace(1)* %a, i16 addrspace(1)* %b) #0 { 27 entry: 28 %tid.x = call i32 @llvm.amdgcn.workitem.id.x() 29 %tid.y = call i32 @llvm.amdgcn.workitem.id.y() 30 %a.ptr = getelementptr i16, i16 addrspace(1)* %a, i32 %tid.x 31 %b.ptr = getelementptr i16, i16 addrspace(1)* %b, i32 %tid.y 32 %a.l = load i16, i16 addrspace(1)* %a.ptr 33 %b.l = load i16, i16 addrspace(1)* %b.ptr 34 %tmp = add i16 %a.l, %b.l 35 %tmp1 = trunc i16 %tmp to i8 36 %tmp2 = xor i8 %tmp1, -1 37 %tmp3 = and i8 %tmp2, 1 38 %tmp4 = zext i8 %tmp3 to i32 39 store i32 %tmp4, i32 addrspace(1)* %out 40 ret void 41 } 42 43 ; GCN-LABEL: {{^}}anyext_v2i16_to_v2i32: 44 ; GFX9: global_load_short_d16_hi 45 ; GFX9: v_and_b32_e32 v{{[0-9]+}}, 0x80008000 46 ; GFX9: v_bfi_b32 v{{[0-9]+}}, v{{[0-9]+}}, 0, v{{[0-9]+}} 47 ; GFX9: v_cmp_eq_f32_e32 48 ; GFX9: v_cndmask_b32_e64 v{{[0-9]+}}, 0, 1, vcc 49 define amdgpu_kernel void @anyext_v2i16_to_v2i32() #0 { 50 bb: 51 %tmp = load i16, i16 addrspace(1)* undef, align 2 52 %tmp2 = insertelement <2 x i16> undef, i16 %tmp, i32 1 53 %tmp4 = and <2 x i16> %tmp2, <i16 -32768, i16 -32768> 54 %tmp5 = zext <2 x i16> %tmp4 to <2 x i32> 55 %tmp6 = shl nuw <2 x i32> %tmp5, <i32 16, i32 16> 56 %tmp7 = or <2 x i32> zeroinitializer, %tmp6 57 %tmp8 = bitcast <2 x i32> %tmp7 to <2 x float> 58 %tmp10 = fcmp oeq <2 x float> %tmp8, zeroinitializer 59 %tmp11 = zext <2 x i1> %tmp10 to <2 x i8> 60 %tmp12 = extractelement <2 x i8> %tmp11, i32 1 61 store i8 %tmp12, i8 addrspace(1)* undef, align 1 62 ret void 63 } 64 65 attributes #0 = { nounwind } 66
