1 ; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=fiji -amdgpu-spill-sgpr-to-smem=1 -verify-machineinstrs < %s | FileCheck -check-prefix=TOSMEM -check-prefix=ALL %s 2 3 ; FIXME: SGPR-to-SMEM requires an additional SGPR always to scavenge m0 4 5 ; ALL-LABEL: {{^}}max_9_sgprs: 6 ; ALL: SGPRBlocks: 1 7 ; ALL: NumSGPRsForWavesPerEU: 9 8 define amdgpu_kernel void @max_9_sgprs() #0 { 9 %one = load volatile i32, i32 addrspace(4)* undef 10 %two = load volatile i32, i32 addrspace(4)* undef 11 %three = load volatile i32, i32 addrspace(4)* undef 12 %four = load volatile i32, i32 addrspace(4)* undef 13 %five = load volatile i32, i32 addrspace(4)* undef 14 %six = load volatile i32, i32 addrspace(4)* undef 15 %seven = load volatile i32, i32 addrspace(4)* undef 16 %eight = load volatile i32, i32 addrspace(4)* undef 17 %nine = load volatile i32, i32 addrspace(4)* undef 18 %ten = load volatile i32, i32 addrspace(4)* undef 19 call void asm sideeffect "", "s,s,s,s,s,s,s,s"(i32 %one, i32 %two, i32 %three, i32 %four, i32 %five, i32 %six, i32 %seven, i32 %eight) 20 store volatile i32 %one, i32 addrspace(1)* undef 21 store volatile i32 %two, i32 addrspace(1)* undef 22 store volatile i32 %three, i32 addrspace(1)* undef 23 store volatile i32 %four, i32 addrspace(1)* undef 24 store volatile i32 %five, i32 addrspace(1)* undef 25 store volatile i32 %six, i32 addrspace(1)* undef 26 store volatile i32 %seven, i32 addrspace(1)* undef 27 store volatile i32 %eight, i32 addrspace(1)* undef 28 store volatile i32 %nine, i32 addrspace(1)* undef 29 store volatile i32 %ten, i32 addrspace(1)* undef 30 ret void 31 } 32 33 attributes #0 = { nounwind "amdgpu-num-sgpr"="14" } 34
