1 ; RUN: llc < %s -march=amdgcn -verify-machineinstrs | FileCheck %s 2 3 ; This tests that the llvm.SI.end.cf intrinsic is not inserted into the 4 ; loop block. This intrinsic will be lowered to s_or_b64 by the code 5 ; generator. 6 7 ; CHECK-LABEL: {{^}}test: 8 9 ; This is was lowered from the llvm.SI.end.cf intrinsic: 10 ; CHECK: s_or_b64 exec, exec 11 12 ; CHECK: [[LOOP_LABEL:[0-9A-Za-z_]+]]: ; %loop{{$}} 13 ; CHECK-NOT: s_or_b64 exec, exec 14 ; CHECK: s_cbranch_execnz [[LOOP_LABEL]] 15 define amdgpu_kernel void @test(i32 addrspace(1)* %out) { 16 entry: 17 %cond = call i32 @llvm.amdgcn.workitem.id.x() #0 18 %tmp0 = icmp eq i32 %cond, 0 19 br i1 %tmp0, label %if, label %loop 20 21 if: 22 store i32 0, i32 addrspace(1)* %out 23 br label %loop 24 25 loop: 26 %tmp1 = phi i32 [0, %entry], [0, %if], [%inc, %loop] 27 %inc = add i32 %tmp1, %cond 28 %tmp2 = icmp ugt i32 %inc, 10 29 br i1 %tmp2, label %done, label %loop 30 31 done: 32 %tmp3 = getelementptr i32, i32 addrspace(1)* %out, i64 1 33 store i32 %inc, i32 addrspace(1)* %tmp3 34 ret void 35 } 36 37 declare i32 @llvm.amdgcn.workitem.id.x() #0 38 39 attributes #0 = { nounwind readnone } 40
