1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=SI -check-prefix=FUNC %s 2 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI -check-prefix=FUNC %s 3 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s 4 5 6 ; DAGCombiner will transform: 7 ; (fabs (f32 bitcast (i32 a))) => (f32 bitcast (and (i32 a), 0x7FFFFFFF)) 8 ; unless isFabsFree returns true 9 10 ; FUNC-LABEL: {{^}}s_fabs_fn_free: 11 ; R600-NOT: AND 12 ; R600: |PV.{{[XYZW]}}| 13 14 ; GCN: s_and_b32 s{{[0-9]+}}, s{{[0-9]+}}, 0x7fffffff 15 define amdgpu_kernel void @s_fabs_fn_free(float addrspace(1)* %out, i32 %in) { 16 %bc= bitcast i32 %in to float 17 %fabs = call float @fabs(float %bc) 18 store float %fabs, float addrspace(1)* %out 19 ret void 20 } 21 22 ; FUNC-LABEL: {{^}}s_fabs_free: 23 ; R600-NOT: AND 24 ; R600: |PV.{{[XYZW]}}| 25 26 ; GCN: s_and_b32 s{{[0-9]+}}, s{{[0-9]+}}, 0x7fffffff 27 define amdgpu_kernel void @s_fabs_free(float addrspace(1)* %out, i32 %in) { 28 %bc= bitcast i32 %in to float 29 %fabs = call float @llvm.fabs.f32(float %bc) 30 store float %fabs, float addrspace(1)* %out 31 ret void 32 } 33 34 ; FUNC-LABEL: {{^}}s_fabs_f32: 35 ; R600: |{{(PV|T[0-9])\.[XYZW]}}| 36 37 ; GCN: s_and_b32 s{{[0-9]+}}, s{{[0-9]+}}, 0x7fffffff 38 define amdgpu_kernel void @s_fabs_f32(float addrspace(1)* %out, float %in) { 39 %fabs = call float @llvm.fabs.f32(float %in) 40 store float %fabs, float addrspace(1)* %out 41 ret void 42 } 43 44 ; FUNC-LABEL: {{^}}fabs_v2f32: 45 ; R600: |{{(PV|T[0-9])\.[XYZW]}}| 46 ; R600: |{{(PV|T[0-9])\.[XYZW]}}| 47 48 ; GCN: v_and_b32 49 ; GCN: v_and_b32 50 define amdgpu_kernel void @fabs_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %in) { 51 %fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %in) 52 store <2 x float> %fabs, <2 x float> addrspace(1)* %out 53 ret void 54 } 55 56 ; FUNC-LABEL: {{^}}fabs_v4f32: 57 ; R600: |{{(PV|T[0-9])\.[XYZW]}}| 58 ; R600: |{{(PV|T[0-9])\.[XYZW]}}| 59 ; R600: |{{(PV|T[0-9])\.[XYZW]}}| 60 ; R600: |{{(PV|T[0-9])\.[XYZW]}}| 61 62 ; GCN: v_and_b32 63 ; GCN: v_and_b32 64 ; GCN: v_and_b32 65 ; GCN: v_and_b32 66 define amdgpu_kernel void @fabs_v4f32(<4 x float> addrspace(1)* %out, <4 x float> %in) { 67 %fabs = call <4 x float> @llvm.fabs.v4f32(<4 x float> %in) 68 store <4 x float> %fabs, <4 x float> addrspace(1)* %out 69 ret void 70 } 71 72 ; GCN-LABEL: {{^}}fabs_fn_fold: 73 ; SI: s_load_dwordx2 s{{\[}}[[ABS_VALUE:[0-9]+]]:[[MUL_VAL:[0-9]+]]{{\]}}, s[{{[0-9]+:[0-9]+}}], 0xb 74 ; VI: s_load_dwordx2 s{{\[}}[[ABS_VALUE:[0-9]+]]:[[MUL_VAL:[0-9]+]]{{\]}}, s[{{[0-9]+:[0-9]+}}], 0x2c 75 ; GCN-NOT: and 76 ; GCN: v_mov_b32_e32 [[V_MUL_VI:v[0-9]+]], s[[MUL_VAL]] 77 ; GCN: v_mul_f32_e64 v{{[0-9]+}}, |s[[ABS_VALUE]]|, [[V_MUL_VI]] 78 define amdgpu_kernel void @fabs_fn_fold(float addrspace(1)* %out, float %in0, float %in1) { 79 %fabs = call float @fabs(float %in0) 80 %fmul = fmul float %fabs, %in1 81 store float %fmul, float addrspace(1)* %out 82 ret void 83 } 84 85 ; FUNC-LABEL: {{^}}fabs_fold: 86 ; SI: s_load_dwordx2 s{{\[}}[[ABS_VALUE:[0-9]+]]:[[MUL_VAL:[0-9]+]]{{\]}}, s[{{[0-9]+:[0-9]+}}], 0xb 87 ; VI: s_load_dwordx2 s{{\[}}[[ABS_VALUE:[0-9]+]]:[[MUL_VAL:[0-9]+]]{{\]}}, s[{{[0-9]+:[0-9]+}}], 0x2c 88 ; GCN-NOT: and 89 ; GCN: v_mov_b32_e32 [[V_MUL_VI:v[0-9]+]], s[[MUL_VAL]] 90 ; GCN: v_mul_f32_e64 v{{[0-9]+}}, |s[[ABS_VALUE]]|, [[V_MUL_VI]] 91 define amdgpu_kernel void @fabs_fold(float addrspace(1)* %out, float %in0, float %in1) { 92 %fabs = call float @llvm.fabs.f32(float %in0) 93 %fmul = fmul float %fabs, %in1 94 store float %fmul, float addrspace(1)* %out 95 ret void 96 } 97 98 ; Make sure we turn some integer operations back into fabs 99 ; FUNC-LABEL: {{^}}bitpreserve_fabs_f32: 100 ; GCN: v_add_f32_e64 v{{[0-9]+}}, |s{{[0-9]+}}|, 1.0 101 define amdgpu_kernel void @bitpreserve_fabs_f32(float addrspace(1)* %out, float %in) { 102 %in.bc = bitcast float %in to i32 103 %int.abs = and i32 %in.bc, 2147483647 104 %bc = bitcast i32 %int.abs to float 105 %fadd = fadd float %bc, 1.0 106 store float %fadd, float addrspace(1)* %out 107 ret void 108 } 109 110 declare float @fabs(float) readnone 111 declare float @llvm.fabs.f32(float) readnone 112 declare <2 x float> @llvm.fabs.v2f32(<2 x float>) readnone 113 declare <4 x float> @llvm.fabs.v4f32(<4 x float>) readnone 114
