Home | History | Annotate | Download | only in AMDGPU
      1 ; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck %s
      2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck %s
      3 
      4 ; CHECK-LABEL: {{^}}v_fadd_f64:
      5 ; CHECK: v_add_f64 {{v[[0-9]+:[0-9]+]}}, {{v[[0-9]+:[0-9]+]}}, {{v[[0-9]+:[0-9]+]}}
      6 define amdgpu_kernel void @v_fadd_f64(double addrspace(1)* %out, double addrspace(1)* %in1,
      7                         double addrspace(1)* %in2) {
      8   %tid = call i32 @llvm.amdgcn.workitem.id.x()
      9   %gep1 = getelementptr inbounds double, double addrspace(1)* %in1, i32 %tid
     10   %gep2 = getelementptr inbounds double, double addrspace(1)* %in2, i32 %tid
     11   %r0 = load double, double addrspace(1)* %gep1
     12   %r1 = load double, double addrspace(1)* %gep2
     13   %r2 = fadd double %r0, %r1
     14   store double %r2, double addrspace(1)* %out
     15   ret void
     16 }
     17 
     18 ; CHECK-LABEL: {{^}}s_fadd_f64:
     19 ; CHECK: v_add_f64 {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}
     20 define amdgpu_kernel void @s_fadd_f64(double addrspace(1)* %out, double %r0, double %r1) {
     21   %r2 = fadd double %r0, %r1
     22   store double %r2, double addrspace(1)* %out
     23   ret void
     24 }
     25 
     26 ; CHECK-LABEL: {{^}}v_fadd_v2f64:
     27 ; CHECK: v_add_f64
     28 ; CHECK: v_add_f64
     29 ; CHECK: _store_dwordx4
     30 define amdgpu_kernel void @v_fadd_v2f64(<2 x double> addrspace(1)* %out, <2 x double> addrspace(1)* %in1,
     31                           <2 x double> addrspace(1)* %in2) {
     32   %r0 = load <2 x double>, <2 x double> addrspace(1)* %in1
     33   %r1 = load <2 x double>, <2 x double> addrspace(1)* %in2
     34   %r2 = fadd <2 x double> %r0, %r1
     35   store <2 x double> %r2, <2 x double> addrspace(1)* %out
     36   ret void
     37 }
     38 
     39 ; CHECK-LABEL: {{^}}s_fadd_v2f64:
     40 ; CHECK: v_add_f64 {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}
     41 ; CHECK: v_add_f64 {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}
     42 ; CHECK: _store_dwordx4
     43 define amdgpu_kernel void @s_fadd_v2f64(<2 x double> addrspace(1)* %out, <2 x double> %r0, <2 x double> %r1) {
     44   %r2 = fadd <2 x double> %r0, %r1
     45   store <2 x double> %r2, <2 x double> addrspace(1)* %out
     46   ret void
     47 }
     48 
     49 declare i32 @llvm.amdgcn.workitem.id.x() #1
     50 
     51 attributes #0 = { nounwind }
     52 attributes #1 = { nounwind readnone }
     53