1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=GCN -check-prefix=FUNC %s 2 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=GCN -check-prefix=FUNC %s 3 4 declare double @llvm.copysign.f64(double, double) nounwind readnone 5 declare <2 x double> @llvm.copysign.v2f64(<2 x double>, <2 x double>) nounwind readnone 6 declare <4 x double> @llvm.copysign.v4f64(<4 x double>, <4 x double>) nounwind readnone 7 8 ; FUNC-LABEL: {{^}}test_copysign_f64: 9 ; SI-DAG: s_load_dwordx2 s{{\[}}[[SMAG_LO:[0-9]+]]:[[SMAG_HI:[0-9]+]]{{\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0x13 10 ; SI-DAG: s_load_dwordx2 s{{\[}}[[SSIGN_LO:[0-9]+]]:[[SSIGN_HI:[0-9]+]]{{\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0x1d 11 ; VI-DAG: s_load_dwordx2 s{{\[}}[[SMAG_LO:[0-9]+]]:[[SMAG_HI:[0-9]+]]{{\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0x4c 12 ; VI-DAG: s_load_dwordx2 s{{\[}}[[SSIGN_LO:[0-9]+]]:[[SSIGN_HI:[0-9]+]]{{\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0x74 13 ; GCN-DAG: v_mov_b32_e32 v[[VSIGN_HI:[0-9]+]], s[[SSIGN_HI]] 14 ; GCN-DAG: v_mov_b32_e32 v[[VMAG_HI:[0-9]+]], s[[SMAG_HI]] 15 ; GCN-DAG: s_brev_b32 [[SCONST:s[0-9]+]], -2 16 ; GCN-DAG: v_bfi_b32 v[[VRESULT_HI:[0-9]+]], [[SCONST]], v[[VMAG_HI]], v[[VSIGN_HI]] 17 ; GCN-DAG: v_mov_b32_e32 v[[VMAG_LO:[0-9]+]], s[[SMAG_LO]] 18 ; GCN: buffer_store_dwordx2 v{{\[}}[[VMAG_LO]]:[[VRESULT_HI]]{{\]}} 19 ; GCN: s_endpgm 20 define amdgpu_kernel void @test_copysign_f64(double addrspace(1)* %out, [8 x i32], double %mag, [8 x i32], double %sign) nounwind { 21 %result = call double @llvm.copysign.f64(double %mag, double %sign) 22 store double %result, double addrspace(1)* %out, align 8 23 ret void 24 } 25 26 ; FUNC-LABEL: {{^}}test_copysign_f64_f32: 27 ; SI-DAG: s_load_dwordx2 s{{\[}}[[SMAG_LO:[0-9]+]]:[[SMAG_HI:[0-9]+]]{{\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0x13 28 ; VI-DAG: s_load_dwordx2 s{{\[}}[[SMAG_LO:[0-9]+]]:[[SMAG_HI:[0-9]+]]{{\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0x4c 29 ; GCN-DAG: s_load_dword s[[SSIGN:[0-9]+]], s{{\[[0-9]+:[0-9]+\]}} 30 ; GCN-DAG: s_brev_b32 [[SCONST:s[0-9]+]], -2{{$}} 31 ; GCN-DAG: v_mov_b32_e32 v[[VMAG_HI:[0-9]+]], s[[SMAG_HI]] 32 ; GCN-DAG: v_mov_b32_e32 v[[VSIGN:[0-9]+]], s[[SSIGN]] 33 ; GCN-DAG: v_bfi_b32 v[[VRESULT_HI:[0-9]+]], [[SCONST]], v[[VMAG_HI]], v[[VSIGN]] 34 ; GCN-DAG: v_mov_b32_e32 v[[VMAG_LO:[0-9]+]], s[[SMAG_LO]] 35 ; GCN: buffer_store_dwordx2 v{{\[}}[[VMAG_LO]]:[[VRESULT_HI]]{{\]}} 36 define amdgpu_kernel void @test_copysign_f64_f32(double addrspace(1)* %out, [8 x i32], double %mag, float %sign) nounwind { 37 %c = fpext float %sign to double 38 %result = call double @llvm.copysign.f64(double %mag, double %c) 39 store double %result, double addrspace(1)* %out, align 8 40 ret void 41 } 42 43 ; FUNC-LABEL: {{^}}test_copysign_v2f64: 44 ; GCN: s_endpgm 45 define amdgpu_kernel void @test_copysign_v2f64(<2 x double> addrspace(1)* %out, <2 x double> %mag, <2 x double> %sign) nounwind { 46 %result = call <2 x double> @llvm.copysign.v2f64(<2 x double> %mag, <2 x double> %sign) 47 store <2 x double> %result, <2 x double> addrspace(1)* %out, align 8 48 ret void 49 } 50 51 ; FUNC-LABEL: {{^}}test_copysign_v4f64: 52 ; GCN: s_endpgm 53 define amdgpu_kernel void @test_copysign_v4f64(<4 x double> addrspace(1)* %out, <4 x double> %mag, <4 x double> %sign) nounwind { 54 %result = call <4 x double> @llvm.copysign.v4f64(<4 x double> %mag, <4 x double> %sign) 55 store <4 x double> %result, <4 x double> addrspace(1)* %out, align 8 56 ret void 57 } 58
