1 ; RUN: llc -march=amdgcn -mcpu=hawaii -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=GCN %s 2 ; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=GCN %s 3 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=GCN %s 4 5 6 ; GCN-LABEL: {{^}}fdiv_f64: 7 ; GCN-DAG: buffer_load_dwordx2 [[NUM:v\[[0-9]+:[0-9]+\]]], off, {{s\[[0-9]+:[0-9]+\]}}, 0 8 ; GCN-DAG: buffer_load_dwordx2 [[DEN:v\[[0-9]+:[0-9]+\]]], off, {{s\[[0-9]+:[0-9]+\]}}, 0 offset:8 9 ; CI-DAG: v_div_scale_f64 [[SCALE0:v\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, [[DEN]], [[DEN]], [[NUM]] 10 ; CI-DAG: v_div_scale_f64 [[SCALE1:v\[[0-9]+:[0-9]+\]]], vcc, [[NUM]], [[DEN]], [[NUM]] 11 12 ; Check for div_scale bug workaround on SI 13 ; SI-DAG: v_div_scale_f64 [[SCALE0:v\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, [[DEN]], [[DEN]], [[NUM]] 14 ; SI-DAG: v_div_scale_f64 [[SCALE1:v\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, [[NUM]], [[DEN]], [[NUM]] 15 16 ; GCN-DAG: v_rcp_f64_e32 [[RCP_SCALE0:v\[[0-9]+:[0-9]+\]]], [[SCALE0]] 17 18 ; SI-DAG: v_cmp_eq_u32_e32 vcc, {{v[0-9]+}}, {{v[0-9]+}} 19 ; SI-DAG: v_cmp_eq_u32_e64 [[CMP0:s\[[0-9]+:[0-9]+\]]], {{v[0-9]+}}, {{v[0-9]+}} 20 ; SI-DAG: s_xor_b64 vcc, [[CMP0]], vcc 21 22 ; GCN-DAG: v_fma_f64 [[FMA0:v\[[0-9]+:[0-9]+\]]], -[[SCALE0]], [[RCP_SCALE0]], 1.0 23 ; GCN-DAG: v_fma_f64 [[FMA1:v\[[0-9]+:[0-9]+\]]], [[RCP_SCALE0]], [[FMA0]], [[RCP_SCALE0]] 24 ; GCN-DAG: v_fma_f64 [[FMA2:v\[[0-9]+:[0-9]+\]]], -[[SCALE0]], [[FMA1]], 1.0 25 ; GCN-DAG: v_fma_f64 [[FMA3:v\[[0-9]+:[0-9]+\]]], [[FMA1]], [[FMA2]], [[FMA1]] 26 ; GCN-DAG: v_mul_f64 [[MUL:v\[[0-9]+:[0-9]+\]]], [[SCALE1]], [[FMA3]] 27 ; GCN-DAG: v_fma_f64 [[FMA4:v\[[0-9]+:[0-9]+\]]], -[[SCALE0]], [[MUL]], [[SCALE1]] 28 ; GCN: v_div_fmas_f64 [[FMAS:v\[[0-9]+:[0-9]+\]]], [[FMA4]], [[FMA3]], [[MUL]] 29 ; GCN: v_div_fixup_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[FMAS]], [[DEN]], [[NUM]] 30 ; GCN: buffer_store_dwordx2 [[RESULT]] 31 ; GCN: s_endpgm 32 define amdgpu_kernel void @fdiv_f64(double addrspace(1)* %out, double addrspace(1)* %in) #0 { 33 %gep.1 = getelementptr double, double addrspace(1)* %in, i32 1 34 %num = load volatile double, double addrspace(1)* %in 35 %den = load volatile double, double addrspace(1)* %gep.1 36 %result = fdiv double %num, %den 37 store double %result, double addrspace(1)* %out 38 ret void 39 } 40 41 ; GCN-LABEL: {{^}}fdiv_f64_s_v: 42 define amdgpu_kernel void @fdiv_f64_s_v(double addrspace(1)* %out, double addrspace(1)* %in, double %num) #0 { 43 %den = load double, double addrspace(1)* %in 44 %result = fdiv double %num, %den 45 store double %result, double addrspace(1)* %out 46 ret void 47 } 48 49 ; GCN-LABEL: {{^}}fdiv_f64_v_s: 50 define amdgpu_kernel void @fdiv_f64_v_s(double addrspace(1)* %out, double addrspace(1)* %in, double %den) #0 { 51 %num = load double, double addrspace(1)* %in 52 %result = fdiv double %num, %den 53 store double %result, double addrspace(1)* %out 54 ret void 55 } 56 57 ; GCN-LABEL: {{^}}fdiv_f64_s_s: 58 define amdgpu_kernel void @fdiv_f64_s_s(double addrspace(1)* %out, double %num, double %den) #0 { 59 %result = fdiv double %num, %den 60 store double %result, double addrspace(1)* %out 61 ret void 62 } 63 64 ; GCN-LABEL: {{^}}v_fdiv_v2f64: 65 define amdgpu_kernel void @v_fdiv_v2f64(<2 x double> addrspace(1)* %out, <2 x double> addrspace(1)* %in) #0 { 66 %gep.1 = getelementptr <2 x double>, <2 x double> addrspace(1)* %in, i32 1 67 %num = load <2 x double>, <2 x double> addrspace(1)* %in 68 %den = load <2 x double>, <2 x double> addrspace(1)* %gep.1 69 %result = fdiv <2 x double> %num, %den 70 store <2 x double> %result, <2 x double> addrspace(1)* %out 71 ret void 72 } 73 74 ; GCN-LABEL: {{^}}s_fdiv_v2f64: 75 define amdgpu_kernel void @s_fdiv_v2f64(<2 x double> addrspace(1)* %out, <2 x double> %num, <2 x double> %den) { 76 %result = fdiv <2 x double> %num, %den 77 store <2 x double> %result, <2 x double> addrspace(1)* %out 78 ret void 79 } 80 81 ; GCN-LABEL: {{^}}v_fdiv_v4f64: 82 define amdgpu_kernel void @v_fdiv_v4f64(<4 x double> addrspace(1)* %out, <4 x double> addrspace(1)* %in) #0 { 83 %gep.1 = getelementptr <4 x double>, <4 x double> addrspace(1)* %in, i32 1 84 %num = load <4 x double>, <4 x double> addrspace(1)* %in 85 %den = load <4 x double>, <4 x double> addrspace(1)* %gep.1 86 %result = fdiv <4 x double> %num, %den 87 store <4 x double> %result, <4 x double> addrspace(1)* %out 88 ret void 89 } 90 91 ; GCN-LABEL: {{^}}s_fdiv_v4f64: 92 define amdgpu_kernel void @s_fdiv_v4f64(<4 x double> addrspace(1)* %out, <4 x double> %num, <4 x double> %den) #0 { 93 %result = fdiv <4 x double> %num, %den 94 store <4 x double> %result, <4 x double> addrspace(1)* %out 95 ret void 96 } 97 98 ; GCN-LABEL: {{^}}div_fast_2_x_pat_f64: 99 ; GCN: v_mul_f64 [[MUL:v\[[0-9]+:[0-9]+\]]], v{{\[[0-9]+:[0-9]+\]}}, 0.5 100 ; GCN: buffer_store_dwordx2 [[MUL]] 101 define amdgpu_kernel void @div_fast_2_x_pat_f64(double addrspace(1)* %out) #1 { 102 %x = load double, double addrspace(1)* undef 103 %rcp = fdiv fast double %x, 2.0 104 store double %rcp, double addrspace(1)* %out, align 4 105 ret void 106 } 107 108 ; GCN-LABEL: {{^}}div_fast_k_x_pat_f64: 109 ; GCN-DAG: s_mov_b32 s[[K_LO:[0-9]+]], 0x9999999a 110 ; GCN-DAG: s_mov_b32 s[[K_HI:[0-9]+]], 0x3fb99999 111 ; GCN: v_mul_f64 [[MUL:v\[[0-9]+:[0-9]+\]]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[}}[[K_LO]]:[[K_HI]]{{\]}} 112 ; GCN: buffer_store_dwordx2 [[MUL]] 113 define amdgpu_kernel void @div_fast_k_x_pat_f64(double addrspace(1)* %out) #1 { 114 %x = load double, double addrspace(1)* undef 115 %rcp = fdiv fast double %x, 10.0 116 store double %rcp, double addrspace(1)* %out, align 4 117 ret void 118 } 119 120 ; GCN-LABEL: {{^}}div_fast_neg_k_x_pat_f64: 121 ; GCN-DAG: s_mov_b32 s[[K_LO:[0-9]+]], 0x9999999a 122 ; GCN-DAG: s_mov_b32 s[[K_HI:[0-9]+]], 0xbfb99999 123 ; GCN: v_mul_f64 [[MUL:v\[[0-9]+:[0-9]+\]]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[}}[[K_LO]]:[[K_HI]]{{\]}} 124 ; GCN: buffer_store_dwordx2 [[MUL]] 125 define amdgpu_kernel void @div_fast_neg_k_x_pat_f64(double addrspace(1)* %out) #1 { 126 %x = load double, double addrspace(1)* undef 127 %rcp = fdiv fast double %x, -10.0 128 store double %rcp, double addrspace(1)* %out, align 4 129 ret void 130 } 131 132 attributes #0 = { nounwind } 133 attributes #1 = { nounwind "unsafe-fp-math"="true" } 134
