1 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=kaveri -mattr=-promote-alloca -amdgpu-sroa=0 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,CI %s 2 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -mattr=-promote-alloca -amdgpu-sroa=0 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX9 %s 3 4 ; Test that non-entry function frame indices are expanded properly to 5 ; give an index relative to the scratch wave offset register 6 7 ; Materialize into a mov. Make sure there isn't an unnecessary copy. 8 ; GCN-LABEL: {{^}}func_mov_fi_i32: 9 ; GCN: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 10 ; GCN: s_sub_u32 s6, s5, s4 11 12 ; CI-NEXT: v_lshr_b32_e64 [[SCALED:v[0-9]+]], s6, 6 13 ; CI-NEXT: v_add_i32_e64 v0, s[6:7], 4, [[SCALED]] 14 15 ; GFX9-NEXT: v_lshrrev_b32_e64 [[SCALED:v[0-9]+]], 6, s6 16 ; GFX9-NEXT: v_add_u32_e32 v0, 4, [[SCALED]] 17 18 ; GCN-NOT: v_mov 19 ; GCN: ds_write_b32 v0, v0 20 define void @func_mov_fi_i32() #0 { 21 %alloca = alloca i32, addrspace(5) 22 store volatile i32 addrspace(5)* %alloca, i32 addrspace(5)* addrspace(3)* undef 23 ret void 24 } 25 26 ; Materialize into an add of a constant offset from the FI. 27 ; FIXME: Should be able to merge adds 28 29 ; GCN-LABEL: {{^}}func_add_constant_to_fi_i32: 30 ; GCN: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 31 ; GCN: s_sub_u32 s6, s5, s4 32 33 ; CI-NEXT: v_lshr_b32_e64 [[SCALED:v[0-9]+]], s6, 6 34 ; CI-NEXT: v_add_i32_e64 v0, s[6:7], 4, [[SCALED]] 35 ; CI-NEXT: v_add_i32_e32 v0, vcc, 4, v0 36 37 ; GFX9-NEXT: v_lshrrev_b32_e64 [[SCALED:v[0-9]+]], 6, s6 38 ; GFX9-NEXT: v_add_u32_e32 v0, 4, [[SCALED]] 39 ; GFX9-NEXT: v_add_u32_e32 v0, 4, v0 40 41 42 ; GCN-NOT: v_mov 43 ; GCN: ds_write_b32 v0, v0 44 define void @func_add_constant_to_fi_i32() #0 { 45 %alloca = alloca [2 x i32], align 4, addrspace(5) 46 %gep0 = getelementptr inbounds [2 x i32], [2 x i32] addrspace(5)* %alloca, i32 0, i32 1 47 store volatile i32 addrspace(5)* %gep0, i32 addrspace(5)* addrspace(3)* undef 48 ret void 49 } 50 51 ; A user the materialized frame index can't be meaningfully folded 52 ; into. 53 54 ; GCN-LABEL: {{^}}func_other_fi_user_i32: 55 ; GCN: s_sub_u32 s6, s5, s4 56 57 ; CI-NEXT: v_lshr_b32_e64 [[SCALED:v[0-9]+]], s6, 6 58 ; CI-NEXT: v_add_i32_e64 v0, s[6:7], 4, [[SCALED]] 59 60 ; GFX9-NEXT: v_lshrrev_b32_e64 [[SCALED:v[0-9]+]], 6, s6 61 ; GFX9-NEXT: v_add_u32_e32 v0, 4, [[SCALED]] 62 63 ; GCN-NEXT: v_mul_lo_i32 v0, v0, 9 64 ; GCN-NOT: v_mov 65 ; GCN: ds_write_b32 v0, v0 66 define void @func_other_fi_user_i32() #0 { 67 %alloca = alloca [2 x i32], align 4, addrspace(5) 68 %ptrtoint = ptrtoint [2 x i32] addrspace(5)* %alloca to i32 69 %mul = mul i32 %ptrtoint, 9 70 store volatile i32 %mul, i32 addrspace(3)* undef 71 ret void 72 } 73 74 ; GCN-LABEL: {{^}}func_store_private_arg_i32_ptr: 75 ; GCN: v_mov_b32_e32 v1, 15{{$}} 76 ; GCN: buffer_store_dword v1, v0, s[0:3], s4 offen{{$}} 77 define void @func_store_private_arg_i32_ptr(i32 addrspace(5)* %ptr) #0 { 78 store volatile i32 15, i32 addrspace(5)* %ptr 79 ret void 80 } 81 82 ; GCN-LABEL: {{^}}func_load_private_arg_i32_ptr: 83 ; GCN: s_waitcnt 84 ; GCN-NEXT: buffer_load_dword v0, v0, s[0:3], s4 offen{{$}} 85 define void @func_load_private_arg_i32_ptr(i32 addrspace(5)* %ptr) #0 { 86 %val = load volatile i32, i32 addrspace(5)* %ptr 87 ret void 88 } 89 90 ; GCN-LABEL: {{^}}void_func_byval_struct_i8_i32_ptr: 91 ; GCN: s_waitcnt 92 ; GCN-NEXT: s_mov_b32 s5, s32 93 ; GCN-NEXT: s_sub_u32 [[SUB_OFFSET:s[0-9]+]], s5, s4 94 95 ; CI-NEXT: v_lshr_b32_e64 [[SHIFT:v[0-9]+]], [[SUB_OFFSET]], 6 96 ; CI-NEXT: v_add_i32_e64 [[ADD:v[0-9]+]], {{s\[[0-9]+:[0-9]+\]}}, 4, [[SHIFT]] 97 ; CI-NEXT: v_add_i32_e32 v0, vcc, 4, [[ADD]] 98 99 ; GFX9-NEXT: v_lshrrev_b32_e64 [[SHIFT:v[0-9]+]], 6, [[SUB_OFFSET]] 100 ; GFX9-NEXT: v_add_u32_e32 [[ADD:v[0-9]+]], 4, [[SHIFT]] 101 ; GFX9-NEXT: v_add_u32_e32 v0, 4, [[ADD]] 102 103 ; GCN-NOT: v_mov 104 ; GCN: ds_write_b32 v0, v0 105 define void @void_func_byval_struct_i8_i32_ptr({ i8, i32 } addrspace(5)* byval %arg0) #0 { 106 %gep0 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %arg0, i32 0, i32 0 107 %gep1 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %arg0, i32 0, i32 1 108 %load1 = load i32, i32 addrspace(5)* %gep1 109 store volatile i32 addrspace(5)* %gep1, i32 addrspace(5)* addrspace(3)* undef 110 ret void 111 } 112 113 ; GCN-LABEL: {{^}}void_func_byval_struct_i8_i32_ptr_value: 114 ; GCN: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 115 ; GCN-NEXT: s_mov_b32 s5, s32 116 ; GCN-NEXT: buffer_load_ubyte v0, off, s[0:3], s5 117 ; GCN_NEXT: buffer_load_dword v1, off, s[0:3], s5 offset:4 118 define void @void_func_byval_struct_i8_i32_ptr_value({ i8, i32 } addrspace(5)* byval %arg0) #0 { 119 %gep0 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %arg0, i32 0, i32 0 120 %gep1 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %arg0, i32 0, i32 1 121 %load0 = load i8, i8 addrspace(5)* %gep0 122 %load1 = load i32, i32 addrspace(5)* %gep1 123 store volatile i8 %load0, i8 addrspace(3)* undef 124 store volatile i32 %load1, i32 addrspace(3)* undef 125 ret void 126 } 127 128 ; FIXME: Should be able to see that this can use vaddr, but the 129 ; FrameIndex is hidden behind a CopyFromReg in the second block. 130 131 ; GCN-LABEL: {{^}}void_func_byval_struct_i8_i32_ptr_nonentry_block: 132 ; GCN: s_sub_u32 [[SUB_OFFSET:s[0-9]+]], s5, s4 133 134 ; CI: v_lshr_b32_e64 [[SHIFT:v[0-9]+]], [[SUB_OFFSET]], 6 135 ; CI: v_add_i32_e64 [[ADD:v[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 4, [[SHIFT]] 136 137 ; GFX9: v_lshrrev_b32_e64 [[SHIFT:v[0-9]+]], 6, [[SUB_OFFSET]] 138 ; GFX9: v_add_u32_e32 [[ADD:v[0-9]+]], 4, [[SHIFT]] 139 140 ; GCN: s_and_saveexec_b64 141 142 ; CI: v_add_i32_e32 v0, vcc, 4, [[ADD]] 143 ; CI: buffer_load_dword v1, v1, s[0:3], s4 offen offset:4{{$}} 144 145 ; GFX9: v_add_u32_e32 v0, 4, [[ADD]] 146 ; GFX9: buffer_load_dword v1, v{{[0-9]+}}, s[0:3], s4 offen offset:4{{$}} 147 148 ; GCN: ds_write_b32 149 define void @void_func_byval_struct_i8_i32_ptr_nonentry_block({ i8, i32 } addrspace(5)* byval %arg0, i32 %arg2) #0 { 150 %cmp = icmp eq i32 %arg2, 0 151 br i1 %cmp, label %bb, label %ret 152 153 bb: 154 %gep0 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %arg0, i32 0, i32 0 155 %gep1 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %arg0, i32 0, i32 1 156 %load1 = load volatile i32, i32 addrspace(5)* %gep1 157 store volatile i32 addrspace(5)* %gep1, i32 addrspace(5)* addrspace(3)* undef 158 br label %ret 159 160 ret: 161 ret void 162 } 163 164 ; Added offset can't be used with VOP3 add 165 ; GCN-LABEL: {{^}}func_other_fi_user_non_inline_imm_offset_i32: 166 ; GCN: s_sub_u32 s6, s5, s4 167 ; GCN-DAG: s_movk_i32 s6, 0x204 168 169 ; CI-DAG: v_lshr_b32_e64 [[SCALED:v[0-9]+]], s6, 6 170 ; CI: v_add_i32_e64 v0, s[6:7], s6, [[SCALED]] 171 172 ; GFX9-DAG: v_lshrrev_b32_e64 [[SCALED:v[0-9]+]], 6, s6 173 ; GFX9: v_add_u32_e32 v0, s6, [[SCALED]] 174 175 ; GCN: v_mul_lo_i32 v0, v0, 9 176 ; GCN: ds_write_b32 v0, v0 177 define void @func_other_fi_user_non_inline_imm_offset_i32() #0 { 178 %alloca0 = alloca [128 x i32], align 4, addrspace(5) 179 %alloca1 = alloca [8 x i32], align 4, addrspace(5) 180 %gep0 = getelementptr inbounds [128 x i32], [128 x i32] addrspace(5)* %alloca0, i32 0, i32 65 181 %gep1 = getelementptr inbounds [8 x i32], [8 x i32] addrspace(5)* %alloca1, i32 0, i32 0 182 store volatile i32 7, i32 addrspace(5)* %gep0 183 %ptrtoint = ptrtoint i32 addrspace(5)* %gep1 to i32 184 %mul = mul i32 %ptrtoint, 9 185 store volatile i32 %mul, i32 addrspace(3)* undef 186 ret void 187 } 188 189 ; GCN-LABEL: {{^}}func_other_fi_user_non_inline_imm_offset_i32_vcc_live: 190 ; GCN: s_sub_u32 [[DIFF:s[0-9]+]], s5, s4 191 ; GCN-DAG: s_movk_i32 [[OFFSET:s[0-9]+]], 0x204 192 193 ; CI-DAG: v_lshr_b32_e64 [[SCALED:v[0-9]+]], [[DIFF]], 6 194 ; CI: v_add_i32_e64 v0, s{{\[[0-9]+:[0-9]+\]}}, [[OFFSET]], [[SCALED]] 195 196 ; GFX9-DAG: v_lshrrev_b32_e64 [[SCALED:v[0-9]+]], 6, [[DIFF]] 197 ; GFX9: v_add_u32_e32 v0, [[OFFSET]], [[SCALED]] 198 199 ; GCN: v_mul_lo_i32 v0, v0, 9 200 ; GCN: ds_write_b32 v0, v0 201 define void @func_other_fi_user_non_inline_imm_offset_i32_vcc_live() #0 { 202 %alloca0 = alloca [128 x i32], align 4, addrspace(5) 203 %alloca1 = alloca [8 x i32], align 4, addrspace(5) 204 %vcc = call i64 asm sideeffect "; def $0", "={VCC}"() 205 %gep0 = getelementptr inbounds [128 x i32], [128 x i32] addrspace(5)* %alloca0, i32 0, i32 65 206 %gep1 = getelementptr inbounds [8 x i32], [8 x i32] addrspace(5)* %alloca1, i32 0, i32 0 207 store volatile i32 7, i32 addrspace(5)* %gep0 208 call void asm sideeffect "; use $0", "{VCC}"(i64 %vcc) 209 %ptrtoint = ptrtoint i32 addrspace(5)* %gep1 to i32 210 %mul = mul i32 %ptrtoint, 9 211 store volatile i32 %mul, i32 addrspace(3)* undef 212 ret void 213 } 214 215 declare void @func(<4 x float> addrspace(5)* nocapture) #0 216 217 ; undef flag not preserved in eliminateFrameIndex when handling the 218 ; stores in the middle block. 219 220 ; GCN-LABEL: {{^}}undefined_stack_store_reg: 221 ; GCN: s_and_saveexec_b64 222 ; GCN: buffer_store_dword v0, off, s[0:3], s5 offset: 223 ; GCN: buffer_store_dword v0, off, s[0:3], s5 offset: 224 ; GCN: buffer_store_dword v0, off, s[0:3], s5 offset: 225 ; GCN: buffer_store_dword v{{[0-9]+}}, off, s[0:3], s5 offset: 226 define void @undefined_stack_store_reg(float %arg, i32 %arg1) #0 { 227 bb: 228 %tmp = alloca <4 x float>, align 16, addrspace(5) 229 %tmp2 = insertelement <4 x float> undef, float %arg, i32 0 230 store <4 x float> %tmp2, <4 x float> addrspace(5)* undef 231 %tmp3 = icmp eq i32 %arg1, 0 232 br i1 %tmp3, label %bb4, label %bb5 233 234 bb4: 235 call void @func(<4 x float> addrspace(5)* nonnull undef) 236 store <4 x float> %tmp2, <4 x float> addrspace(5)* %tmp, align 16 237 call void @func(<4 x float> addrspace(5)* nonnull %tmp) 238 br label %bb5 239 240 bb5: 241 ret void 242 } 243 244 ; GCN-LABEL: {{^}}alloca_ptr_nonentry_block: 245 ; GCN: s_and_saveexec_b64 246 ; GCN: buffer_load_dword v{{[0-9]+}}, off, s[0:3], s5 offset:12 247 define void @alloca_ptr_nonentry_block(i32 %arg0) #0 { 248 %alloca0 = alloca { i8, i32 }, align 4, addrspace(5) 249 %cmp = icmp eq i32 %arg0, 0 250 br i1 %cmp, label %bb, label %ret 251 252 bb: 253 %gep0 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %alloca0, i32 0, i32 0 254 %gep1 = getelementptr inbounds { i8, i32 }, { i8, i32 } addrspace(5)* %alloca0, i32 0, i32 1 255 %load1 = load volatile i32, i32 addrspace(5)* %gep1 256 store volatile i32 addrspace(5)* %gep1, i32 addrspace(5)* addrspace(3)* undef 257 br label %ret 258 259 ret: 260 ret void 261 } 262 263 attributes #0 = { nounwind } 264
