1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=NOHSA %s 2 ; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=HSA %s 3 4 @private1 = private unnamed_addr addrspace(4) constant [4 x float] [float 0.0, float 1.0, float 2.0, float 3.0] 5 @private2 = private unnamed_addr addrspace(4) constant [4 x float] [float 4.0, float 5.0, float 6.0, float 7.0] 6 @available_externally = available_externally addrspace(4) global [256 x i32] zeroinitializer 7 8 ; GCN-LABEL: {{^}}private_test: 9 ; GCN: s_getpc_b64 s{{\[}}[[PC0_LO:[0-9]+]]:[[PC0_HI:[0-9]+]]{{\]}} 10 11 ; Non-HSA OSes use fixup into .text section. 12 ; NOHSA: s_add_u32 s{{[0-9]+}}, s[[PC0_LO]], private1 13 ; NOHSA: s_addc_u32 s{{[0-9]+}}, s[[PC0_HI]], 0 14 15 ; HSA OSes use relocations. 16 ; HSA: s_add_u32 s{{[0-9]+}}, s[[PC0_LO]], private1@rel32@lo+4 17 ; HSA: s_addc_u32 s{{[0-9]+}}, s[[PC0_HI]], private1@rel32@hi+4 18 19 ; GCN: s_getpc_b64 s{{\[}}[[PC1_LO:[0-9]+]]:[[PC1_HI:[0-9]+]]{{\]}} 20 21 ; Non-HSA OSes use fixup into .text section. 22 ; NOHSA: s_add_u32 s{{[0-9]+}}, s[[PC1_LO]], private2 23 ; NOHSA: s_addc_u32 s{{[0-9]+}}, s[[PC1_HI]], 0 24 25 ; HSA OSes use relocations. 26 ; HSA: s_add_u32 s{{[0-9]+}}, s[[PC1_LO]], private2@rel32@lo+4 27 ; HSA: s_addc_u32 s{{[0-9]+}}, s[[PC1_HI]], private2@rel32@hi+4 28 29 define amdgpu_kernel void @private_test(i32 %index, float addrspace(1)* %out) { 30 %ptr = getelementptr [4 x float], [4 x float] addrspace(4) * @private1, i32 0, i32 %index 31 %val = load float, float addrspace(4)* %ptr 32 store volatile float %val, float addrspace(1)* %out 33 %ptr2 = getelementptr [4 x float], [4 x float] addrspace(4) * @private2, i32 0, i32 %index 34 %val2 = load float, float addrspace(4)* %ptr2 35 store volatile float %val2, float addrspace(1)* %out 36 ret void 37 } 38 39 ; HSA-LABEL: {{^}}available_externally_test: 40 ; HSA: s_getpc_b64 s{{\[}}[[PC0_LO:[0-9]+]]:[[PC0_HI:[0-9]+]]{{\]}} 41 ; HSA: s_add_u32 s{{[0-9]+}}, s[[PC0_LO]], available_externally@gotpcrel32@lo+4 42 ; HSA: s_addc_u32 s{{[0-9]+}}, s[[PC0_HI]], available_externally@gotpcrel32@hi+4 43 define amdgpu_kernel void @available_externally_test(i32 addrspace(1)* %out) { 44 %ptr = getelementptr [256 x i32], [256 x i32] addrspace(4)* @available_externally, i32 0, i32 1 45 %val = load i32, i32 addrspace(4)* %ptr 46 store i32 %val, i32 addrspace(1)* %out 47 ret void 48 } 49 50 ; NOHSA: .text 51 ; HSA: .section .rodata 52 53 ; GCN: private1: 54 ; GCN: private2: 55
