Home | History | Annotate | Download | only in AMDGPU
      1 ; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=kaveri | FileCheck --check-prefix=HSA %s
      2 ; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=kaveri | FileCheck --check-prefix=HSA-CI %s
      3 ; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=carrizo  | FileCheck --check-prefix=HSA %s
      4 ; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=carrizo | FileCheck --check-prefix=HSA-VI %s
      5 ; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=kaveri -filetype=obj | llvm-readobj -symbols -s -sd | FileCheck --check-prefix=ELF %s
      6 ; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=kaveri | llvm-mc -filetype=obj -triple amdgcn--amdhsa -mcpu=kaveri | llvm-readobj -symbols -s -sd | FileCheck %s --check-prefix=ELF
      7 
      8 ; The SHT_NOTE section contains the output from the .hsa_code_object_*
      9 ; directives.
     10 
     11 ; ELF: Section {
     12 ; ELF: Name: .text
     13 ; ELF: Type: SHT_PROGBITS (0x1)
     14 ; ELF: Flags [ (0x6)
     15 ; ELF: SHF_ALLOC (0x2)
     16 ; ELF: SHF_EXECINSTR (0x4)
     17 ; ELF: AddressAlignment: 4
     18 ; ELF: }
     19 
     20 ; ELF: SHT_NOTE
     21 ; ELF: 0000: 04000000 08000000 01000000 414D4400
     22 ; ELF: 0010: 02000000 01000000 04000000 1B000000
     23 
     24 ; ELF: 0020: 03000000 414D4400 04000700 07000000
     25 ; ELF: 0030: 00000000 00000000 414D4400 414D4447
     26 ; ELF: 0040: 50550000
     27 
     28 ; ELF: Symbol {
     29 ; ELF: Name: simple
     30 ; ELF: Size: 36
     31 ; ELF: Type: Function (0x2)
     32 ; ELF: }
     33 
     34 ; HSA: .text
     35 ; HSA: .hsa_code_object_version 2,1
     36 ; HSA-CI: .hsa_code_object_isa 7,0,0,"AMD","AMDGPU"
     37 ; HSA-VI: .hsa_code_object_isa 8,0,1,"AMD","AMDGPU"
     38 
     39 ; HSA-NOT: .amdgpu_hsa_kernel simple
     40 ; HSA: .globl simple
     41 ; HSA: .p2align 2
     42 ; HSA: {{^}}simple:
     43 ; HSA-NOT: amd_kernel_code_t
     44 ; HSA: flat_load_dwordx2 v{{\[[0-9]+:[0-9]+\]}}, v[0:1]
     45 
     46 ; Make sure we are setting the ATC bit:
     47 ; Make sure we generate flat store for HSA
     48 ; HSA: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}}
     49 
     50 ; HSA: .Lfunc_end0:
     51 ; HSA: .size   simple, .Lfunc_end0-simple
     52 ; HSA: ; Function info:
     53 ; HSA-NOT: COMPUTE_PGM_RSRC2
     54 define void @simple(i32 addrspace(1)* addrspace(4)* %ptr.out) {
     55 entry:
     56   %out = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(4)* %ptr.out
     57   store i32 0, i32 addrspace(1)* %out
     58   ret void
     59 }
     60 
     61 ; Ignore explicit alignment that is too low.
     62 ; HSA: .globl simple_align2
     63 ; HSA: .p2align 2
     64 define void @simple_align2(i32 addrspace(1)* addrspace(4)* %ptr.out) align 2 {
     65 entry:
     66   %out = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(4)* %ptr.out
     67   store i32 0, i32 addrspace(1)* %out
     68   ret void
     69 }
     70