1 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN %s 2 ; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s 2>&1 | FileCheck -enable-var-scope -check-prefix=GCN %s 3 ; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s 2>&1 | FileCheck -enable-var-scope -check-prefix=GCN %s 4 5 ; GCN-LABEL: {{^}}s_input_output_i16: 6 ; GCN: s_mov_b32 s[[REG:[0-9]+]], -1 7 ; GCN: ; use s[[REG]] 8 define amdgpu_kernel void @s_input_output_i16() #0 { 9 %v = tail call i16 asm sideeffect "s_mov_b32 $0, -1", "=s"() 10 tail call void asm sideeffect "; use $0", "s"(i16 %v) #0 11 ret void 12 } 13 14 ; GCN-LABEL: {{^}}v_input_output_i16: 15 ; GCN: v_mov_b32 v[[REG:[0-9]+]], -1 16 ; GCN: ; use v[[REG]] 17 define amdgpu_kernel void @v_input_output_i16() #0 { 18 %v = tail call i16 asm sideeffect "v_mov_b32 $0, -1", "=v"() #0 19 tail call void asm sideeffect "; use $0", "v"(i16 %v) 20 ret void 21 } 22 23 ; GCN-LABEL: {{^}}s_input_output_f16: 24 ; GCN: s_mov_b32 s[[REG:[0-9]+]], -1 25 ; GCN: ; use s[[REG]] 26 define amdgpu_kernel void @s_input_output_f16() #0 { 27 %v = tail call half asm sideeffect "s_mov_b32 $0, -1", "=s"() #0 28 tail call void asm sideeffect "; use $0", "s"(half %v) 29 ret void 30 } 31 32 ; GCN-LABEL: {{^}}v_input_output_f16: 33 ; GCN: v_mov_b32 v[[REG:[0-9]+]], -1 34 ; GCN: ; use v[[REG]] 35 define amdgpu_kernel void @v_input_output_f16() #0 { 36 %v = tail call half asm sideeffect "v_mov_b32 $0, -1", "=v"() #0 37 tail call void asm sideeffect "; use $0", "v"(half %v) 38 ret void 39 } 40 41 attributes #0 = { nounwind } 42
