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      1 ; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX9 -check-prefix=GCN %s
      2 
      3 ; GCN-LABEL: {{^}}inline_asm_input_v2i16:
      4 ; GCN: s_mov_b32 s{{[0-9]+}}, s{{[0-9]+}}
      5 define amdgpu_kernel void @inline_asm_input_v2i16(i32 addrspace(1)* %out, <2 x i16> %in) #0 {
      6 entry:
      7   %val = call i32 asm "s_mov_b32 $0, $1", "=r,r"(<2 x i16> %in) #0
      8   store i32 %val, i32 addrspace(1)* %out
      9   ret void
     10 }
     11 
     12 ; GCN-LABEL: {{^}}inline_asm_input_v2f16:
     13 ; GCN: s_mov_b32 s0, s{{[0-9]+}}
     14 define amdgpu_kernel void @inline_asm_input_v2f16(i32 addrspace(1)* %out, <2 x half> %in) #0 {
     15 entry:
     16   %val = call i32 asm "s_mov_b32 $0, $1", "=r,r"(<2 x half> %in) #0
     17   store i32 %val, i32 addrspace(1)* %out
     18   ret void
     19 }
     20 
     21 ; GCN-LABEL: {{^}}inline_asm_output_v2i16:
     22 ; GCN: s_mov_b32 s{{[0-9]+}}, s{{[0-9]+}}
     23 define amdgpu_kernel void @inline_asm_output_v2i16(<2 x i16> addrspace(1)* %out, i32 %in) #0 {
     24 entry:
     25   %val = call <2 x i16> asm "s_mov_b32 $0, $1", "=r,r"(i32 %in) #0
     26   store <2 x i16> %val, <2 x i16> addrspace(1)* %out
     27   ret void
     28 }
     29 
     30 ; GCN-LABEL: {{^}}inline_asm_output_v2f16:
     31 ; GCN: v_mov_b32 v{{[0-9]+}}, s{{[0-9]+}}
     32 define amdgpu_kernel void @inline_asm_output_v2f16(<2 x half> addrspace(1)* %out, i32 %in) #0 {
     33 entry:
     34   %val = call <2 x half> asm "v_mov_b32 $0, $1", "=v,r"(i32 %in) #0
     35   store <2 x half> %val, <2 x half> addrspace(1)* %out
     36   ret void
     37 }
     38 
     39 ; GCN-LABEL: {{^}}inline_asm_packed_v2i16:
     40 ; GCN: v_pk_add_u16 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}
     41 define amdgpu_kernel void @inline_asm_packed_v2i16(<2 x i16> addrspace(1)* %out, <2 x i16> %in0, <2 x i16> %in1) #0 {
     42 entry:
     43   %val = call <2 x i16> asm "v_pk_add_u16 $0, $1, $2", "=v,r,v"(<2 x i16> %in0, <2 x i16> %in1) #0
     44   store <2 x i16> %val, <2 x i16> addrspace(1)* %out
     45   ret void
     46 }
     47 
     48 ; GCN-LABEL: {{^}}inline_asm_packed_v2f16:
     49 ; GCN: v_pk_add_f16 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}
     50 define amdgpu_kernel void @inline_asm_packed_v2f16(<2 x half> addrspace(1)* %out, <2 x half> %in0, <2 x half> %in1) #0 {
     51 entry:
     52   %val = call <2 x half> asm "v_pk_add_f16 $0, $1, $2", "=v,r,v"(<2 x half> %in0, <2 x half> %in1) #0
     53   store <2 x half> %val, <2 x half> addrspace(1)* %out
     54   ret void
     55 }
     56 
     57 attributes #0 = { nounwind }
     58