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      1 # RUN: llc -run-pass block-placement -march=amdgcn -verify-machineinstrs -o - %s | FileCheck %s
      2 --- |
      3 
      4   define amdgpu_kernel void @invert_br_undef_vcc(float %cond, i32 addrspace(1)* %out) #0 {
      5   entry:
      6     br i1 undef, label %if, label %else, !structurizecfg.uniform !0, !amdgpu.uniform !0
      7 
      8   else:                                             ; preds = %entry
      9     store volatile i32 100, i32 addrspace(1)* undef
     10     br label %done, !structurizecfg.uniform !0
     11 
     12   if:                                               ; preds = %entry
     13     store volatile i32 9, i32 addrspace(1)* undef
     14     br label %done, !structurizecfg.uniform !0
     15 
     16   done:                                             ; preds = %if, %else
     17     %value = phi i32 [ 0, %if ], [ 1, %else ]
     18     store i32 %value, i32 addrspace(1)* %out
     19     ret void
     20   }
     21 
     22   attributes #0 = { nounwind }
     23 
     24   !0 = !{}
     25 
     26 ...
     27 ---
     28 # CHECK-LABEL: name: invert_br_undef_vcc
     29 # CHECK: S_CBRANCH_VCCZ %bb.1, implicit undef $vcc
     30 
     31 name:            invert_br_undef_vcc
     32 alignment:       0
     33 exposesReturnsTwice: false
     34 legalized:       false
     35 regBankSelected: false
     36 selected:        false
     37 tracksRegLiveness: true
     38 liveins:
     39   - { reg: '$sgpr0_sgpr1' }
     40 frameInfo:
     41   isFrameAddressTaken: false
     42   isReturnAddressTaken: false
     43   hasStackMap:     false
     44   hasPatchPoint:   false
     45   stackSize:       0
     46   offsetAdjustment: 0
     47   maxAlignment:    0
     48   adjustsStack:    false
     49   hasCalls:        false
     50   maxCallFrameSize: 0
     51   hasOpaqueSPAdjustment: false
     52   hasVAStart:      false
     53   hasMustTailInVarArgFunc: false
     54 body:             |
     55   bb.0.entry:
     56     liveins: $sgpr0_sgpr1
     57 
     58     $sgpr0_sgpr1 = S_LOAD_DWORDX2_IMM killed $sgpr0_sgpr1, 11, 0 :: (non-temporal dereferenceable invariant load 8 from `i64 addrspace(2)* undef`)
     59     $sgpr7 = S_MOV_B32 61440
     60     $sgpr6 = S_MOV_B32 -1
     61     S_CBRANCH_VCCNZ %bb.2, implicit undef $vcc
     62 
     63   bb.1.else:
     64     liveins: $sgpr6, $sgpr7, $sgpr0_sgpr1_sgpr2_sgpr3:0x00000003
     65 
     66     $vgpr0 = V_MOV_B32_e32 100, implicit $exec
     67     BUFFER_STORE_DWORD_OFFSET killed $vgpr0, killed $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec :: (volatile store 4 into `i32 addrspace(1)* undef`)
     68     $vgpr0 = V_MOV_B32_e32 1, implicit $exec
     69     S_BRANCH %bb.3
     70 
     71   bb.2.if:
     72     liveins: $sgpr6, $sgpr7, $sgpr0_sgpr1_sgpr2_sgpr3:0x00000003
     73 
     74     $vgpr0 = V_MOV_B32_e32 9, implicit $exec
     75     BUFFER_STORE_DWORD_OFFSET killed $vgpr0, killed $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec :: (volatile store 4 into `i32 addrspace(1)* undef`)
     76     $vgpr0 = V_MOV_B32_e32 0, implicit $exec
     77 
     78   bb.3.done:
     79     liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3:0x00000003
     80 
     81     $sgpr3 = S_MOV_B32 61440
     82     $sgpr2 = S_MOV_B32 -1
     83     BUFFER_STORE_DWORD_OFFSET killed $vgpr0, killed $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec :: (store 4 into %ir.out)
     84     S_ENDPGM
     85 
     86 ...
     87