1 ; RUN: llc -mtriple=amdgcn--amdhsa -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s 2 3 declare i64 @llvm.amdgcn.dispatch.id() #1 4 5 ; GCN-LABEL: {{^}}dispatch_id: 6 ; GCN: .amd_kernel_code_t 7 ; GCN: enable_sgpr_dispatch_id = 1 8 9 ; GCN-DAG: v_mov_b32_e32 v[[LO:[0-9]+]], s6 10 ; GCN-DAG: v_mov_b32_e32 v[[HI:[0-9]+]], s7 11 ; GCN: flat_store_dwordx2 v{{\[[0-9]+:[0-9]+\]}}, v{{\[}}[[LO]]:[[HI]]{{\]}} 12 define amdgpu_kernel void @dispatch_id(i64 addrspace(1)* %out) #0 { 13 %tmp0 = call i64 @llvm.amdgcn.dispatch.id() 14 store i64 %tmp0, i64 addrspace(1)* %out 15 ret void 16 } 17 18 attributes #0 = { nounwind } 19 attributes #1 = { nounwind readnone } 20
