1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -strict-whitespace -check-prefix=GCN %s 2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -strict-whitespace -check-prefix=GCN %s 3 ; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -strict-whitespace -check-prefix=GCN %s 4 5 declare void @llvm.amdgcn.exp.compr.v2f16(i32, i32, <2 x half>, <2 x half>, i1, i1) #0 6 declare void @llvm.amdgcn.exp.compr.v2i16(i32, i32, <2 x i16>, <2 x i16>, i1, i1) #0 7 8 ; GCN-LABEL: {{^}}test_export_compr_zeroes_v2f16: 9 ; GCN: exp mrt0 off, off, off, off compr{{$}} 10 ; GCN: exp mrt0 off, off, off, off done compr{{$}} 11 define amdgpu_kernel void @test_export_compr_zeroes_v2f16() #0 { 12 call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 0, <2 x half> zeroinitializer, <2 x half> zeroinitializer, i1 false, i1 false) 13 call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 0, <2 x half> zeroinitializer, <2 x half> zeroinitializer, i1 true, i1 false) 14 ret void 15 } 16 17 ; GCN-LABEL: {{^}}test_export_compr_en_src0_v2f16: 18 ; GCN-DAG: v_mov_b32_e32 [[SRC0:v[0-9]+]], 0x40003c00 19 ; GCN-DAG: v_mov_b32_e32 [[SRC1:v[0-9]+]], 0x44003800 20 ; GCN: exp mrt0 [[SRC0]], [[SRC0]], off, off done compr{{$}} 21 define amdgpu_kernel void @test_export_compr_en_src0_v2f16() #0 { 22 call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 3, <2 x half> <half 1.0, half 2.0>, <2 x half> <half 0.5, half 4.0>, i1 true, i1 false) 23 ret void 24 } 25 26 ; GCN-LABEL: {{^}}test_export_compr_en_src1_v2f16: 27 ; GCN-DAG: v_mov_b32_e32 [[SRC0:v[0-9]+]], 0x40003c00 28 ; GCN-DAG: v_mov_b32_e32 [[SRC1:v[0-9]+]], 0x44003800 29 ; GCN: exp mrt0 off, off, [[SRC1]], [[SRC1]] done compr{{$}} 30 define amdgpu_kernel void @test_export_compr_en_src1_v2f16() #0 { 31 call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 12, <2 x half> <half 1.0, half 2.0>, <2 x half> <half 0.5, half 4.0>, i1 true, i1 false) 32 ret void 33 } 34 35 ; GCN-LABEL: {{^}}test_export_compr_en_src0_src1_v2f16: 36 ; GCN-DAG: v_mov_b32_e32 [[SRC0:v[0-9]+]], 0x40003c00 37 ; GCN-DAG: v_mov_b32_e32 [[SRC1:v[0-9]+]], 0x44003800 38 ; GCN: exp mrt0 [[SRC0]], [[SRC0]], [[SRC1]], [[SRC1]] done compr{{$}} 39 define amdgpu_kernel void @test_export_compr_en_src0_src1_v2f16() #0 { 40 call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 15, <2 x half> <half 1.0, half 2.0>, <2 x half> <half 0.5, half 4.0>, i1 true, i1 false) 41 ret void 42 } 43 44 ; GCN-LABEL: {{^}}test_export_compr_en_invalid2_v2f16: 45 ; GCN-DAG: v_mov_b32_e32 [[SRC0:v[0-9]+]], 0x40003c00 46 ; GCN-DAG: v_mov_b32_e32 [[SRC1:v[0-9]+]], 0x44003800 47 ; GCN: exp mrt0 off, [[SRC0]], off, off done compr{{$}} 48 define amdgpu_kernel void @test_export_compr_en_invalid2_v2f16() #0 { 49 call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 2, <2 x half> <half 1.0, half 2.0>, <2 x half> <half 0.5, half 4.0>, i1 true, i1 false) 50 ret void 51 } 52 53 ; GCN-LABEL: {{^}}test_export_compr_en_invalid10_v2f16: 54 ; GCN-DAG: v_mov_b32_e32 [[SRC0:v[0-9]+]], 0x40003c00 55 ; GCN-DAG: v_mov_b32_e32 [[SRC1:v[0-9]+]], 0x44003800 56 ; GCN: exp mrt0 off, [[SRC0]], off, [[SRC1]] done compr{{$}} 57 define amdgpu_kernel void @test_export_compr_en_invalid10_v2f16() #0 { 58 call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 10, <2 x half> <half 1.0, half 2.0>, <2 x half> <half 0.5, half 4.0>, i1 true, i1 false) 59 ret void 60 } 61 62 ; GCN-LABEL: {{^}}test_export_compr_mrt7_v2f16: 63 ; GCN-DAG: v_mov_b32_e32 [[VHALF:v[0-9]+]], 0x38003800 64 ; GCN: exp mrt7 [[VHALF]], [[VHALF]], [[VHALF]], [[VHALF]] compr{{$}} 65 ; GCN: exp mrt7 [[VHALF]], [[VHALF]], [[VHALF]], [[VHALF]] done compr{{$}} 66 define amdgpu_kernel void @test_export_compr_mrt7_v2f16() #0 { 67 call void @llvm.amdgcn.exp.compr.v2f16(i32 7, i32 15, <2 x half> <half 0.5, half 0.5>, <2 x half> <half 0.5, half 0.5>, i1 false, i1 false) 68 call void @llvm.amdgcn.exp.compr.v2f16(i32 7, i32 15, <2 x half> <half 0.5, half 0.5>, <2 x half> <half 0.5, half 0.5>, i1 true, i1 false) 69 ret void 70 } 71 72 ; GCN-LABEL: {{^}}test_export_compr_z_v2f16: 73 ; GCN-DAG: v_mov_b32_e32 [[SRC0:v[0-9]+]], 0x40003c00 74 ; GCN-DAG: v_mov_b32_e32 [[SRC1:v[0-9]+]], 0x44003800 75 ; GCN: exp mrtz [[SRC0]], [[SRC0]], [[SRC1]], [[SRC1]] compr{{$}} 76 ; GCN: exp mrtz [[SRC0]], [[SRC0]], [[SRC1]], [[SRC1]] done compr{{$}} 77 define amdgpu_kernel void @test_export_compr_z_v2f16() #0 { 78 call void @llvm.amdgcn.exp.compr.v2f16(i32 8, i32 15, <2 x half> <half 1.0, half 2.0>, <2 x half> <half 0.5, half 4.0>, i1 false, i1 false) 79 call void @llvm.amdgcn.exp.compr.v2f16(i32 8, i32 15, <2 x half> <half 1.0, half 2.0>, <2 x half> <half 0.5, half 4.0>, i1 true, i1 false) 80 ret void 81 } 82 83 ; GCN-LABEL: {{^}}test_export_compr_vm_v2f16: 84 ; GCN-DAG: v_mov_b32_e32 [[SRC0:v[0-9]+]], 0x40003c00 85 ; GCN-DAG: v_mov_b32_e32 [[SRC1:v[0-9]+]], 0x44003800 86 ; GCN: exp mrt0 [[SRC0]], [[SRC0]], [[SRC1]], [[SRC1]] compr vm{{$}} 87 ; GCN: exp mrt0 [[SRC0]], [[SRC0]], [[SRC1]], [[SRC1]] done compr vm{{$}} 88 define amdgpu_kernel void @test_export_compr_vm_v2f16() #0 { 89 call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 15, <2 x half> <half 1.0, half 2.0>, <2 x half> <half 0.5, half 4.0>, i1 false, i1 true) 90 call void @llvm.amdgcn.exp.compr.v2f16(i32 0, i32 15, <2 x half> <half 1.0, half 2.0>, <2 x half> <half 0.5, half 4.0>, i1 true, i1 true) 91 ret void 92 } 93 94 ; GCN-LABEL: {{^}}test_export_compr_zeroes_v2i16: 95 ; GCN: exp mrt0 off, off, off, off compr{{$}} 96 ; GCN: exp mrt0 off, off, off, off done compr{{$}} 97 define amdgpu_kernel void @test_export_compr_zeroes_v2i16() #0 { 98 call void @llvm.amdgcn.exp.compr.v2i16(i32 0, i32 0, <2 x i16> zeroinitializer, <2 x i16> zeroinitializer, i1 false, i1 false) 99 call void @llvm.amdgcn.exp.compr.v2i16(i32 0, i32 0, <2 x i16> zeroinitializer, <2 x i16> zeroinitializer, i1 true, i1 false) 100 ret void 101 } 102 103 ; GCN-LABEL: {{^}}test_export_compr_en_src0_v2i16: 104 ; GCN-DAG: v_mov_b32_e32 [[SRC0:v[0-9]+]], 0x20001 105 ; GCN-DAG: v_mov_b32_e32 [[SRC1:v[0-9]+]], 0x40005 106 ; GCN: exp mrt0 [[SRC0]], off, off, off done compr{{$}} 107 define amdgpu_kernel void @test_export_compr_en_src0_v2i16() #0 { 108 call void @llvm.amdgcn.exp.compr.v2i16(i32 0, i32 1, <2 x i16> <i16 1, i16 2>, <2 x i16> <i16 5, i16 4>, i1 true, i1 false) 109 ret void 110 } 111 112 ; GCN-LABEL: {{^}}test_export_compr_en_src1_v2i16: 113 ; GCN-DAG: v_mov_b32_e32 [[SRC0:v[0-9]+]], 0x20001 114 ; GCN-DAG: v_mov_b32_e32 [[SRC1:v[0-9]+]], 0x40005 115 ; GCN: exp mrt0 off, off, [[SRC1]], [[SRC1]] done compr{{$}} 116 define amdgpu_kernel void @test_export_compr_en_src1_v2i16() #0 { 117 call void @llvm.amdgcn.exp.compr.v2i16(i32 0, i32 12, <2 x i16> <i16 1, i16 2>, <2 x i16> <i16 5, i16 4>, i1 true, i1 false) 118 ret void 119 } 120 121 ; GCN-LABEL: {{^}}test_export_compr_en_src0_src1_v2i16: 122 ; GCN-DAG: v_mov_b32_e32 [[SRC0:v[0-9]+]], 0x20001 123 ; GCN-DAG: v_mov_b32_e32 [[SRC1:v[0-9]+]], 0x40005 124 ; GCN: exp mrt0 [[SRC0]], [[SRC0]], [[SRC1]], [[SRC1]] done compr{{$}} 125 define amdgpu_kernel void @test_export_compr_en_src0_src1_v2i16() #0 { 126 call void @llvm.amdgcn.exp.compr.v2i16(i32 0, i32 15, <2 x i16> <i16 1, i16 2>, <2 x i16> <i16 5, i16 4>, i1 true, i1 false) 127 ret void 128 } 129 130 ; GCN-LABEL: {{^}}test_export_compr_mrt7_v2i16: 131 ; GCN-DAG: v_mov_b32_e32 [[VI16:v[0-9]+]], 0x50005 132 ; GCN: exp mrt7 [[VI16]], [[VI16]], [[VI16]], [[VI16]] compr{{$}} 133 ; GCN: exp mrt7 [[VI16]], [[VI16]], [[VI16]], [[VI16]] done compr{{$}} 134 define amdgpu_kernel void @test_export_compr_mrt7_v2i16() #0 { 135 call void @llvm.amdgcn.exp.compr.v2i16(i32 7, i32 15, <2 x i16> <i16 5, i16 5>, <2 x i16> <i16 5, i16 5>, i1 false, i1 false) 136 call void @llvm.amdgcn.exp.compr.v2i16(i32 7, i32 15, <2 x i16> <i16 5, i16 5>, <2 x i16> <i16 5, i16 5>, i1 true, i1 false) 137 ret void 138 } 139 140 ; GCN-LABEL: {{^}}test_export_compr_z_v2i16: 141 ; GCN-DAG: v_mov_b32_e32 [[SRC0:v[0-9]+]], 0x20001 142 ; GCN-DAG: v_mov_b32_e32 [[SRC1:v[0-9]+]], 0x40005 143 ; GCN: exp mrtz [[SRC0]], [[SRC0]], [[SRC1]], [[SRC1]] compr{{$}} 144 ; GCN: exp mrtz [[SRC0]], [[SRC0]], [[SRC1]], [[SRC1]] done compr{{$}} 145 define amdgpu_kernel void @test_export_compr_z_v2i16() #0 { 146 call void @llvm.amdgcn.exp.compr.v2i16(i32 8, i32 15, <2 x i16> <i16 1, i16 2>, <2 x i16> <i16 5, i16 4>, i1 false, i1 false) 147 call void @llvm.amdgcn.exp.compr.v2i16(i32 8, i32 15, <2 x i16> <i16 1, i16 2>, <2 x i16> <i16 5, i16 4>, i1 true, i1 false) 148 ret void 149 } 150 151 ; GCN-LABEL: {{^}}test_export_compr_vm_v2i16: 152 ; GCN-DAG: v_mov_b32_e32 [[SRC0:v[0-9]+]], 0x20001 153 ; GCN-DAG: v_mov_b32_e32 [[SRC1:v[0-9]+]], 0x40005 154 ; GCN: exp mrt0 [[SRC0]], [[SRC0]], [[SRC1]], [[SRC1]] compr vm{{$}} 155 ; GCN: exp mrt0 [[SRC0]], [[SRC0]], [[SRC1]], [[SRC1]] done compr vm{{$}} 156 define amdgpu_kernel void @test_export_compr_vm_v2i16() #0 { 157 call void @llvm.amdgcn.exp.compr.v2i16(i32 0, i32 15, <2 x i16> <i16 1, i16 2>, <2 x i16> <i16 5, i16 4>, i1 false, i1 true) 158 call void @llvm.amdgcn.exp.compr.v2i16(i32 0, i32 15, <2 x i16> <i16 1, i16 2>, <2 x i16> <i16 5, i16 4>, i1 true, i1 true) 159 ret void 160 } 161 162 attributes #0 = { nounwind } 163
