1 ; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN %s 2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN %s 3 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+fp32-denormals -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN %s 4 ; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=+fp32-denormals -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN %s 5 6 declare float @llvm.amdgcn.fmad.ftz.f32(float %a, float %b, float %c) 7 8 ; GCN-LABEL: {{^}}mad_f32: 9 ; GCN: v_ma{{[dc]}}_f32 10 define amdgpu_kernel void @mad_f32( 11 float addrspace(1)* %r, 12 float addrspace(1)* %a, 13 float addrspace(1)* %b, 14 float addrspace(1)* %c) { 15 %a.val = load float, float addrspace(1)* %a 16 %b.val = load float, float addrspace(1)* %b 17 %c.val = load float, float addrspace(1)* %c 18 %r.val = call float @llvm.amdgcn.fmad.ftz.f32(float %a.val, float %b.val, float %c.val) 19 store float %r.val, float addrspace(1)* %r 20 ret void 21 } 22 23 ; GCN-LABEL: {{^}}mad_f32_imm_a: 24 ; GCN: v_mov_b32_e32 [[KA:v[0-9]+]], 0x41000000 25 ; GCN: v_ma{{[dc]}}_f32 {{v[0-9]+}}, [[KA]], 26 define amdgpu_kernel void @mad_f32_imm_a( 27 float addrspace(1)* %r, 28 float addrspace(1)* %b, 29 float addrspace(1)* %c) { 30 %b.val = load float, float addrspace(1)* %b 31 %c.val = load float, float addrspace(1)* %c 32 %r.val = call float @llvm.amdgcn.fmad.ftz.f32(float 8.0, float %b.val, float %c.val) 33 store float %r.val, float addrspace(1)* %r 34 ret void 35 } 36 37 ; GCN-LABEL: {{^}}mad_f32_imm_b: 38 ; GCN: v_mov_b32_e32 [[KB:v[0-9]+]], 0x41000000 39 ; GCN: v_ma{{[dc]}}_f32 {{v[0-9]+}}, {{[vs][0-9]+}}, [[KB]], 40 define amdgpu_kernel void @mad_f32_imm_b( 41 float addrspace(1)* %r, 42 float addrspace(1)* %a, 43 float addrspace(1)* %c) { 44 %a.val = load float, float addrspace(1)* %a 45 %c.val = load float, float addrspace(1)* %c 46 %r.val = call float @llvm.amdgcn.fmad.ftz.f32(float %a.val, float 8.0, float %c.val) 47 store float %r.val, float addrspace(1)* %r 48 ret void 49 } 50 51 ; GCN-LABEL: {{^}}mad_f32_imm_c: 52 ; GCN: v_mov_b32_e32 [[KC:v[0-9]+]], 0x41000000 53 ; GCN: v_ma{{[dc]}}_f32 {{v[0-9]+}}, {{[vs][0-9]+}}, {{v[0-9]+}}, [[KC]]{{$}} 54 define amdgpu_kernel void @mad_f32_imm_c( 55 float addrspace(1)* %r, 56 float addrspace(1)* %a, 57 float addrspace(1)* %b) { 58 %a.val = load float, float addrspace(1)* %a 59 %b.val = load float, float addrspace(1)* %b 60 %r.val = call float @llvm.amdgcn.fmad.ftz.f32(float %a.val, float %b.val, float 8.0) 61 store float %r.val, float addrspace(1)* %r 62 ret void 63 } 64 65 ; GCN-LABEL: {{^}}mad_f32_neg_b: 66 ; GCN: v_mad_f32 v{{[0-9]+}}, s{{[0-9]+}}, -v{{[0-9]+}}, v{{[0-9]+}} 67 define amdgpu_kernel void @mad_f32_neg_b( 68 float addrspace(1)* %r, 69 float addrspace(1)* %a, 70 float addrspace(1)* %b, 71 float addrspace(1)* %c) { 72 %a.val = load float, float addrspace(1)* %a 73 %b.val = load float, float addrspace(1)* %b 74 %c.val = load float, float addrspace(1)* %c 75 %neg.b = fsub float -0.0, %b.val 76 %r.val = call float @llvm.amdgcn.fmad.ftz.f32(float %a.val, float %neg.b, float %c.val) 77 store float %r.val, float addrspace(1)* %r 78 ret void 79 } 80 81 ; GCN-LABEL: {{^}}mad_f32_abs_b: 82 ; GCN: v_mad_f32 v{{[0-9]+}}, s{{[0-9]+}}, |v{{[0-9]+}}|, v{{[0-9]+}} 83 define amdgpu_kernel void @mad_f32_abs_b( 84 float addrspace(1)* %r, 85 float addrspace(1)* %a, 86 float addrspace(1)* %b, 87 float addrspace(1)* %c) { 88 %a.val = load float, float addrspace(1)* %a 89 %b.val = load float, float addrspace(1)* %b 90 %c.val = load float, float addrspace(1)* %c 91 %abs.b = call float @llvm.fabs.f32(float %b.val) 92 %r.val = call float @llvm.amdgcn.fmad.ftz.f32(float %a.val, float %abs.b, float %c.val) 93 store float %r.val, float addrspace(1)* %r 94 ret void 95 } 96 97 ; GCN-LABEL: {{^}}mad_f32_neg_abs_b: 98 ; GCN: v_mad_f32 v{{[0-9]+}}, s{{[0-9]+}}, -|v{{[0-9]+}}|, v{{[0-9]+}} 99 define amdgpu_kernel void @mad_f32_neg_abs_b( 100 float addrspace(1)* %r, 101 float addrspace(1)* %a, 102 float addrspace(1)* %b, 103 float addrspace(1)* %c) { 104 %a.val = load float, float addrspace(1)* %a 105 %b.val = load float, float addrspace(1)* %b 106 %c.val = load float, float addrspace(1)* %c 107 %abs.b = call float @llvm.fabs.f32(float %b.val) 108 %neg.abs.b = fsub float -0.0, %abs.b 109 %r.val = call float @llvm.amdgcn.fmad.ftz.f32(float %a.val, float %neg.abs.b, float %c.val) 110 store float %r.val, float addrspace(1)* %r 111 ret void 112 } 113 114 declare float @llvm.fabs.f32(float) 115
