1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s 2 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=FUNC %s 3 4 declare float @llvm.amdgcn.rsq.clamp.f32(float) #1 5 declare double @llvm.amdgcn.rsq.clamp.f64(double) #1 6 7 ; FUNC-LABEL: {{^}}rsq_clamp_f32: 8 ; SI: v_rsq_clamp_f32_e32 9 10 ; VI: s_load_dword [[SRC:s[0-9]+]] 11 ; VI-DAG: v_rsq_f32_e32 [[RSQ:v[0-9]+]], [[SRC]] 12 ; VI-DAG: v_min_f32_e32 [[MIN:v[0-9]+]], 0x7f7fffff, [[RSQ]] 13 ; VI: v_max_f32_e32 [[RESULT:v[0-9]+]], 0xff7fffff, [[MIN]] 14 ; VI: buffer_store_dword [[RESULT]] 15 define amdgpu_kernel void @rsq_clamp_f32(float addrspace(1)* %out, float %src) #0 { 16 %rsq_clamp = call float @llvm.amdgcn.rsq.clamp.f32(float %src) 17 store float %rsq_clamp, float addrspace(1)* %out 18 ret void 19 } 20 21 22 ; FUNC-LABEL: {{^}}rsq_clamp_f64: 23 ; SI: v_rsq_clamp_f64_e32 24 25 ; TODO: this constant should be folded: 26 ; VI-DAG: s_mov_b32 [[NEG1:s[0-9+]]], -1 27 ; VI-DAG: s_mov_b32 s[[LOW1:[0-9+]]], [[NEG1]] 28 ; VI-DAG: s_mov_b32 s[[HIGH1:[0-9+]]], 0x7fefffff 29 ; VI-DAG: s_mov_b32 s[[HIGH2:[0-9+]]], 0xffefffff 30 ; VI-DAG: v_rsq_f64_e32 [[RSQ:v\[[0-9]+:[0-9]+\]]], s[{{[0-9]+:[0-9]+}} 31 ; VI-DAG: v_min_f64 v[0:1], [[RSQ]], s{{\[}}[[LOW1]]:[[HIGH1]]] 32 ; VI-DAG: v_max_f64 v[0:1], v[0:1], s{{\[}}[[LOW1]]:[[HIGH2]]] 33 define amdgpu_kernel void @rsq_clamp_f64(double addrspace(1)* %out, double %src) #0 { 34 %rsq_clamp = call double @llvm.amdgcn.rsq.clamp.f64(double %src) 35 store double %rsq_clamp, double addrspace(1)* %out 36 ret void 37 } 38 39 ; FUNC-LABEL: {{^}}rsq_clamp_undef_f32: 40 ; SI-NOT: v_rsq_clamp_f32 41 define amdgpu_kernel void @rsq_clamp_undef_f32(float addrspace(1)* %out) #0 { 42 %rsq_clamp = call float @llvm.amdgcn.rsq.clamp.f32(float undef) 43 store float %rsq_clamp, float addrspace(1)* %out 44 ret void 45 } 46 47 attributes #0 = { nounwind } 48 attributes #1 = { nounwind readnone } 49
