1 ; RUN: llc -march=amdgcn -mtriple=amdgcn-unknown-amdhsa -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefix=ALL -check-prefix=CO-V2 -check-prefix=CI-HSA %s 2 ; RUN: llc -march=amdgcn -mtriple=amdgcn-unknown-amdhsa -mcpu=carrizo -verify-machineinstrs < %s | FileCheck -check-prefix=ALL -check-prefix=CO-V2 -check-prefix=VI-HSA %s 3 ; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefix=ALL -check-prefix=UNKNOWN-OS -check-prefix=SI-MESA %s 4 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=ALL -check-prefix=UNKNOWN-OS -check-prefix=VI-MESA %s 5 ; RUN: llc -mtriple=amdgcn-unknown-mesa3d -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefixes=ALL,CO-V2,SI-MESA %s 6 ; RUN: llc -mtriple=amdgcn-unknown-mesa3d -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefixes=ALL,CO-V2,VI-MESA %s 7 8 declare i32 @llvm.amdgcn.workgroup.id.x() #0 9 declare i32 @llvm.amdgcn.workgroup.id.y() #0 10 declare i32 @llvm.amdgcn.workgroup.id.z() #0 11 12 ; ALL-LABEL {{^}}test_workgroup_id_x: 13 14 ; CO-V2: .amd_kernel_code_t 15 ; CO-V2: user_sgpr_count = 6 16 ; CO-V2: enable_sgpr_workgroup_id_x = 1 17 ; CO-V2: enable_sgpr_workgroup_id_y = 0 18 ; CO-V2: enable_sgpr_workgroup_id_z = 0 19 ; CO-V2: enable_sgpr_workgroup_info = 0 20 ; CO-V2: enable_vgpr_workitem_id = 0 21 ; CO-V2: enable_sgpr_grid_workgroup_count_x = 0 22 ; CO-V2: enable_sgpr_grid_workgroup_count_y = 0 23 ; CO-V2: enable_sgpr_grid_workgroup_count_z = 0 24 ; CO-V2: .end_amd_kernel_code_t 25 26 ; UNKNOWN-OS: v_mov_b32_e32 [[VCOPY:v[0-9]+]], s2{{$}} 27 ; CO-V2: v_mov_b32_e32 [[VCOPY:v[0-9]+]], s6{{$}} 28 29 ; ALL: {{buffer|flat}}_store_dword {{.*}}[[VCOPY]] 30 31 ; CO-V2: COMPUTE_PGM_RSRC2:USER_SGPR: 6 32 ; ALL-NOCO-V2: COMPUTE_PGM_RSRC2:USER_SGPR: 2 33 ; ALL: COMPUTE_PGM_RSRC2:TGID_X_EN: 1 34 ; ALL: COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 35 ; ALL: COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 36 ; ALL: COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 37 define amdgpu_kernel void @test_workgroup_id_x(i32 addrspace(1)* %out) #1 { 38 %id = call i32 @llvm.amdgcn.workgroup.id.x() 39 store i32 %id, i32 addrspace(1)* %out 40 ret void 41 } 42 43 ; ALL-LABEL {{^}}test_workgroup_id_y: 44 ; CO-V2: user_sgpr_count = 6 45 ; CO-V2: enable_sgpr_workgroup_id_x = 1 46 ; CO-V2: enable_sgpr_workgroup_id_y = 1 47 ; CO-V2: enable_sgpr_workgroup_id_z = 0 48 ; CO-V2: enable_sgpr_workgroup_info = 0 49 ; CO-V2: enable_sgpr_grid_workgroup_count_x = 0 50 ; CO-V2: enable_sgpr_grid_workgroup_count_y = 0 51 ; CO-V2: enable_sgpr_grid_workgroup_count_z = 0 52 53 ; UNKNOWN-OS: v_mov_b32_e32 [[VCOPY:v[0-9]+]], s3{{$}} 54 ; HSA: v_mov_b32_e32 [[VCOPY:v[0-9]+]], s7{{$}} 55 56 ; ALL: {{buffer|flat}}_store_dword {{.*}}[[VCOPY]] 57 58 ; CO-V2: COMPUTE_PGM_RSRC2:USER_SGPR: 6 59 ; ALL-NOCO-V2: COMPUTE_PGM_RSRC2:USER_SGPR: 2 60 ; ALL: COMPUTE_PGM_RSRC2:TGID_X_EN: 1 61 ; ALL: COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 62 ; ALL: COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 63 ; ALL: COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 64 define amdgpu_kernel void @test_workgroup_id_y(i32 addrspace(1)* %out) #1 { 65 %id = call i32 @llvm.amdgcn.workgroup.id.y() 66 store i32 %id, i32 addrspace(1)* %out 67 ret void 68 } 69 70 ; ALL-LABEL {{^}}test_workgroup_id_z: 71 ; CO-V2: user_sgpr_count = 6 72 ; CO-V2: enable_sgpr_workgroup_id_x = 1 73 ; CO-V2: enable_sgpr_workgroup_id_y = 0 74 ; CO-V2: enable_sgpr_workgroup_id_z = 1 75 ; CO-V2: enable_sgpr_workgroup_info = 0 76 ; CO-V2: enable_vgpr_workitem_id = 0 77 ; CO-V2: enable_sgpr_private_segment_buffer = 1 78 ; CO-V2: enable_sgpr_dispatch_ptr = 0 79 ; CO-V2: enable_sgpr_queue_ptr = 0 80 ; CO-V2: enable_sgpr_kernarg_segment_ptr = 1 81 ; CO-V2: enable_sgpr_dispatch_id = 0 82 ; CO-V2: enable_sgpr_flat_scratch_init = 0 83 ; CO-V2: enable_sgpr_private_segment_size = 0 84 ; CO-V2: enable_sgpr_grid_workgroup_count_x = 0 85 ; CO-V2: enable_sgpr_grid_workgroup_count_y = 0 86 ; CO-V2: enable_sgpr_grid_workgroup_count_z = 0 87 88 ; UNKNOWN-OS: v_mov_b32_e32 [[VCOPY:v[0-9]+]], s3{{$}} 89 ; HSA: v_mov_b32_e32 [[VCOPY:v[0-9]+]], s7{{$}} 90 91 ; ALL: {{buffer|flat}}_store_dword {{.*}}[[VCOPY]] 92 93 ; CO-V2: COMPUTE_PGM_RSRC2:USER_SGPR: 6 94 ; ALL-NOCO-V2: COMPUTE_PGM_RSRC2:USER_SGPR: 2 95 ; ALL: COMPUTE_PGM_RSRC2:TGID_X_EN: 1 96 ; ALL: COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 97 ; ALL: COMPUTE_PGM_RSRC2:TGID_Z_EN: 1 98 ; ALL: COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 99 define amdgpu_kernel void @test_workgroup_id_z(i32 addrspace(1)* %out) #1 { 100 %id = call i32 @llvm.amdgcn.workgroup.id.z() 101 store i32 %id, i32 addrspace(1)* %out 102 ret void 103 } 104 105 attributes #0 = { nounwind readnone } 106 attributes #1 = { nounwind } 107
