1 ;RUN: llc < %s -march=amdgcn -mcpu=verde -mattr=+vgpr-spilling -mattr=-promote-alloca -verify-machineinstrs | FileCheck %s -check-prefix=CHECK 2 ;RUN: llc < %s -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -mattr=+vgpr-spilling -mattr=-promote-alloca -verify-machineinstrs | FileCheck %s -check-prefix=CHECK 3 4 ; Allocate two stack slots of 2052 bytes each requiring a total of 4104 bytes. 5 ; Extracting the last element of each does not fit into the offset field of 6 ; MUBUF instructions, so a new base register is needed. This used to not 7 ; happen, leading to an assertion. 8 9 ; CHECK-LABEL: {{^}}main: 10 ; CHECK: buffer_store_dword 11 ; CHECK: buffer_store_dword 12 ; CHECK: buffer_load_dword 13 ; CHECK: buffer_load_dword 14 define amdgpu_gs float @main(float %v1, float %v2, i32 %idx1, i32 %idx2) { 15 main_body: 16 %m1 = alloca [513 x float], addrspace(5) 17 %m2 = alloca [513 x float], addrspace(5) 18 19 %gep1.store = getelementptr [513 x float], [513 x float] addrspace(5)* %m1, i32 0, i32 %idx1 20 store float %v1, float addrspace(5)* %gep1.store 21 22 %gep2.store = getelementptr [513 x float], [513 x float] addrspace(5)* %m2, i32 0, i32 %idx2 23 store float %v2, float addrspace(5)* %gep2.store 24 25 ; This used to use a base reg equal to 0. 26 %gep1.load = getelementptr [513 x float], [513 x float] addrspace(5)* %m1, i32 0, i32 0 27 %out1 = load float, float addrspace(5)* %gep1.load 28 29 ; This used to attempt to re-use the base reg at 0, generating an out-of-bounds instruction offset. 30 %gep2.load = getelementptr [513 x float], [513 x float] addrspace(5)* %m2, i32 0, i32 512 31 %out2 = load float, float addrspace(5)* %gep2.load 32 33 %r = fadd float %out1, %out2 34 ret float %r 35 } 36
