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      1 # RUN: llc -march=amdgcn -mcpu=gfx803 -run-pass si-memory-legalizer  %s -o - | FileCheck %s
      2 
      3 --- |
      4   ; ModuleID = '<stdin>'
      5   source_filename = "<stdin>"
      6   target datalayout = "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64"
      7 
      8   ; Function Attrs: nounwind readnone
      9   declare i32 @llvm.amdgcn.workitem.id.x() #0
     10 
     11   ; Function Attrs: nounwind
     12   define amdgpu_kernel void @atomic_max_i32_noret(
     13       i32 addrspace(1)* %out,
     14       i32 addrspace(1)* addrspace(1)* %in,
     15       i32 addrspace(1)* %x,
     16       i32 %y) #1 {
     17     %tid = call i32 @llvm.amdgcn.workitem.id.x()
     18     %idxprom = sext i32 %tid to i64
     19     %tid.gep = getelementptr i32 addrspace(1)*, i32 addrspace(1)* addrspace(1)* %in, i64 %idxprom
     20     %ptr = load volatile i32 addrspace(1)*, i32 addrspace(1)* addrspace(1)* %tid.gep
     21     %xor = xor i32 %tid, 1
     22     %cmp = icmp ne i32 %xor, 0
     23     %1 = call { i1, i64 } @llvm.amdgcn.if(i1 %cmp)
     24     %2 = extractvalue { i1, i64 } %1, 0
     25     %3 = extractvalue { i1, i64 } %1, 1
     26     br i1 %2, label %atomic, label %exit
     27 
     28   atomic:                                           ; preds = %0
     29     %gep = getelementptr i32, i32 addrspace(1)* %ptr, i32 100
     30     %ret = atomicrmw max i32 addrspace(1)* %gep, i32 %y seq_cst
     31     br label %exit
     32 
     33   exit:                                             ; preds = %atomic, %0
     34     call void @llvm.amdgcn.end.cf(i64 %3)
     35     ret void
     36   }
     37 
     38   declare { i1, i64 } @llvm.amdgcn.if(i1)
     39 
     40   declare void @llvm.amdgcn.end.cf(i64)
     41 
     42   ; Function Attrs: nounwind
     43   declare void @llvm.stackprotector(i8*, i8**) #3
     44 
     45   attributes #0 = { nounwind readnone "target-cpu"="tahiti" }
     46   attributes #1 = { nounwind "target-cpu"="tahiti" }
     47   attributes #2 = { readnone }
     48   attributes #3 = { nounwind }
     49 
     50 ...
     51 ---
     52 
     53 # CHECK-LABEL: name: atomic_max_i32_noret
     54 
     55 # CHECK-LABEL: bb.1.atomic:
     56 # CHECK:       BUFFER_ATOMIC_SMAX_ADDR64
     57 # CHECK-NEXT:  S_WAITCNT 3952
     58 # CHECK-NEXT:  BUFFER_WBINVL1_VOL
     59 
     60 name:            atomic_max_i32_noret
     61 alignment:       0
     62 exposesReturnsTwice: false
     63 legalized:       false
     64 regBankSelected: false
     65 selected:        false
     66 tracksRegLiveness: true
     67 liveins:
     68   - { reg: '$sgpr0_sgpr1' }
     69   - { reg: '$vgpr0' }
     70 frameInfo:
     71   isFrameAddressTaken: false
     72   isReturnAddressTaken: false
     73   hasStackMap:     false
     74   hasPatchPoint:   false
     75   stackSize:       0
     76   offsetAdjustment: 0
     77   maxAlignment:    0
     78   adjustsStack:    false
     79   hasCalls:        false
     80   maxCallFrameSize: 0
     81   hasOpaqueSPAdjustment: false
     82   hasVAStart:      false
     83   hasMustTailInVarArgFunc: false
     84 body:             |
     85   bb.0 (%ir-block.0):
     86     successors: %bb.1.atomic(0x40000000), %bb.2.exit(0x40000000)
     87     liveins: $vgpr0, $sgpr0_sgpr1
     88  
     89     $sgpr4_sgpr5 = S_LOAD_DWORDX2_IMM $sgpr0_sgpr1, 11, 0 :: (non-temporal dereferenceable invariant load 8 from `i64 addrspace(2)* undef`)
     90     $vgpr1 = V_ASHRREV_I32_e32 31, $vgpr0, implicit $exec
     91     $vgpr1_vgpr2 = V_LSHL_B64 $vgpr0_vgpr1, 3, implicit $exec
     92     $sgpr7 = S_MOV_B32 61440
     93     $sgpr6 = S_MOV_B32 0
     94     S_WAITCNT 127
     95     $vgpr1_vgpr2 = BUFFER_LOAD_DWORDX2_ADDR64 killed $vgpr1_vgpr2, $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec :: (volatile load 8 from %ir.tid.gep)
     96     $vgpr0 = V_XOR_B32_e32 1, killed $vgpr0, implicit $exec
     97     V_CMP_NE_U32_e32 0, killed $vgpr0, implicit-def $vcc, implicit $exec
     98     $sgpr2_sgpr3 = S_AND_SAVEEXEC_B64 killed $vcc, implicit-def $exec, implicit-def $scc, implicit $exec
     99     $sgpr2_sgpr3 = S_XOR_B64 $exec, killed $sgpr2_sgpr3, implicit-def dead $scc
    100     SI_MASK_BRANCH %bb.2.exit, implicit $exec
    101  
    102   bb.1.atomic:
    103     successors: %bb.2.exit(0x80000000)
    104     liveins: $sgpr4_sgpr5_sgpr6_sgpr7:0x0000000C, $sgpr0_sgpr1, $sgpr2_sgpr3, $vgpr1_vgpr2_vgpr3_vgpr4:0x00000003
    105  
    106     $sgpr0 = S_LOAD_DWORD_IMM killed $sgpr0_sgpr1, 15, 0 :: (non-temporal dereferenceable invariant load 4 from `i32 addrspace(2)* undef`)
    107     dead $vgpr0 = V_MOV_B32_e32 -1, implicit $exec
    108     dead $vgpr0 = V_MOV_B32_e32 61440, implicit $exec
    109     $sgpr4_sgpr5 = S_MOV_B64 0
    110     S_WAITCNT 127
    111     $vgpr0 = V_MOV_B32_e32 killed $sgpr0, implicit $exec, implicit $exec
    112     S_WAITCNT 3952
    113     BUFFER_ATOMIC_SMAX_ADDR64 killed $vgpr0, killed $vgpr1_vgpr2, killed $sgpr4_sgpr5_sgpr6_sgpr7, 0, 400, 0, implicit $exec :: (volatile load seq_cst 4 from %ir.gep)
    114  
    115   bb.2.exit:
    116     liveins: $sgpr2_sgpr3
    117 
    118     $exec = S_OR_B64 $exec, killed $sgpr2_sgpr3, implicit-def $scc
    119     S_ENDPGM
    120 
    121 ...
    122 
    123