1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=GCN %s 2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=GCN %s 3 4 declare i64 @llvm.readcyclecounter() #0 5 6 ; GCN-LABEL: {{^}}test_readcyclecounter: 7 ; SI-DAG: s_memtime s{{\[[0-9]+:[0-9]+\]}} 8 ; VI-DAG: s_memrealtime s{{\[[0-9]+:[0-9]+\]}} 9 ; GCN-DAG: s_load_dwordx2 10 ; GCN: lgkmcnt 11 ; GCN: store_dwordx2 12 ; GCN-NOT: lgkmcnt 13 ; SI: s_memtime s{{\[[0-9]+:[0-9]+\]}} 14 ; VI: s_memrealtime s{{\[[0-9]+:[0-9]+\]}} 15 ; GCN: store_dwordx2 16 define amdgpu_kernel void @test_readcyclecounter(i64 addrspace(1)* %out) #0 { 17 %cycle0 = call i64 @llvm.readcyclecounter() 18 store volatile i64 %cycle0, i64 addrspace(1)* %out 19 20 %cycle1 = call i64 @llvm.readcyclecounter() 21 store volatile i64 %cycle1, i64 addrspace(1)* %out 22 ret void 23 } 24 25 ; This test used to crash in ScheduleDAG. 26 ; 27 ; GCN-LABEL: {{^}}test_readcyclecounter_smem: 28 ; SI-DAG: s_memtime 29 ; VI-DAG: s_memrealtime 30 ; GCN-DAG: s_load_dword 31 define amdgpu_cs i32 @test_readcyclecounter_smem(i64 addrspace(4)* inreg %in) #0 { 32 %cycle0 = call i64 @llvm.readcyclecounter() 33 %in.v = load i64, i64 addrspace(4)* %in 34 %r.64 = add i64 %cycle0, %in.v 35 %r.32 = trunc i64 %r.64 to i32 36 ret i32 %r.32 37 } 38 39 attributes #0 = { nounwind } 40
