1 # RUN: llc -march=amdgcn -run-pass simple-register-coalescing -o - %s | FileCheck %s 2 3 # Test that register coalescing does not allow a call to 4 # LIS->getInstructionIndex with a DBG_VALUE instruction, which does not have 5 # a slot index. 6 7 # CHECK: %13.sub2:sgpr_128 = S_MOV_B32 0 8 # CHECK: DBG_VALUE{{.*}}debug-use %13.sub2 9 10 --- | 11 define amdgpu_kernel void @test(i32 addrspace(1)* %out) { ret void } 12 13 !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !4, producer: "llvm", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !4, retainedTypes: !4) 14 !1 = !DILocalVariable(name: "a", scope: !2, file: !4, line: 126, type: !6) 15 !2 = distinct !DISubprogram(name: "test", scope: !4, file: !4, line: 1, type: !3, isLocal: false, isDefinition: true, scopeLine: 2, flags: DIFlagPrototyped, isOptimized: true, unit: !0, retainedNodes: !5) 16 !3 = !DISubroutineType(types: !4) 17 !4 = !{null} 18 !5 = !{!1} 19 !6 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !7, size: 64, align: 32) 20 !7 = !DIBasicType(name: "int", size: 32, align: 32, encoding: DW_ATE_signed) 21 !8 = !DIExpression() 22 !9 = !DILocation(line: 126, column: 9, scope: !2) 23 24 ... 25 --- 26 name: test 27 tracksRegLiveness: true 28 registers: 29 - { id: 0, class: sgpr_64 } 30 - { id: 1, class: sreg_32_xm0 } 31 - { id: 2, class: sgpr_32 } 32 - { id: 3, class: vgpr_32 } 33 - { id: 4, class: sreg_64_xexec } 34 - { id: 5, class: sreg_32_xm0_xexec } 35 - { id: 6, class: sreg_32 } 36 - { id: 7, class: sreg_32 } 37 - { id: 8, class: sreg_32_xm0 } 38 - { id: 9, class: sreg_64 } 39 - { id: 10, class: sreg_32_xm0 } 40 - { id: 11, class: sreg_32_xm0 } 41 - { id: 12, class: sgpr_64 } 42 - { id: 13, class: sgpr_128 } 43 - { id: 14, class: sreg_32_xm0 } 44 - { id: 15, class: sreg_64 } 45 - { id: 16, class: vgpr_32 } 46 - { id: 17, class: vreg_64 } 47 - { id: 18, class: vgpr_32 } 48 - { id: 19, class: vreg_64 } 49 - { id: 20, class: vreg_64 } 50 liveins: 51 - { reg: '$sgpr0_sgpr1', virtual-reg: '%0' } 52 - { reg: '$vgpr0', virtual-reg: '%3' } 53 body: | 54 bb.0: 55 liveins: $sgpr0_sgpr1, $vgpr0 56 57 %3 = COPY killed $vgpr0 58 %0 = COPY killed $sgpr0_sgpr1 59 %4 = S_LOAD_DWORDX2_IMM %0, 9, 0 :: (non-temporal dereferenceable invariant load 8 from `i64 addrspace(2)* undef`) 60 %5 = S_LOAD_DWORD_IMM killed %0, 13, 0 :: (non-temporal dereferenceable invariant load 4 from `i32 addrspace(2)* undef`) 61 %18 = V_ASHRREV_I32_e32 31, %3, implicit $exec 62 undef %19.sub0 = COPY killed %3 63 %19.sub1 = COPY killed %18 64 %10 = S_MOV_B32 61440 65 %11 = S_MOV_B32 0 66 DBG_VALUE debug-use %11, debug-use $noreg, !1, !8, debug-location !9 67 undef %12.sub0 = COPY killed %11 68 %12.sub1 = COPY killed %10 69 undef %13.sub0_sub1 = COPY killed %4 70 %13.sub2_sub3 = COPY killed %12 71 %20 = V_LSHL_B64 killed %19, 2, implicit $exec 72 %16 = COPY killed %5 73 BUFFER_STORE_DWORD_ADDR64 killed %16, killed %20, killed %13, 0, 0, 0, 0, 0, implicit $exec :: (store 4 into %ir.out) 74 S_ENDPGM 75 76 ... 77
