1 # RUN: llc -march=amdgcn -run-pass si-insert-waitcnts %s -o - | FileCheck %s 2 3 --- | 4 define amdgpu_kernel void @basic_insert_dcache_wb() { 5 ret void 6 } 7 8 define amdgpu_kernel void @explicit_flush_after() { 9 ret void 10 } 11 12 define amdgpu_kernel void @explicit_flush_before() { 13 ret void 14 } 15 16 define amdgpu_kernel void @no_scalar_store() { 17 ret void 18 } 19 20 define amdgpu_kernel void @multi_block_store() { 21 bb0: 22 br i1 undef, label %bb1, label %bb2 23 24 bb1: 25 ret void 26 27 bb2: 28 ret void 29 } 30 31 define amdgpu_kernel void @one_block_store() { 32 bb0: 33 br i1 undef, label %bb1, label %bb2 34 35 bb1: 36 ret void 37 38 bb2: 39 ret void 40 } 41 42 define amdgpu_ps float @si_return() { 43 ret float undef 44 } 45 46 ... 47 --- 48 # CHECK-LABEL: name: basic_insert_dcache_wb 49 # CHECK: bb.0: 50 # CHECK-NEXT: S_STORE_DWORD 51 # CHECK-NEXT: S_DCACHE_WB 52 # CHECK-NEXT: S_ENDPGM 53 54 name: basic_insert_dcache_wb 55 tracksRegLiveness: false 56 57 body: | 58 bb.0: 59 S_STORE_DWORD_SGPR undef $sgpr2, undef $sgpr0_sgpr1, undef $m0, 0 60 S_ENDPGM 61 ... 62 --- 63 # Already has an explicitly requested flush after the last store. 64 # CHECK-LABEL: name: explicit_flush_after 65 # CHECK: bb.0: 66 # CHECK-NEXT: S_STORE_DWORD 67 # CHECK-NEXT: S_DCACHE_WB 68 # CHECK-NEXT: S_ENDPGM 69 70 name: explicit_flush_after 71 tracksRegLiveness: false 72 73 body: | 74 bb.0: 75 S_STORE_DWORD_SGPR undef $sgpr2, undef $sgpr0_sgpr1, undef $m0, 0 76 S_DCACHE_WB 77 S_ENDPGM 78 ... 79 --- 80 # Already has an explicitly requested flush before the last store. 81 # CHECK-LABEL: name: explicit_flush_before 82 # CHECK: bb.0: 83 # CHECK-NEXT: S_DCACHE_WB 84 # CHECK-NEXT: S_STORE_DWORD 85 # CHECK-NEXT: S_DCACHE_WB 86 # CHECK-NEXT: S_ENDPGM 87 88 name: explicit_flush_before 89 tracksRegLiveness: false 90 91 body: | 92 bb.0: 93 S_DCACHE_WB 94 S_STORE_DWORD_SGPR undef $sgpr2, undef $sgpr0_sgpr1, undef $m0, 0 95 S_ENDPGM 96 ... 97 --- 98 # CHECK-LABEL: no_scalar_store 99 # CHECK: bb.0 100 # CHECK-NEXT: S_ENDPGM 101 name: no_scalar_store 102 tracksRegLiveness: false 103 104 body: | 105 bb.0: 106 S_ENDPGM 107 ... 108 109 # CHECK-LABEL: name: multi_block_store 110 # CHECK: bb.0: 111 # CHECK-NEXT: S_STORE_DWORD 112 # CHECK-NEXT: S_DCACHE_WB 113 # CHECK-NEXT: S_ENDPGM 114 115 # CHECK: bb.1: 116 # CHECK-NEXT: S_STORE_DWORD 117 # CHECK-NEXT: S_DCACHE_WB 118 # CHECK-NEXT: S_ENDPGM 119 120 name: multi_block_store 121 tracksRegLiveness: false 122 123 body: | 124 bb.0: 125 S_STORE_DWORD_SGPR undef $sgpr2, undef $sgpr0_sgpr1, undef $m0, 0 126 S_ENDPGM 127 128 bb.1: 129 S_STORE_DWORD_SGPR undef $sgpr4, undef $sgpr6_sgpr7, undef $m0, 0 130 S_ENDPGM 131 ... 132 ... 133 134 # This one should be able to omit the flush in the storeless block but 135 # this isn't handled now. 136 137 # CHECK-LABEL: name: one_block_store 138 # CHECK: bb.0: 139 # CHECK-NEXT: S_DCACHE_WB 140 # CHECK-NEXT: S_ENDPGM 141 142 # CHECK: bb.1: 143 # CHECK-NEXT: S_STORE_DWORD 144 # CHECK-NEXT: S_DCACHE_WB 145 # CHECK-NEXT: S_ENDPGM 146 147 name: one_block_store 148 tracksRegLiveness: false 149 150 body: | 151 bb.0: 152 S_ENDPGM 153 154 bb.1: 155 S_STORE_DWORD_SGPR undef $sgpr4, undef $sgpr6_sgpr7, undef $m0, 0 156 S_ENDPGM 157 ... 158 --- 159 # CHECK-LABEL: name: si_return 160 # CHECK: bb.0: 161 # CHECK-NEXT: S_STORE_DWORD 162 # CHECK-NEXT: S_WAITCNT 163 # CHECK-NEXT: S_DCACHE_WB 164 # CHECK-NEXT: SI_RETURN 165 166 name: si_return 167 tracksRegLiveness: false 168 169 body: | 170 bb.0: 171 S_STORE_DWORD_SGPR undef $sgpr2, undef $sgpr0_sgpr1, undef $m0, 0 172 SI_RETURN_TO_EPILOG undef $vgpr0 173 ... 174
