1 ; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -verify-machineinstrs< %s | FileCheck -check-prefix=SI %s 2 ; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI %s 3 4 ; Copy VGPR -> SGPR used twice as an instruction operand, which is then 5 ; used in an REG_SEQUENCE that also needs to be handled. 6 7 ; SI-LABEL: {{^}}test_dup_operands: 8 ; SI: v_add_{{[iu]}}32_e32 9 define amdgpu_kernel void @test_dup_operands(<2 x i32> addrspace(1)* noalias %out, <2 x i32> addrspace(1)* noalias %in) { 10 %a = load <2 x i32>, <2 x i32> addrspace(1)* %in 11 %lo = extractelement <2 x i32> %a, i32 0 12 %hi = extractelement <2 x i32> %a, i32 1 13 %add = add i32 %lo, %lo 14 %vec0 = insertelement <2 x i32> undef, i32 %add, i32 0 15 %vec1 = insertelement <2 x i32> %vec0, i32 %hi, i32 1 16 store <2 x i32> %vec1, <2 x i32> addrspace(1)* %out, align 8 17 ret void 18 } 19 20
