1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s 2 3 ; GCN-LABEL: {{^}}if_with_kill: 4 ; GCN: s_and_saveexec_b64 [[SAVEEXEC:s\[[0-9:]+\]]], 5 ; GCN-NEXT: s_xor_b64 s[{{[0-9:]+}}], exec, [[SAVEEXEC]] 6 define amdgpu_ps void @if_with_kill(i32 %arg) { 7 .entry: 8 %cmp = icmp eq i32 %arg, 32 9 br i1 %cmp, label %then, label %endif 10 11 then: 12 tail call void @llvm.amdgcn.kill(i1 false) 13 br label %endif 14 15 endif: 16 ret void 17 } 18 19 ; GCN-LABEL: {{^}}if_with_loop_kill_after: 20 ; GCN: s_and_saveexec_b64 [[SAVEEXEC:s\[[0-9:]+\]]], 21 ; GCN-NEXT: s_xor_b64 s[{{[0-9:]+}}], exec, [[SAVEEXEC]] 22 define amdgpu_ps void @if_with_loop_kill_after(i32 %arg) { 23 .entry: 24 %cmp = icmp eq i32 %arg, 32 25 br i1 %cmp, label %then, label %endif 26 27 then: 28 %sub = sub i32 %arg, 1 29 br label %loop 30 31 loop: 32 %ind = phi i32 [%sub, %then], [%dec, %loop] 33 %dec = sub i32 %ind, 1 34 %cc = icmp ne i32 %ind, 0 35 br i1 %cc, label %loop, label %break 36 37 break: 38 tail call void @llvm.amdgcn.kill(i1 false) 39 br label %endif 40 41 endif: 42 ret void 43 } 44 45 ; GCN-LABEL: {{^}}if_with_kill_inside_loop: 46 ; GCN: s_and_saveexec_b64 [[SAVEEXEC:s\[[0-9:]+\]]], 47 ; GCN-NEXT: s_xor_b64 s[{{[0-9:]+}}], exec, [[SAVEEXEC]] 48 define amdgpu_ps void @if_with_kill_inside_loop(i32 %arg) { 49 .entry: 50 %cmp = icmp eq i32 %arg, 32 51 br i1 %cmp, label %then, label %endif 52 53 then: 54 %sub = sub i32 %arg, 1 55 br label %loop 56 57 loop: 58 %ind = phi i32 [%sub, %then], [%dec, %loop] 59 %dec = sub i32 %ind, 1 60 %cc = icmp ne i32 %ind, 0 61 tail call void @llvm.amdgcn.kill(i1 false) 62 br i1 %cc, label %loop, label %break 63 64 break: 65 br label %endif 66 67 endif: 68 ret void 69 } 70 71 declare void @llvm.amdgcn.kill(i1) #0 72 73 attributes #0 = { nounwind } 74
