1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s 2 3 ; GCN-LABEL: {{^}}lower_control_flow_unreachable_terminator: 4 ; GCN: v_cmp_eq_u32 5 ; GCN: s_and_saveexec_b64 6 ; GCN: ; mask branch [[RET:BB[0-9]+_[0-9]+]] 7 8 ; GCN-NEXT: BB{{[0-9]+_[0-9]+}}: ; %unreachable 9 ; GCN: ds_write_b32 10 ; GCN: ; divergent unreachable 11 12 ; GCN-NEXT: [[RET]]: ; %UnifiedReturnBlock 13 ; GCN: s_endpgm 14 15 define amdgpu_kernel void @lower_control_flow_unreachable_terminator() #0 { 16 bb: 17 %tmp15 = tail call i32 @llvm.amdgcn.workitem.id.y() 18 %tmp63 = icmp eq i32 %tmp15, 32 19 br i1 %tmp63, label %unreachable, label %ret 20 21 unreachable: 22 store volatile i32 0, i32 addrspace(3)* undef, align 4 23 unreachable 24 25 ret: 26 ret void 27 } 28 29 ; GCN-LABEL: {{^}}lower_control_flow_unreachable_terminator_swap_block_order: 30 ; GCN: v_cmp_ne_u32 31 ; GCN: s_and_saveexec_b64 32 ; GCN: ; mask branch [[RETURN:BB[0-9]+_[0-9]+]] 33 34 ; GCN-NEXT: {{^BB[0-9]+_[0-9]+}}: ; %unreachable 35 ; GCN: ds_write_b32 36 ; GCN: ; divergent unreachable 37 38 ; GCN: [[RETURN]]: 39 ; GCN-NEXT: s_endpgm 40 define amdgpu_kernel void @lower_control_flow_unreachable_terminator_swap_block_order() #0 { 41 bb: 42 %tmp15 = tail call i32 @llvm.amdgcn.workitem.id.y() 43 %tmp63 = icmp eq i32 %tmp15, 32 44 br i1 %tmp63, label %ret, label %unreachable 45 46 ret: 47 ret void 48 49 unreachable: 50 store volatile i32 0, i32 addrspace(3)* undef, align 4 51 unreachable 52 } 53 54 ; GCN-LABEL: {{^}}uniform_lower_control_flow_unreachable_terminator: 55 ; GCN: s_cmp_lg_u32 56 ; GCN: s_cbranch_scc0 [[UNREACHABLE:BB[0-9]+_[0-9]+]] 57 58 ; GCN-NEXT: %bb.{{[0-9]+}}: ; %ret 59 ; GCN-NEXT: s_endpgm 60 61 ; GCN: [[UNREACHABLE]]: 62 ; GCN: ds_write_b32 63 define amdgpu_kernel void @uniform_lower_control_flow_unreachable_terminator(i32 %arg0) #0 { 64 bb: 65 %tmp63 = icmp eq i32 %arg0, 32 66 br i1 %tmp63, label %unreachable, label %ret 67 68 unreachable: 69 store volatile i32 0, i32 addrspace(3)* undef, align 4 70 unreachable 71 72 ret: 73 ret void 74 } 75 76 declare i32 @llvm.amdgcn.workitem.id.y() #1 77 78 attributes #0 = { nounwind } 79 attributes #1 = { nounwind readnone } 80 attributes #2 = { nounwind } 81
