1 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -stress-regalloc=1 < %s | FileCheck -check-prefix=GCN %s 2 3 ; For the CSR copy of s5, it may be possible to see it in 4 ; storeRegToStackSlot. 5 6 ; GCN-LABEL: {{^}}spill_csr_s5_copy: 7 ; GCN: buffer_store_dword v32, off, s[0:3], s5 offset:8 ; 4-byte Folded Spill 8 ; GCN: v_writelane_b32 v32, s5, 2 9 ; GCN: s_swappc_b64 10 ; GCN: v_readlane_b32 s5, v32, 2 11 ; GCN: v_mov_b32_e32 [[K:v[0-9]+]], 9 12 ; GCN: buffer_store_dword [[K]], off, s[0:3], s5 offset:4 13 ; GCN: buffer_load_dword v32, off, s[0:3], s5 offset:8 ; 4-byte Folded Reload 14 ; GCN: s_setpc_b64 15 define void @spill_csr_s5_copy() #0 { 16 bb: 17 %alloca = alloca i32, addrspace(5) 18 %tmp = tail call i64 @func() #1 19 %tmp1 = getelementptr inbounds i32, i32 addrspace(1)* null, i64 %tmp 20 %tmp2 = load i32, i32 addrspace(1)* %tmp1, align 4 21 %tmp3 = zext i32 %tmp2 to i64 22 store volatile i32 9, i32 addrspace(5)* %alloca 23 ret void 24 } 25 26 declare i64 @func() 27 28 attributes #0 = { nounwind } 29 attributes #1 = { nounwind readnone } 30
