1 ; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,SI %s 2 ; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,VI %s 3 4 ; GCN-LABEL: {{^}}trunc_i64_bitcast_v2i32: 5 ; GCN: buffer_load_dword v 6 ; GCN: buffer_store_dword v 7 define amdgpu_kernel void @trunc_i64_bitcast_v2i32(i32 addrspace(1)* %out, <2 x i32> addrspace(1)* %in) { 8 %ld = load <2 x i32>, <2 x i32> addrspace(1)* %in 9 %bc = bitcast <2 x i32> %ld to i64 10 %trunc = trunc i64 %bc to i32 11 store i32 %trunc, i32 addrspace(1)* %out 12 ret void 13 } 14 15 ; GCN-LABEL: {{^}}trunc_i96_bitcast_v3i32: 16 ; GCN: buffer_load_dword v 17 ; GCN: buffer_store_dword v 18 define amdgpu_kernel void @trunc_i96_bitcast_v3i32(i32 addrspace(1)* %out, <3 x i32> addrspace(1)* %in) { 19 %ld = load <3 x i32>, <3 x i32> addrspace(1)* %in 20 %bc = bitcast <3 x i32> %ld to i96 21 %trunc = trunc i96 %bc to i32 22 store i32 %trunc, i32 addrspace(1)* %out 23 ret void 24 } 25 26 ; GCN-LABEL: {{^}}trunc_i128_bitcast_v4i32: 27 ; GCN: buffer_load_dword v 28 ; GCN: buffer_store_dword v 29 define amdgpu_kernel void @trunc_i128_bitcast_v4i32(i32 addrspace(1)* %out, <4 x i32> addrspace(1)* %in) { 30 %ld = load <4 x i32>, <4 x i32> addrspace(1)* %in 31 %bc = bitcast <4 x i32> %ld to i128 32 %trunc = trunc i128 %bc to i32 33 store i32 %trunc, i32 addrspace(1)* %out 34 ret void 35 } 36 37 ; Don't want load width reduced in this case. 38 ; GCN-LABEL: {{^}}trunc_i16_bitcast_v2i16: 39 ; GCN: buffer_load_dword [[VAL:v[0-9]+]] 40 ; GCN: buffer_store_short [[VAL]] 41 define amdgpu_kernel void @trunc_i16_bitcast_v2i16(i16 addrspace(1)* %out, <2 x i16> addrspace(1)* %in) { 42 %ld = load <2 x i16>, <2 x i16> addrspace(1)* %in 43 %bc = bitcast <2 x i16> %ld to i32 44 %trunc = trunc i32 %bc to i16 45 store i16 %trunc, i16 addrspace(1)* %out 46 ret void 47 } 48 49 ; GCN-LABEL: {{^}}trunc_i16_bitcast_v4i16: 50 ; FIXME We need to teach the dagcombiner to reduce load width for: 51 ; t21: v2i32,ch = load<LD8[%in(addrspace=1)]> t12, t10, undef:i64 52 ; t23: i64 = bitcast t21 53 ; t30: i16 = truncate t23 54 ; SI: buffer_load_dword v[[VAL:[0-9]+]] 55 ; VI: buffer_load_dwordx2 v{{\[}}[[VAL:[0-9]+]] 56 ; GCN: buffer_store_short v[[VAL]], off 57 define amdgpu_kernel void @trunc_i16_bitcast_v4i16(i16 addrspace(1)* %out, <4 x i16> addrspace(1)* %in) { 58 %ld = load <4 x i16>, <4 x i16> addrspace(1)* %in 59 %bc = bitcast <4 x i16> %ld to i64 60 %trunc = trunc i64 %bc to i16 61 store i16 %trunc, i16 addrspace(1)* %out 62 ret void 63 } 64 65 ; FIXME: Consistently shrink or not here 66 ; GCN-LABEL: {{^}}trunc_i8_bitcast_v2i8: 67 ; SI: buffer_load_ubyte [[VAL:v[0-9]+]] 68 ; VI: buffer_load_ushort [[VAL:v[0-9]+]] 69 ; GCN: buffer_store_byte [[VAL]] 70 define amdgpu_kernel void @trunc_i8_bitcast_v2i8(i8 addrspace(1)* %out, <2 x i8> addrspace(1)* %in) { 71 %ld = load <2 x i8>, <2 x i8> addrspace(1)* %in 72 %bc = bitcast <2 x i8> %ld to i16 73 %trunc = trunc i16 %bc to i8 74 store i8 %trunc, i8 addrspace(1)* %out 75 ret void 76 } 77 78 ; GCN-LABEL: {{^}}trunc_i32_bitcast_v4i8: 79 ; GCN: buffer_load_dword [[VAL:v[0-9]+]] 80 ; GCN: buffer_store_byte [[VAL]] 81 define amdgpu_kernel void @trunc_i32_bitcast_v4i8(i8 addrspace(1)* %out, <4 x i8> addrspace(1)* %in) { 82 %ld = load <4 x i8>, <4 x i8> addrspace(1)* %in 83 %bc = bitcast <4 x i8> %ld to i32 84 %trunc = trunc i32 %bc to i8 85 store i8 %trunc, i8 addrspace(1)* %out 86 ret void 87 } 88 89 ; GCN-LABEL: {{^}}trunc_i24_bitcast_v3i8: 90 ; GCN: buffer_load_dword [[VAL:v[0-9]+]] 91 ; GCN: buffer_store_byte [[VAL]] 92 define amdgpu_kernel void @trunc_i24_bitcast_v3i8(i8 addrspace(1)* %out, <3 x i8> addrspace(1)* %in) { 93 %ld = load <3 x i8>, <3 x i8> addrspace(1)* %in 94 %bc = bitcast <3 x i8> %ld to i24 95 %trunc = trunc i24 %bc to i8 96 store i8 %trunc, i8 addrspace(1)* %out 97 ret void 98 } 99
