1 ; RUN: llc -march=amdgcn < %s 2 3 ; Tests for a bug in SelectionDAG::UpdateNodeOperands exposed by VectorLegalizer 4 ; where divergence information is not updated. 5 6 declare i32 @llvm.amdgcn.workitem.id.x() 7 8 define amdgpu_kernel void @spam(double addrspace(1)* noalias %arg) { 9 %tmp = tail call i32 @llvm.amdgcn.workitem.id.x() 10 %tmp1 = zext i32 %tmp to i64 11 %tmp2 = getelementptr inbounds double, double addrspace(1)* %arg, i64 %tmp1 12 %tmp3 = load double, double addrspace(1)* %tmp2, align 8 13 %tmp4 = fadd double undef, 0.000000e+00 14 %tmp5 = insertelement <2 x double> undef, double %tmp4, i64 0 15 %tmp6 = insertelement <2 x double> %tmp5, double %tmp3, i64 1 16 %tmp7 = insertelement <2 x double> %tmp6, double 0.000000e+00, i64 1 17 %tmp8 = fadd <2 x double> zeroinitializer, undef 18 %tmp9 = fadd <2 x double> %tmp7, zeroinitializer 19 %tmp10 = extractelement <2 x double> %tmp8, i64 0 20 %tmp11 = getelementptr inbounds double, double addrspace(1)* %tmp2, i64 2 21 store double %tmp10, double addrspace(1)* %tmp11, align 8 22 %tmp12 = getelementptr inbounds double, double addrspace(1)* %tmp2, i64 3 23 store double undef, double addrspace(1)* %tmp12, align 8 24 %tmp13 = extractelement <2 x double> %tmp9, i64 0 25 %tmp14 = getelementptr inbounds double, double addrspace(1)* %tmp2, i64 6 26 store double %tmp13, double addrspace(1)* %tmp14, align 8 27 %tmp15 = getelementptr inbounds double, double addrspace(1)* %tmp2, i64 7 28 store double 0.000000e+00, double addrspace(1)* %tmp15, align 8 29 ret void 30 } 31
