1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2 # RUN: llc -O0 -mtriple arm-- -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s 3 --- | 4 define void @test_icmp_eq_s32() { ret void } 5 define void @test_icmp_ne_s32() { ret void } 6 define void @test_icmp_ugt_s32() { ret void } 7 define void @test_icmp_uge_s32() { ret void } 8 define void @test_icmp_ult_s32() { ret void } 9 define void @test_icmp_ule_s32() { ret void } 10 define void @test_icmp_sgt_s32() { ret void } 11 define void @test_icmp_sge_s32() { ret void } 12 define void @test_icmp_slt_s32() { ret void } 13 define void @test_icmp_sle_s32() { ret void } 14 15 define void @test_fcmp_true_s32() #0 { ret void } 16 define void @test_fcmp_false_s32() #0 { ret void } 17 18 define void @test_fcmp_oeq_s32() #0 { ret void } 19 define void @test_fcmp_ogt_s32() #0 { ret void } 20 define void @test_fcmp_oge_s32() #0 { ret void } 21 define void @test_fcmp_olt_s32() #0 { ret void } 22 define void @test_fcmp_ole_s32() #0 { ret void } 23 define void @test_fcmp_ord_s32() #0 { ret void } 24 define void @test_fcmp_ugt_s32() #0 { ret void } 25 define void @test_fcmp_uge_s32() #0 { ret void } 26 define void @test_fcmp_ult_s32() #0 { ret void } 27 define void @test_fcmp_ule_s32() #0 { ret void } 28 define void @test_fcmp_une_s32() #0 { ret void } 29 define void @test_fcmp_uno_s32() #0 { ret void } 30 31 define void @test_fcmp_one_s32() #0 { ret void } 32 define void @test_fcmp_ueq_s32() #0 { ret void } 33 34 define void @test_fcmp_true_s64() #0 { ret void } 35 define void @test_fcmp_false_s64() #0 { ret void } 36 37 define void @test_fcmp_oeq_s64() #0 { ret void } 38 define void @test_fcmp_ogt_s64() #0 { ret void } 39 define void @test_fcmp_oge_s64() #0 { ret void } 40 define void @test_fcmp_olt_s64() #0 { ret void } 41 define void @test_fcmp_ole_s64() #0 { ret void } 42 define void @test_fcmp_ord_s64() #0 { ret void } 43 define void @test_fcmp_ugt_s64() #0 { ret void } 44 define void @test_fcmp_uge_s64() #0 { ret void } 45 define void @test_fcmp_ult_s64() #0 { ret void } 46 define void @test_fcmp_ule_s64() #0 { ret void } 47 define void @test_fcmp_une_s64() #0 { ret void } 48 define void @test_fcmp_uno_s64() #0 { ret void } 49 50 define void @test_fcmp_one_s64() #0 { ret void } 51 define void @test_fcmp_ueq_s64() #0 { ret void } 52 53 attributes #0 = { "target-features"="+vfp2" } 54 ... 55 --- 56 name: test_icmp_eq_s32 57 legalized: true 58 regBankSelected: true 59 selected: false 60 registers: 61 - { id: 0, class: gprb } 62 - { id: 1, class: gprb } 63 - { id: 2, class: gprb } 64 - { id: 3, class: gprb } 65 body: | 66 bb.0: 67 liveins: $r0, $r1 68 69 ; CHECK-LABEL: name: test_icmp_eq_s32 70 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 71 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1 72 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 73 ; CHECK: CMPrr [[COPY]], [[COPY1]], 14, $noreg, implicit-def $cpsr 74 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 0, $cpsr 75 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi]], 1, 14, $noreg, $noreg 76 ; CHECK: $r0 = COPY [[ANDri]] 77 ; CHECK: BX_RET 14, $noreg, implicit $r0 78 %0(s32) = COPY $r0 79 %1(s32) = COPY $r1 80 %2(s1) = G_ICMP intpred(eq), %0(s32), %1 81 %3(s32) = G_ZEXT %2(s1) 82 $r0 = COPY %3(s32) 83 BX_RET 14, $noreg, implicit $r0 84 ... 85 --- 86 name: test_icmp_ne_s32 87 legalized: true 88 regBankSelected: true 89 selected: false 90 registers: 91 - { id: 0, class: gprb } 92 - { id: 1, class: gprb } 93 - { id: 2, class: gprb } 94 - { id: 3, class: gprb } 95 body: | 96 bb.0: 97 liveins: $r0, $r1 98 99 ; CHECK-LABEL: name: test_icmp_ne_s32 100 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 101 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1 102 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 103 ; CHECK: CMPrr [[COPY]], [[COPY1]], 14, $noreg, implicit-def $cpsr 104 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 1, $cpsr 105 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi]], 1, 14, $noreg, $noreg 106 ; CHECK: $r0 = COPY [[ANDri]] 107 ; CHECK: BX_RET 14, $noreg, implicit $r0 108 %0(s32) = COPY $r0 109 %1(s32) = COPY $r1 110 %2(s1) = G_ICMP intpred(ne), %0(s32), %1 111 %3(s32) = G_ZEXT %2(s1) 112 $r0 = COPY %3(s32) 113 BX_RET 14, $noreg, implicit $r0 114 ... 115 --- 116 name: test_icmp_ugt_s32 117 legalized: true 118 regBankSelected: true 119 selected: false 120 registers: 121 - { id: 0, class: gprb } 122 - { id: 1, class: gprb } 123 - { id: 2, class: gprb } 124 - { id: 3, class: gprb } 125 body: | 126 bb.0: 127 liveins: $r0, $r1 128 129 ; CHECK-LABEL: name: test_icmp_ugt_s32 130 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 131 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1 132 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 133 ; CHECK: CMPrr [[COPY]], [[COPY1]], 14, $noreg, implicit-def $cpsr 134 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 8, $cpsr 135 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi]], 1, 14, $noreg, $noreg 136 ; CHECK: $r0 = COPY [[ANDri]] 137 ; CHECK: BX_RET 14, $noreg, implicit $r0 138 %0(s32) = COPY $r0 139 %1(s32) = COPY $r1 140 %2(s1) = G_ICMP intpred(ugt), %0(s32), %1 141 %3(s32) = G_ZEXT %2(s1) 142 $r0 = COPY %3(s32) 143 BX_RET 14, $noreg, implicit $r0 144 ... 145 --- 146 name: test_icmp_uge_s32 147 legalized: true 148 regBankSelected: true 149 selected: false 150 registers: 151 - { id: 0, class: gprb } 152 - { id: 1, class: gprb } 153 - { id: 2, class: gprb } 154 - { id: 3, class: gprb } 155 body: | 156 bb.0: 157 liveins: $r0, $r1 158 159 ; CHECK-LABEL: name: test_icmp_uge_s32 160 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 161 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1 162 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 163 ; CHECK: CMPrr [[COPY]], [[COPY1]], 14, $noreg, implicit-def $cpsr 164 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 2, $cpsr 165 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi]], 1, 14, $noreg, $noreg 166 ; CHECK: $r0 = COPY [[ANDri]] 167 ; CHECK: BX_RET 14, $noreg, implicit $r0 168 %0(s32) = COPY $r0 169 %1(s32) = COPY $r1 170 %2(s1) = G_ICMP intpred(uge), %0(s32), %1 171 %3(s32) = G_ZEXT %2(s1) 172 $r0 = COPY %3(s32) 173 BX_RET 14, $noreg, implicit $r0 174 ... 175 --- 176 name: test_icmp_ult_s32 177 legalized: true 178 regBankSelected: true 179 selected: false 180 registers: 181 - { id: 0, class: gprb } 182 - { id: 1, class: gprb } 183 - { id: 2, class: gprb } 184 - { id: 3, class: gprb } 185 body: | 186 bb.0: 187 liveins: $r0, $r1 188 189 ; CHECK-LABEL: name: test_icmp_ult_s32 190 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 191 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1 192 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 193 ; CHECK: CMPrr [[COPY]], [[COPY1]], 14, $noreg, implicit-def $cpsr 194 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 3, $cpsr 195 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi]], 1, 14, $noreg, $noreg 196 ; CHECK: $r0 = COPY [[ANDri]] 197 ; CHECK: BX_RET 14, $noreg, implicit $r0 198 %0(s32) = COPY $r0 199 %1(s32) = COPY $r1 200 %2(s1) = G_ICMP intpred(ult), %0(s32), %1 201 %3(s32) = G_ZEXT %2(s1) 202 $r0 = COPY %3(s32) 203 BX_RET 14, $noreg, implicit $r0 204 ... 205 --- 206 name: test_icmp_ule_s32 207 legalized: true 208 regBankSelected: true 209 selected: false 210 registers: 211 - { id: 0, class: gprb } 212 - { id: 1, class: gprb } 213 - { id: 2, class: gprb } 214 - { id: 3, class: gprb } 215 body: | 216 bb.0: 217 liveins: $r0, $r1 218 219 ; CHECK-LABEL: name: test_icmp_ule_s32 220 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 221 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1 222 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 223 ; CHECK: CMPrr [[COPY]], [[COPY1]], 14, $noreg, implicit-def $cpsr 224 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 9, $cpsr 225 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi]], 1, 14, $noreg, $noreg 226 ; CHECK: $r0 = COPY [[ANDri]] 227 ; CHECK: BX_RET 14, $noreg, implicit $r0 228 %0(s32) = COPY $r0 229 %1(s32) = COPY $r1 230 %2(s1) = G_ICMP intpred(ule), %0(s32), %1 231 %3(s32) = G_ZEXT %2(s1) 232 $r0 = COPY %3(s32) 233 BX_RET 14, $noreg, implicit $r0 234 ... 235 --- 236 name: test_icmp_sgt_s32 237 legalized: true 238 regBankSelected: true 239 selected: false 240 registers: 241 - { id: 0, class: gprb } 242 - { id: 1, class: gprb } 243 - { id: 2, class: gprb } 244 - { id: 3, class: gprb } 245 body: | 246 bb.0: 247 liveins: $r0, $r1 248 249 ; CHECK-LABEL: name: test_icmp_sgt_s32 250 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 251 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1 252 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 253 ; CHECK: CMPrr [[COPY]], [[COPY1]], 14, $noreg, implicit-def $cpsr 254 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 12, $cpsr 255 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi]], 1, 14, $noreg, $noreg 256 ; CHECK: $r0 = COPY [[ANDri]] 257 ; CHECK: BX_RET 14, $noreg, implicit $r0 258 %0(s32) = COPY $r0 259 %1(s32) = COPY $r1 260 %2(s1) = G_ICMP intpred(sgt), %0(s32), %1 261 %3(s32) = G_ZEXT %2(s1) 262 $r0 = COPY %3(s32) 263 BX_RET 14, $noreg, implicit $r0 264 ... 265 --- 266 name: test_icmp_sge_s32 267 legalized: true 268 regBankSelected: true 269 selected: false 270 registers: 271 - { id: 0, class: gprb } 272 - { id: 1, class: gprb } 273 - { id: 2, class: gprb } 274 - { id: 3, class: gprb } 275 body: | 276 bb.0: 277 liveins: $r0, $r1 278 279 ; CHECK-LABEL: name: test_icmp_sge_s32 280 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 281 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1 282 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 283 ; CHECK: CMPrr [[COPY]], [[COPY1]], 14, $noreg, implicit-def $cpsr 284 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 10, $cpsr 285 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi]], 1, 14, $noreg, $noreg 286 ; CHECK: $r0 = COPY [[ANDri]] 287 ; CHECK: BX_RET 14, $noreg, implicit $r0 288 %0(s32) = COPY $r0 289 %1(s32) = COPY $r1 290 %2(s1) = G_ICMP intpred(sge), %0(s32), %1 291 %3(s32) = G_ZEXT %2(s1) 292 $r0 = COPY %3(s32) 293 BX_RET 14, $noreg, implicit $r0 294 ... 295 --- 296 name: test_icmp_slt_s32 297 legalized: true 298 regBankSelected: true 299 selected: false 300 registers: 301 - { id: 0, class: gprb } 302 - { id: 1, class: gprb } 303 - { id: 2, class: gprb } 304 - { id: 3, class: gprb } 305 body: | 306 bb.0: 307 liveins: $r0, $r1 308 309 ; CHECK-LABEL: name: test_icmp_slt_s32 310 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 311 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1 312 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 313 ; CHECK: CMPrr [[COPY]], [[COPY1]], 14, $noreg, implicit-def $cpsr 314 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 11, $cpsr 315 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi]], 1, 14, $noreg, $noreg 316 ; CHECK: $r0 = COPY [[ANDri]] 317 ; CHECK: BX_RET 14, $noreg, implicit $r0 318 %0(s32) = COPY $r0 319 %1(s32) = COPY $r1 320 %2(s1) = G_ICMP intpred(slt), %0(s32), %1 321 %3(s32) = G_ZEXT %2(s1) 322 $r0 = COPY %3(s32) 323 BX_RET 14, $noreg, implicit $r0 324 ... 325 --- 326 name: test_icmp_sle_s32 327 legalized: true 328 regBankSelected: true 329 selected: false 330 registers: 331 - { id: 0, class: gprb } 332 - { id: 1, class: gprb } 333 - { id: 2, class: gprb } 334 - { id: 3, class: gprb } 335 body: | 336 bb.0: 337 liveins: $r0, $r1 338 339 ; CHECK-LABEL: name: test_icmp_sle_s32 340 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 341 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1 342 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 343 ; CHECK: CMPrr [[COPY]], [[COPY1]], 14, $noreg, implicit-def $cpsr 344 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 13, $cpsr 345 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi]], 1, 14, $noreg, $noreg 346 ; CHECK: $r0 = COPY [[ANDri]] 347 ; CHECK: BX_RET 14, $noreg, implicit $r0 348 %0(s32) = COPY $r0 349 %1(s32) = COPY $r1 350 %2(s1) = G_ICMP intpred(sle), %0(s32), %1 351 %3(s32) = G_ZEXT %2(s1) 352 $r0 = COPY %3(s32) 353 BX_RET 14, $noreg, implicit $r0 354 ... 355 --- 356 name: test_fcmp_true_s32 357 legalized: true 358 regBankSelected: true 359 selected: false 360 registers: 361 - { id: 0, class: fprb } 362 - { id: 1, class: fprb } 363 - { id: 2, class: gprb } 364 - { id: 3, class: gprb } 365 body: | 366 bb.0: 367 liveins: $s0, $s1 368 369 ; CHECK-LABEL: name: test_fcmp_true_s32 370 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 1, 14, $noreg, $noreg 371 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVi]], 1, 14, $noreg, $noreg 372 ; CHECK: $r0 = COPY [[ANDri]] 373 ; CHECK: BX_RET 14, $noreg, implicit $r0 374 %0(s32) = COPY $s0 375 %1(s32) = COPY $s1 376 %2(s1) = G_FCMP floatpred(true), %0(s32), %1 377 %3(s32) = G_ZEXT %2(s1) 378 $r0 = COPY %3(s32) 379 BX_RET 14, $noreg, implicit $r0 380 ... 381 --- 382 name: test_fcmp_false_s32 383 legalized: true 384 regBankSelected: true 385 selected: false 386 registers: 387 - { id: 0, class: fprb } 388 - { id: 1, class: fprb } 389 - { id: 2, class: gprb } 390 - { id: 3, class: gprb } 391 body: | 392 bb.0: 393 liveins: $s0, $s1 394 395 ; CHECK-LABEL: name: test_fcmp_false_s32 396 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 397 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVi]], 1, 14, $noreg, $noreg 398 ; CHECK: $r0 = COPY [[ANDri]] 399 ; CHECK: BX_RET 14, $noreg, implicit $r0 400 %0(s32) = COPY $s0 401 %1(s32) = COPY $s1 402 %2(s1) = G_FCMP floatpred(false), %0(s32), %1 403 %3(s32) = G_ZEXT %2(s1) 404 $r0 = COPY %3(s32) 405 BX_RET 14, $noreg, implicit $r0 406 ... 407 --- 408 name: test_fcmp_oeq_s32 409 legalized: true 410 regBankSelected: true 411 selected: false 412 registers: 413 - { id: 0, class: fprb } 414 - { id: 1, class: fprb } 415 - { id: 2, class: gprb } 416 - { id: 3, class: gprb } 417 body: | 418 bb.0: 419 liveins: $s0, $s1 420 421 ; CHECK-LABEL: name: test_fcmp_oeq_s32 422 ; CHECK: [[COPY:%[0-9]+]]:spr = COPY $s0 423 ; CHECK: [[COPY1:%[0-9]+]]:spr = COPY $s1 424 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 425 ; CHECK: VCMPS [[COPY]], [[COPY1]], 14, $noreg, implicit-def $fpscr_nzcv 426 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 427 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 0, $cpsr 428 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi]], 1, 14, $noreg, $noreg 429 ; CHECK: $r0 = COPY [[ANDri]] 430 ; CHECK: BX_RET 14, $noreg, implicit $r0 431 %0(s32) = COPY $s0 432 %1(s32) = COPY $s1 433 %2(s1) = G_FCMP floatpred(oeq), %0(s32), %1 434 %3(s32) = G_ZEXT %2(s1) 435 $r0 = COPY %3(s32) 436 BX_RET 14, $noreg, implicit $r0 437 ... 438 --- 439 name: test_fcmp_ogt_s32 440 legalized: true 441 regBankSelected: true 442 selected: false 443 registers: 444 - { id: 0, class: fprb } 445 - { id: 1, class: fprb } 446 - { id: 2, class: gprb } 447 - { id: 3, class: gprb } 448 body: | 449 bb.0: 450 liveins: $s0, $s1 451 452 ; CHECK-LABEL: name: test_fcmp_ogt_s32 453 ; CHECK: [[COPY:%[0-9]+]]:spr = COPY $s0 454 ; CHECK: [[COPY1:%[0-9]+]]:spr = COPY $s1 455 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 456 ; CHECK: VCMPS [[COPY]], [[COPY1]], 14, $noreg, implicit-def $fpscr_nzcv 457 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 458 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 12, $cpsr 459 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi]], 1, 14, $noreg, $noreg 460 ; CHECK: $r0 = COPY [[ANDri]] 461 ; CHECK: BX_RET 14, $noreg, implicit $r0 462 %0(s32) = COPY $s0 463 %1(s32) = COPY $s1 464 %2(s1) = G_FCMP floatpred(ogt), %0(s32), %1 465 %3(s32) = G_ZEXT %2(s1) 466 $r0 = COPY %3(s32) 467 BX_RET 14, $noreg, implicit $r0 468 ... 469 --- 470 name: test_fcmp_oge_s32 471 legalized: true 472 regBankSelected: true 473 selected: false 474 registers: 475 - { id: 0, class: fprb } 476 - { id: 1, class: fprb } 477 - { id: 2, class: gprb } 478 - { id: 3, class: gprb } 479 body: | 480 bb.0: 481 liveins: $s0, $s1 482 483 ; CHECK-LABEL: name: test_fcmp_oge_s32 484 ; CHECK: [[COPY:%[0-9]+]]:spr = COPY $s0 485 ; CHECK: [[COPY1:%[0-9]+]]:spr = COPY $s1 486 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 487 ; CHECK: VCMPS [[COPY]], [[COPY1]], 14, $noreg, implicit-def $fpscr_nzcv 488 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 489 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 10, $cpsr 490 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi]], 1, 14, $noreg, $noreg 491 ; CHECK: $r0 = COPY [[ANDri]] 492 ; CHECK: BX_RET 14, $noreg, implicit $r0 493 %0(s32) = COPY $s0 494 %1(s32) = COPY $s1 495 %2(s1) = G_FCMP floatpred(oge), %0(s32), %1 496 %3(s32) = G_ZEXT %2(s1) 497 $r0 = COPY %3(s32) 498 BX_RET 14, $noreg, implicit $r0 499 ... 500 --- 501 name: test_fcmp_olt_s32 502 legalized: true 503 regBankSelected: true 504 selected: false 505 registers: 506 - { id: 0, class: fprb } 507 - { id: 1, class: fprb } 508 - { id: 2, class: gprb } 509 - { id: 3, class: gprb } 510 body: | 511 bb.0: 512 liveins: $s0, $s1 513 514 ; CHECK-LABEL: name: test_fcmp_olt_s32 515 ; CHECK: [[COPY:%[0-9]+]]:spr = COPY $s0 516 ; CHECK: [[COPY1:%[0-9]+]]:spr = COPY $s1 517 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 518 ; CHECK: VCMPS [[COPY]], [[COPY1]], 14, $noreg, implicit-def $fpscr_nzcv 519 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 520 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 4, $cpsr 521 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi]], 1, 14, $noreg, $noreg 522 ; CHECK: $r0 = COPY [[ANDri]] 523 ; CHECK: BX_RET 14, $noreg, implicit $r0 524 %0(s32) = COPY $s0 525 %1(s32) = COPY $s1 526 %2(s1) = G_FCMP floatpred(olt), %0(s32), %1 527 %3(s32) = G_ZEXT %2(s1) 528 $r0 = COPY %3(s32) 529 BX_RET 14, $noreg, implicit $r0 530 ... 531 --- 532 name: test_fcmp_ole_s32 533 legalized: true 534 regBankSelected: true 535 selected: false 536 registers: 537 - { id: 0, class: fprb } 538 - { id: 1, class: fprb } 539 - { id: 2, class: gprb } 540 - { id: 3, class: gprb } 541 body: | 542 bb.0: 543 liveins: $s0, $s1 544 545 ; CHECK-LABEL: name: test_fcmp_ole_s32 546 ; CHECK: [[COPY:%[0-9]+]]:spr = COPY $s0 547 ; CHECK: [[COPY1:%[0-9]+]]:spr = COPY $s1 548 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 549 ; CHECK: VCMPS [[COPY]], [[COPY1]], 14, $noreg, implicit-def $fpscr_nzcv 550 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 551 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 9, $cpsr 552 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi]], 1, 14, $noreg, $noreg 553 ; CHECK: $r0 = COPY [[ANDri]] 554 ; CHECK: BX_RET 14, $noreg, implicit $r0 555 %0(s32) = COPY $s0 556 %1(s32) = COPY $s1 557 %2(s1) = G_FCMP floatpred(ole), %0(s32), %1 558 %3(s32) = G_ZEXT %2(s1) 559 $r0 = COPY %3(s32) 560 BX_RET 14, $noreg, implicit $r0 561 ... 562 --- 563 name: test_fcmp_ord_s32 564 legalized: true 565 regBankSelected: true 566 selected: false 567 registers: 568 - { id: 0, class: fprb } 569 - { id: 1, class: fprb } 570 - { id: 2, class: gprb } 571 - { id: 3, class: gprb } 572 body: | 573 bb.0: 574 liveins: $s0, $s1 575 576 ; CHECK-LABEL: name: test_fcmp_ord_s32 577 ; CHECK: [[COPY:%[0-9]+]]:spr = COPY $s0 578 ; CHECK: [[COPY1:%[0-9]+]]:spr = COPY $s1 579 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 580 ; CHECK: VCMPS [[COPY]], [[COPY1]], 14, $noreg, implicit-def $fpscr_nzcv 581 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 582 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 7, $cpsr 583 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi]], 1, 14, $noreg, $noreg 584 ; CHECK: $r0 = COPY [[ANDri]] 585 ; CHECK: BX_RET 14, $noreg, implicit $r0 586 %0(s32) = COPY $s0 587 %1(s32) = COPY $s1 588 %2(s1) = G_FCMP floatpred(ord), %0(s32), %1 589 %3(s32) = G_ZEXT %2(s1) 590 $r0 = COPY %3(s32) 591 BX_RET 14, $noreg, implicit $r0 592 ... 593 --- 594 name: test_fcmp_ugt_s32 595 legalized: true 596 regBankSelected: true 597 selected: false 598 registers: 599 - { id: 0, class: fprb } 600 - { id: 1, class: fprb } 601 - { id: 2, class: gprb } 602 - { id: 3, class: gprb } 603 body: | 604 bb.0: 605 liveins: $s0, $s1 606 607 ; CHECK-LABEL: name: test_fcmp_ugt_s32 608 ; CHECK: [[COPY:%[0-9]+]]:spr = COPY $s0 609 ; CHECK: [[COPY1:%[0-9]+]]:spr = COPY $s1 610 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 611 ; CHECK: VCMPS [[COPY]], [[COPY1]], 14, $noreg, implicit-def $fpscr_nzcv 612 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 613 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 8, $cpsr 614 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi]], 1, 14, $noreg, $noreg 615 ; CHECK: $r0 = COPY [[ANDri]] 616 ; CHECK: BX_RET 14, $noreg, implicit $r0 617 %0(s32) = COPY $s0 618 %1(s32) = COPY $s1 619 %2(s1) = G_FCMP floatpred(ugt), %0(s32), %1 620 %3(s32) = G_ZEXT %2(s1) 621 $r0 = COPY %3(s32) 622 BX_RET 14, $noreg, implicit $r0 623 ... 624 --- 625 name: test_fcmp_uge_s32 626 legalized: true 627 regBankSelected: true 628 selected: false 629 registers: 630 - { id: 0, class: fprb } 631 - { id: 1, class: fprb } 632 - { id: 2, class: gprb } 633 - { id: 3, class: gprb } 634 body: | 635 bb.0: 636 liveins: $s0, $s1 637 638 ; CHECK-LABEL: name: test_fcmp_uge_s32 639 ; CHECK: [[COPY:%[0-9]+]]:spr = COPY $s0 640 ; CHECK: [[COPY1:%[0-9]+]]:spr = COPY $s1 641 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 642 ; CHECK: VCMPS [[COPY]], [[COPY1]], 14, $noreg, implicit-def $fpscr_nzcv 643 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 644 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 5, $cpsr 645 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi]], 1, 14, $noreg, $noreg 646 ; CHECK: $r0 = COPY [[ANDri]] 647 ; CHECK: BX_RET 14, $noreg, implicit $r0 648 %0(s32) = COPY $s0 649 %1(s32) = COPY $s1 650 %2(s1) = G_FCMP floatpred(uge), %0(s32), %1 651 %3(s32) = G_ZEXT %2(s1) 652 $r0 = COPY %3(s32) 653 BX_RET 14, $noreg, implicit $r0 654 ... 655 --- 656 name: test_fcmp_ult_s32 657 legalized: true 658 regBankSelected: true 659 selected: false 660 registers: 661 - { id: 0, class: fprb } 662 - { id: 1, class: fprb } 663 - { id: 2, class: gprb } 664 - { id: 3, class: gprb } 665 body: | 666 bb.0: 667 liveins: $s0, $s1 668 669 ; CHECK-LABEL: name: test_fcmp_ult_s32 670 ; CHECK: [[COPY:%[0-9]+]]:spr = COPY $s0 671 ; CHECK: [[COPY1:%[0-9]+]]:spr = COPY $s1 672 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 673 ; CHECK: VCMPS [[COPY]], [[COPY1]], 14, $noreg, implicit-def $fpscr_nzcv 674 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 675 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 11, $cpsr 676 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi]], 1, 14, $noreg, $noreg 677 ; CHECK: $r0 = COPY [[ANDri]] 678 ; CHECK: BX_RET 14, $noreg, implicit $r0 679 %0(s32) = COPY $s0 680 %1(s32) = COPY $s1 681 %2(s1) = G_FCMP floatpred(ult), %0(s32), %1 682 %3(s32) = G_ZEXT %2(s1) 683 $r0 = COPY %3(s32) 684 BX_RET 14, $noreg, implicit $r0 685 ... 686 --- 687 name: test_fcmp_ule_s32 688 legalized: true 689 regBankSelected: true 690 selected: false 691 registers: 692 - { id: 0, class: fprb } 693 - { id: 1, class: fprb } 694 - { id: 2, class: gprb } 695 - { id: 3, class: gprb } 696 body: | 697 bb.0: 698 liveins: $s0, $s1 699 700 ; CHECK-LABEL: name: test_fcmp_ule_s32 701 ; CHECK: [[COPY:%[0-9]+]]:spr = COPY $s0 702 ; CHECK: [[COPY1:%[0-9]+]]:spr = COPY $s1 703 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 704 ; CHECK: VCMPS [[COPY]], [[COPY1]], 14, $noreg, implicit-def $fpscr_nzcv 705 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 706 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 13, $cpsr 707 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi]], 1, 14, $noreg, $noreg 708 ; CHECK: $r0 = COPY [[ANDri]] 709 ; CHECK: BX_RET 14, $noreg, implicit $r0 710 %0(s32) = COPY $s0 711 %1(s32) = COPY $s1 712 %2(s1) = G_FCMP floatpred(ule), %0(s32), %1 713 %3(s32) = G_ZEXT %2(s1) 714 $r0 = COPY %3(s32) 715 BX_RET 14, $noreg, implicit $r0 716 ... 717 --- 718 name: test_fcmp_une_s32 719 legalized: true 720 regBankSelected: true 721 selected: false 722 registers: 723 - { id: 0, class: fprb } 724 - { id: 1, class: fprb } 725 - { id: 2, class: gprb } 726 - { id: 3, class: gprb } 727 body: | 728 bb.0: 729 liveins: $s0, $s1 730 731 ; CHECK-LABEL: name: test_fcmp_une_s32 732 ; CHECK: [[COPY:%[0-9]+]]:spr = COPY $s0 733 ; CHECK: [[COPY1:%[0-9]+]]:spr = COPY $s1 734 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 735 ; CHECK: VCMPS [[COPY]], [[COPY1]], 14, $noreg, implicit-def $fpscr_nzcv 736 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 737 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 1, $cpsr 738 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi]], 1, 14, $noreg, $noreg 739 ; CHECK: $r0 = COPY [[ANDri]] 740 ; CHECK: BX_RET 14, $noreg, implicit $r0 741 %0(s32) = COPY $s0 742 %1(s32) = COPY $s1 743 %2(s1) = G_FCMP floatpred(une), %0(s32), %1 744 %3(s32) = G_ZEXT %2(s1) 745 $r0 = COPY %3(s32) 746 BX_RET 14, $noreg, implicit $r0 747 ... 748 --- 749 name: test_fcmp_uno_s32 750 legalized: true 751 regBankSelected: true 752 selected: false 753 registers: 754 - { id: 0, class: fprb } 755 - { id: 1, class: fprb } 756 - { id: 2, class: gprb } 757 - { id: 3, class: gprb } 758 body: | 759 bb.0: 760 liveins: $s0, $s1 761 762 ; CHECK-LABEL: name: test_fcmp_uno_s32 763 ; CHECK: [[COPY:%[0-9]+]]:spr = COPY $s0 764 ; CHECK: [[COPY1:%[0-9]+]]:spr = COPY $s1 765 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 766 ; CHECK: VCMPS [[COPY]], [[COPY1]], 14, $noreg, implicit-def $fpscr_nzcv 767 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 768 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 6, $cpsr 769 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi]], 1, 14, $noreg, $noreg 770 ; CHECK: $r0 = COPY [[ANDri]] 771 ; CHECK: BX_RET 14, $noreg, implicit $r0 772 %0(s32) = COPY $s0 773 %1(s32) = COPY $s1 774 %2(s1) = G_FCMP floatpred(uno), %0(s32), %1 775 %3(s32) = G_ZEXT %2(s1) 776 $r0 = COPY %3(s32) 777 BX_RET 14, $noreg, implicit $r0 778 ... 779 --- 780 name: test_fcmp_one_s32 781 legalized: true 782 regBankSelected: true 783 selected: false 784 registers: 785 - { id: 0, class: fprb } 786 - { id: 1, class: fprb } 787 - { id: 2, class: gprb } 788 - { id: 3, class: gprb } 789 body: | 790 bb.0: 791 liveins: $s0, $s1 792 793 ; CHECK-LABEL: name: test_fcmp_one_s32 794 ; CHECK: [[COPY:%[0-9]+]]:spr = COPY $s0 795 ; CHECK: [[COPY1:%[0-9]+]]:spr = COPY $s1 796 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 797 ; CHECK: VCMPS [[COPY]], [[COPY1]], 14, $noreg, implicit-def $fpscr_nzcv 798 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 799 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 12, $cpsr 800 ; CHECK: VCMPS [[COPY]], [[COPY1]], 14, $noreg, implicit-def $fpscr_nzcv 801 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 802 ; CHECK: [[MOVCCi1:%[0-9]+]]:gpr = MOVCCi [[MOVCCi]], 1, 4, $cpsr 803 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi1]], 1, 14, $noreg, $noreg 804 ; CHECK: $r0 = COPY [[ANDri]] 805 ; CHECK: BX_RET 14, $noreg, implicit $r0 806 %0(s32) = COPY $s0 807 %1(s32) = COPY $s1 808 %2(s1) = G_FCMP floatpred(one), %0(s32), %1 809 %3(s32) = G_ZEXT %2(s1) 810 $r0 = COPY %3(s32) 811 BX_RET 14, $noreg, implicit $r0 812 ... 813 --- 814 name: test_fcmp_ueq_s32 815 legalized: true 816 regBankSelected: true 817 selected: false 818 registers: 819 - { id: 0, class: fprb } 820 - { id: 1, class: fprb } 821 - { id: 2, class: gprb } 822 - { id: 3, class: gprb } 823 body: | 824 bb.0: 825 liveins: $s0, $s1 826 827 ; CHECK-LABEL: name: test_fcmp_ueq_s32 828 ; CHECK: [[COPY:%[0-9]+]]:spr = COPY $s0 829 ; CHECK: [[COPY1:%[0-9]+]]:spr = COPY $s1 830 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 831 ; CHECK: VCMPS [[COPY]], [[COPY1]], 14, $noreg, implicit-def $fpscr_nzcv 832 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 833 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 0, $cpsr 834 ; CHECK: VCMPS [[COPY]], [[COPY1]], 14, $noreg, implicit-def $fpscr_nzcv 835 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 836 ; CHECK: [[MOVCCi1:%[0-9]+]]:gpr = MOVCCi [[MOVCCi]], 1, 6, $cpsr 837 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi1]], 1, 14, $noreg, $noreg 838 ; CHECK: $r0 = COPY [[ANDri]] 839 ; CHECK: BX_RET 14, $noreg, implicit $r0 840 %0(s32) = COPY $s0 841 %1(s32) = COPY $s1 842 %2(s1) = G_FCMP floatpred(ueq), %0(s32), %1 843 %3(s32) = G_ZEXT %2(s1) 844 $r0 = COPY %3(s32) 845 BX_RET 14, $noreg, implicit $r0 846 ... 847 --- 848 name: test_fcmp_true_s64 849 legalized: true 850 regBankSelected: true 851 selected: false 852 registers: 853 - { id: 0, class: fprb } 854 - { id: 1, class: fprb } 855 - { id: 2, class: gprb } 856 - { id: 3, class: gprb } 857 body: | 858 bb.0: 859 liveins: $d0, $d1 860 861 ; CHECK-LABEL: name: test_fcmp_true_s64 862 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 1, 14, $noreg, $noreg 863 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVi]], 1, 14, $noreg, $noreg 864 ; CHECK: $r0 = COPY [[ANDri]] 865 ; CHECK: BX_RET 14, $noreg, implicit $r0 866 %0(s64) = COPY $d0 867 %1(s64) = COPY $d1 868 %2(s1) = G_FCMP floatpred(true), %0(s64), %1 869 %3(s32) = G_ZEXT %2(s1) 870 $r0 = COPY %3(s32) 871 BX_RET 14, $noreg, implicit $r0 872 ... 873 --- 874 name: test_fcmp_false_s64 875 legalized: true 876 regBankSelected: true 877 selected: false 878 registers: 879 - { id: 0, class: fprb } 880 - { id: 1, class: fprb } 881 - { id: 2, class: gprb } 882 - { id: 3, class: gprb } 883 body: | 884 bb.0: 885 liveins: $d0, $d1 886 887 ; CHECK-LABEL: name: test_fcmp_false_s64 888 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 889 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVi]], 1, 14, $noreg, $noreg 890 ; CHECK: $r0 = COPY [[ANDri]] 891 ; CHECK: BX_RET 14, $noreg, implicit $r0 892 %0(s64) = COPY $d0 893 %1(s64) = COPY $d1 894 %2(s1) = G_FCMP floatpred(false), %0(s64), %1 895 %3(s32) = G_ZEXT %2(s1) 896 $r0 = COPY %3(s32) 897 BX_RET 14, $noreg, implicit $r0 898 ... 899 --- 900 name: test_fcmp_oeq_s64 901 legalized: true 902 regBankSelected: true 903 selected: false 904 registers: 905 - { id: 0, class: fprb } 906 - { id: 1, class: fprb } 907 - { id: 2, class: gprb } 908 - { id: 3, class: gprb } 909 body: | 910 bb.0: 911 liveins: $d0, $d1 912 913 ; CHECK-LABEL: name: test_fcmp_oeq_s64 914 ; CHECK: [[COPY:%[0-9]+]]:dpr = COPY $d0 915 ; CHECK: [[COPY1:%[0-9]+]]:dpr = COPY $d1 916 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 917 ; CHECK: VCMPD [[COPY]], [[COPY1]], 14, $noreg, implicit-def $fpscr_nzcv 918 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 919 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 0, $cpsr 920 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi]], 1, 14, $noreg, $noreg 921 ; CHECK: $r0 = COPY [[ANDri]] 922 ; CHECK: BX_RET 14, $noreg, implicit $r0 923 %0(s64) = COPY $d0 924 %1(s64) = COPY $d1 925 %2(s1) = G_FCMP floatpred(oeq), %0(s64), %1 926 %3(s32) = G_ZEXT %2(s1) 927 $r0 = COPY %3(s32) 928 BX_RET 14, $noreg, implicit $r0 929 ... 930 --- 931 name: test_fcmp_ogt_s64 932 legalized: true 933 regBankSelected: true 934 selected: false 935 registers: 936 - { id: 0, class: fprb } 937 - { id: 1, class: fprb } 938 - { id: 2, class: gprb } 939 - { id: 3, class: gprb } 940 body: | 941 bb.0: 942 liveins: $d0, $d1 943 944 ; CHECK-LABEL: name: test_fcmp_ogt_s64 945 ; CHECK: [[COPY:%[0-9]+]]:dpr = COPY $d0 946 ; CHECK: [[COPY1:%[0-9]+]]:dpr = COPY $d1 947 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 948 ; CHECK: VCMPD [[COPY]], [[COPY1]], 14, $noreg, implicit-def $fpscr_nzcv 949 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 950 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 12, $cpsr 951 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi]], 1, 14, $noreg, $noreg 952 ; CHECK: $r0 = COPY [[ANDri]] 953 ; CHECK: BX_RET 14, $noreg, implicit $r0 954 %0(s64) = COPY $d0 955 %1(s64) = COPY $d1 956 %2(s1) = G_FCMP floatpred(ogt), %0(s64), %1 957 %3(s32) = G_ZEXT %2(s1) 958 $r0 = COPY %3(s32) 959 BX_RET 14, $noreg, implicit $r0 960 ... 961 --- 962 name: test_fcmp_oge_s64 963 legalized: true 964 regBankSelected: true 965 selected: false 966 registers: 967 - { id: 0, class: fprb } 968 - { id: 1, class: fprb } 969 - { id: 2, class: gprb } 970 - { id: 3, class: gprb } 971 body: | 972 bb.0: 973 liveins: $d0, $d1 974 975 ; CHECK-LABEL: name: test_fcmp_oge_s64 976 ; CHECK: [[COPY:%[0-9]+]]:dpr = COPY $d0 977 ; CHECK: [[COPY1:%[0-9]+]]:dpr = COPY $d1 978 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 979 ; CHECK: VCMPD [[COPY]], [[COPY1]], 14, $noreg, implicit-def $fpscr_nzcv 980 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 981 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 10, $cpsr 982 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi]], 1, 14, $noreg, $noreg 983 ; CHECK: $r0 = COPY [[ANDri]] 984 ; CHECK: BX_RET 14, $noreg, implicit $r0 985 %0(s64) = COPY $d0 986 %1(s64) = COPY $d1 987 %2(s1) = G_FCMP floatpred(oge), %0(s64), %1 988 %3(s32) = G_ZEXT %2(s1) 989 $r0 = COPY %3(s32) 990 BX_RET 14, $noreg, implicit $r0 991 ... 992 --- 993 name: test_fcmp_olt_s64 994 legalized: true 995 regBankSelected: true 996 selected: false 997 registers: 998 - { id: 0, class: fprb } 999 - { id: 1, class: fprb } 1000 - { id: 2, class: gprb } 1001 - { id: 3, class: gprb } 1002 body: | 1003 bb.0: 1004 liveins: $d0, $d1 1005 1006 ; CHECK-LABEL: name: test_fcmp_olt_s64 1007 ; CHECK: [[COPY:%[0-9]+]]:dpr = COPY $d0 1008 ; CHECK: [[COPY1:%[0-9]+]]:dpr = COPY $d1 1009 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 1010 ; CHECK: VCMPD [[COPY]], [[COPY1]], 14, $noreg, implicit-def $fpscr_nzcv 1011 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 1012 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 4, $cpsr 1013 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi]], 1, 14, $noreg, $noreg 1014 ; CHECK: $r0 = COPY [[ANDri]] 1015 ; CHECK: BX_RET 14, $noreg, implicit $r0 1016 %0(s64) = COPY $d0 1017 %1(s64) = COPY $d1 1018 %2(s1) = G_FCMP floatpred(olt), %0(s64), %1 1019 %3(s32) = G_ZEXT %2(s1) 1020 $r0 = COPY %3(s32) 1021 BX_RET 14, $noreg, implicit $r0 1022 ... 1023 --- 1024 name: test_fcmp_ole_s64 1025 legalized: true 1026 regBankSelected: true 1027 selected: false 1028 registers: 1029 - { id: 0, class: fprb } 1030 - { id: 1, class: fprb } 1031 - { id: 2, class: gprb } 1032 - { id: 3, class: gprb } 1033 body: | 1034 bb.0: 1035 liveins: $d0, $d1 1036 1037 ; CHECK-LABEL: name: test_fcmp_ole_s64 1038 ; CHECK: [[COPY:%[0-9]+]]:dpr = COPY $d0 1039 ; CHECK: [[COPY1:%[0-9]+]]:dpr = COPY $d1 1040 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 1041 ; CHECK: VCMPD [[COPY]], [[COPY1]], 14, $noreg, implicit-def $fpscr_nzcv 1042 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 1043 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 9, $cpsr 1044 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi]], 1, 14, $noreg, $noreg 1045 ; CHECK: $r0 = COPY [[ANDri]] 1046 ; CHECK: BX_RET 14, $noreg, implicit $r0 1047 %0(s64) = COPY $d0 1048 %1(s64) = COPY $d1 1049 %2(s1) = G_FCMP floatpred(ole), %0(s64), %1 1050 %3(s32) = G_ZEXT %2(s1) 1051 $r0 = COPY %3(s32) 1052 BX_RET 14, $noreg, implicit $r0 1053 ... 1054 --- 1055 name: test_fcmp_ord_s64 1056 legalized: true 1057 regBankSelected: true 1058 selected: false 1059 registers: 1060 - { id: 0, class: fprb } 1061 - { id: 1, class: fprb } 1062 - { id: 2, class: gprb } 1063 - { id: 3, class: gprb } 1064 body: | 1065 bb.0: 1066 liveins: $d0, $d1 1067 1068 ; CHECK-LABEL: name: test_fcmp_ord_s64 1069 ; CHECK: [[COPY:%[0-9]+]]:dpr = COPY $d0 1070 ; CHECK: [[COPY1:%[0-9]+]]:dpr = COPY $d1 1071 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 1072 ; CHECK: VCMPD [[COPY]], [[COPY1]], 14, $noreg, implicit-def $fpscr_nzcv 1073 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 1074 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 7, $cpsr 1075 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi]], 1, 14, $noreg, $noreg 1076 ; CHECK: $r0 = COPY [[ANDri]] 1077 ; CHECK: BX_RET 14, $noreg, implicit $r0 1078 %0(s64) = COPY $d0 1079 %1(s64) = COPY $d1 1080 %2(s1) = G_FCMP floatpred(ord), %0(s64), %1 1081 %3(s32) = G_ZEXT %2(s1) 1082 $r0 = COPY %3(s32) 1083 BX_RET 14, $noreg, implicit $r0 1084 ... 1085 --- 1086 name: test_fcmp_ugt_s64 1087 legalized: true 1088 regBankSelected: true 1089 selected: false 1090 registers: 1091 - { id: 0, class: fprb } 1092 - { id: 1, class: fprb } 1093 - { id: 2, class: gprb } 1094 - { id: 3, class: gprb } 1095 body: | 1096 bb.0: 1097 liveins: $d0, $d1 1098 1099 ; CHECK-LABEL: name: test_fcmp_ugt_s64 1100 ; CHECK: [[COPY:%[0-9]+]]:dpr = COPY $d0 1101 ; CHECK: [[COPY1:%[0-9]+]]:dpr = COPY $d1 1102 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 1103 ; CHECK: VCMPD [[COPY]], [[COPY1]], 14, $noreg, implicit-def $fpscr_nzcv 1104 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 1105 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 8, $cpsr 1106 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi]], 1, 14, $noreg, $noreg 1107 ; CHECK: $r0 = COPY [[ANDri]] 1108 ; CHECK: BX_RET 14, $noreg, implicit $r0 1109 %0(s64) = COPY $d0 1110 %1(s64) = COPY $d1 1111 %2(s1) = G_FCMP floatpred(ugt), %0(s64), %1 1112 %3(s32) = G_ZEXT %2(s1) 1113 $r0 = COPY %3(s32) 1114 BX_RET 14, $noreg, implicit $r0 1115 ... 1116 --- 1117 name: test_fcmp_uge_s64 1118 legalized: true 1119 regBankSelected: true 1120 selected: false 1121 registers: 1122 - { id: 0, class: fprb } 1123 - { id: 1, class: fprb } 1124 - { id: 2, class: gprb } 1125 - { id: 3, class: gprb } 1126 body: | 1127 bb.0: 1128 liveins: $d0, $d1 1129 1130 ; CHECK-LABEL: name: test_fcmp_uge_s64 1131 ; CHECK: [[COPY:%[0-9]+]]:dpr = COPY $d0 1132 ; CHECK: [[COPY1:%[0-9]+]]:dpr = COPY $d1 1133 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 1134 ; CHECK: VCMPD [[COPY]], [[COPY1]], 14, $noreg, implicit-def $fpscr_nzcv 1135 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 1136 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 5, $cpsr 1137 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi]], 1, 14, $noreg, $noreg 1138 ; CHECK: $r0 = COPY [[ANDri]] 1139 ; CHECK: BX_RET 14, $noreg, implicit $r0 1140 %0(s64) = COPY $d0 1141 %1(s64) = COPY $d1 1142 %2(s1) = G_FCMP floatpred(uge), %0(s64), %1 1143 %3(s32) = G_ZEXT %2(s1) 1144 $r0 = COPY %3(s32) 1145 BX_RET 14, $noreg, implicit $r0 1146 ... 1147 --- 1148 name: test_fcmp_ult_s64 1149 legalized: true 1150 regBankSelected: true 1151 selected: false 1152 registers: 1153 - { id: 0, class: fprb } 1154 - { id: 1, class: fprb } 1155 - { id: 2, class: gprb } 1156 - { id: 3, class: gprb } 1157 body: | 1158 bb.0: 1159 liveins: $d0, $d1 1160 1161 ; CHECK-LABEL: name: test_fcmp_ult_s64 1162 ; CHECK: [[COPY:%[0-9]+]]:dpr = COPY $d0 1163 ; CHECK: [[COPY1:%[0-9]+]]:dpr = COPY $d1 1164 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 1165 ; CHECK: VCMPD [[COPY]], [[COPY1]], 14, $noreg, implicit-def $fpscr_nzcv 1166 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 1167 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 11, $cpsr 1168 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi]], 1, 14, $noreg, $noreg 1169 ; CHECK: $r0 = COPY [[ANDri]] 1170 ; CHECK: BX_RET 14, $noreg, implicit $r0 1171 %0(s64) = COPY $d0 1172 %1(s64) = COPY $d1 1173 %2(s1) = G_FCMP floatpred(ult), %0(s64), %1 1174 %3(s32) = G_ZEXT %2(s1) 1175 $r0 = COPY %3(s32) 1176 BX_RET 14, $noreg, implicit $r0 1177 ... 1178 --- 1179 name: test_fcmp_ule_s64 1180 legalized: true 1181 regBankSelected: true 1182 selected: false 1183 registers: 1184 - { id: 0, class: fprb } 1185 - { id: 1, class: fprb } 1186 - { id: 2, class: gprb } 1187 - { id: 3, class: gprb } 1188 body: | 1189 bb.0: 1190 liveins: $d0, $d1 1191 1192 ; CHECK-LABEL: name: test_fcmp_ule_s64 1193 ; CHECK: [[COPY:%[0-9]+]]:dpr = COPY $d0 1194 ; CHECK: [[COPY1:%[0-9]+]]:dpr = COPY $d1 1195 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 1196 ; CHECK: VCMPD [[COPY]], [[COPY1]], 14, $noreg, implicit-def $fpscr_nzcv 1197 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 1198 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 13, $cpsr 1199 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi]], 1, 14, $noreg, $noreg 1200 ; CHECK: $r0 = COPY [[ANDri]] 1201 ; CHECK: BX_RET 14, $noreg, implicit $r0 1202 %0(s64) = COPY $d0 1203 %1(s64) = COPY $d1 1204 %2(s1) = G_FCMP floatpred(ule), %0(s64), %1 1205 %3(s32) = G_ZEXT %2(s1) 1206 $r0 = COPY %3(s32) 1207 BX_RET 14, $noreg, implicit $r0 1208 ... 1209 --- 1210 name: test_fcmp_une_s64 1211 legalized: true 1212 regBankSelected: true 1213 selected: false 1214 registers: 1215 - { id: 0, class: fprb } 1216 - { id: 1, class: fprb } 1217 - { id: 2, class: gprb } 1218 - { id: 3, class: gprb } 1219 body: | 1220 bb.0: 1221 liveins: $d0, $d1 1222 1223 ; CHECK-LABEL: name: test_fcmp_une_s64 1224 ; CHECK: [[COPY:%[0-9]+]]:dpr = COPY $d0 1225 ; CHECK: [[COPY1:%[0-9]+]]:dpr = COPY $d1 1226 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 1227 ; CHECK: VCMPD [[COPY]], [[COPY1]], 14, $noreg, implicit-def $fpscr_nzcv 1228 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 1229 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 1, $cpsr 1230 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi]], 1, 14, $noreg, $noreg 1231 ; CHECK: $r0 = COPY [[ANDri]] 1232 ; CHECK: BX_RET 14, $noreg, implicit $r0 1233 %0(s64) = COPY $d0 1234 %1(s64) = COPY $d1 1235 %2(s1) = G_FCMP floatpred(une), %0(s64), %1 1236 %3(s32) = G_ZEXT %2(s1) 1237 $r0 = COPY %3(s32) 1238 BX_RET 14, $noreg, implicit $r0 1239 ... 1240 --- 1241 name: test_fcmp_uno_s64 1242 legalized: true 1243 regBankSelected: true 1244 selected: false 1245 registers: 1246 - { id: 0, class: fprb } 1247 - { id: 1, class: fprb } 1248 - { id: 2, class: gprb } 1249 - { id: 3, class: gprb } 1250 body: | 1251 bb.0: 1252 liveins: $d0, $d1 1253 1254 ; CHECK-LABEL: name: test_fcmp_uno_s64 1255 ; CHECK: [[COPY:%[0-9]+]]:dpr = COPY $d0 1256 ; CHECK: [[COPY1:%[0-9]+]]:dpr = COPY $d1 1257 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 1258 ; CHECK: VCMPD [[COPY]], [[COPY1]], 14, $noreg, implicit-def $fpscr_nzcv 1259 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 1260 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 6, $cpsr 1261 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi]], 1, 14, $noreg, $noreg 1262 ; CHECK: $r0 = COPY [[ANDri]] 1263 ; CHECK: BX_RET 14, $noreg, implicit $r0 1264 %0(s64) = COPY $d0 1265 %1(s64) = COPY $d1 1266 %2(s1) = G_FCMP floatpred(uno), %0(s64), %1 1267 %3(s32) = G_ZEXT %2(s1) 1268 $r0 = COPY %3(s32) 1269 BX_RET 14, $noreg, implicit $r0 1270 ... 1271 --- 1272 name: test_fcmp_one_s64 1273 legalized: true 1274 regBankSelected: true 1275 selected: false 1276 registers: 1277 - { id: 0, class: fprb } 1278 - { id: 1, class: fprb } 1279 - { id: 2, class: gprb } 1280 - { id: 3, class: gprb } 1281 body: | 1282 bb.0: 1283 liveins: $d0, $d1 1284 1285 ; CHECK-LABEL: name: test_fcmp_one_s64 1286 ; CHECK: [[COPY:%[0-9]+]]:dpr = COPY $d0 1287 ; CHECK: [[COPY1:%[0-9]+]]:dpr = COPY $d1 1288 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 1289 ; CHECK: VCMPD [[COPY]], [[COPY1]], 14, $noreg, implicit-def $fpscr_nzcv 1290 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 1291 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 12, $cpsr 1292 ; CHECK: VCMPD [[COPY]], [[COPY1]], 14, $noreg, implicit-def $fpscr_nzcv 1293 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 1294 ; CHECK: [[MOVCCi1:%[0-9]+]]:gpr = MOVCCi [[MOVCCi]], 1, 4, $cpsr 1295 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi1]], 1, 14, $noreg, $noreg 1296 ; CHECK: $r0 = COPY [[ANDri]] 1297 ; CHECK: BX_RET 14, $noreg, implicit $r0 1298 %0(s64) = COPY $d0 1299 %1(s64) = COPY $d1 1300 %2(s1) = G_FCMP floatpred(one), %0(s64), %1 1301 %3(s32) = G_ZEXT %2(s1) 1302 $r0 = COPY %3(s32) 1303 BX_RET 14, $noreg, implicit $r0 1304 ... 1305 --- 1306 name: test_fcmp_ueq_s64 1307 legalized: true 1308 regBankSelected: true 1309 selected: false 1310 registers: 1311 - { id: 0, class: fprb } 1312 - { id: 1, class: fprb } 1313 - { id: 2, class: gprb } 1314 - { id: 3, class: gprb } 1315 body: | 1316 bb.0: 1317 liveins: $d0, $d1 1318 1319 ; CHECK-LABEL: name: test_fcmp_ueq_s64 1320 ; CHECK: [[COPY:%[0-9]+]]:dpr = COPY $d0 1321 ; CHECK: [[COPY1:%[0-9]+]]:dpr = COPY $d1 1322 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14, $noreg, $noreg 1323 ; CHECK: VCMPD [[COPY]], [[COPY1]], 14, $noreg, implicit-def $fpscr_nzcv 1324 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 1325 ; CHECK: [[MOVCCi:%[0-9]+]]:gpr = MOVCCi [[MOVi]], 1, 0, $cpsr 1326 ; CHECK: VCMPD [[COPY]], [[COPY1]], 14, $noreg, implicit-def $fpscr_nzcv 1327 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 1328 ; CHECK: [[MOVCCi1:%[0-9]+]]:gpr = MOVCCi [[MOVCCi]], 1, 6, $cpsr 1329 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[MOVCCi1]], 1, 14, $noreg, $noreg 1330 ; CHECK: $r0 = COPY [[ANDri]] 1331 ; CHECK: BX_RET 14, $noreg, implicit $r0 1332 %0(s64) = COPY $d0 1333 %1(s64) = COPY $d1 1334 %2(s1) = G_FCMP floatpred(ueq), %0(s64), %1 1335 %3(s32) = G_ZEXT %2(s1) 1336 $r0 = COPY %3(s32) 1337 BX_RET 14, $noreg, implicit $r0 1338 ... 1339
