1 # RUN: llc -O0 -mtriple arm-- -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s 2 --- | 3 define void @test_mla() #0 { ret void } 4 define void @test_mla_commutative() #0 { ret void } 5 define void @test_mla_v5() #1 { ret void } 6 7 define void @test_mls() #2 { ret void } 8 define void @test_no_mls() { ret void } 9 10 define void @test_shifts_to_revsh() #0 { ret void } 11 define void @test_shifts_to_revsh_commutative() #0 { ret void } 12 define void @test_shifts_no_revsh_features() #1 { ret void } 13 define void @test_shifts_no_revsh_constants() #0 { ret void } 14 15 define void @test_bicrr() { ret void } 16 define void @test_bicrr_commutative() { ret void } 17 18 define void @test_bicri() { ret void } 19 define void @test_bicri_commutative_xor() { ret void } 20 define void @test_bicri_commutative_and() { ret void } 21 define void @test_bicri_commutative_both() { ret void } 22 23 define void @test_pkhbt() #0 { ret void } 24 define void @test_pkhbt_commutative() #0 { ret void } 25 define void @test_pkhbt_imm16_31() #0 { ret void } 26 define void @test_pkhbt_unshifted() #0 { ret void } 27 28 define void @test_pkhtb_imm16() #0 { ret void } 29 define void @test_pkhtb_imm1_15() #0 { ret void } 30 31 define void @test_movti16_0xffff() #2 { ret void } 32 33 define void @test_vnmuls() #3 { ret void } 34 define void @test_vnmuls_reassociate() #3 { ret void } 35 define void @test_vnmuld() #3 { ret void } 36 37 define void @test_vfnmas() #4 { ret void } 38 define void @test_vfnmad() #4 { ret void } 39 40 define void @test_vfmss() #4 { ret void } 41 define void @test_vfmsd() #4 { ret void } 42 43 define void @test_vfnmss() #4 { ret void } 44 45 attributes #0 = { "target-features"="+v6" } 46 attributes #1 = { "target-features"="-v6" } 47 attributes #2 = { "target-features"="+v6t2" } 48 attributes #3 = { "target-features"="+vfp2" } 49 attributes #4 = { "target-features"="+vfp4" } 50 ... 51 --- 52 name: test_mla 53 # CHECK-LABEL: name: test_mla 54 legalized: true 55 regBankSelected: true 56 selected: false 57 # CHECK: selected: true 58 registers: 59 - { id: 0, class: gprb } 60 - { id: 1, class: gprb } 61 - { id: 2, class: gprb } 62 - { id: 3, class: gprb } 63 - { id: 4, class: gprb } 64 body: | 65 bb.0: 66 liveins: $r0, $r1, $r2 67 68 %0(s32) = COPY $r0 69 %1(s32) = COPY $r1 70 %2(s32) = COPY $r2 71 ; CHECK: [[VREGX:%[0-9]+]]:gprnopc = COPY $r0 72 ; CHECK: [[VREGY:%[0-9]+]]:gprnopc = COPY $r1 73 ; CHECK: [[VREGZ:%[0-9]+]]:gprnopc = COPY $r2 74 75 %3(s32) = G_MUL %0, %1 76 %4(s32) = G_ADD %3, %2 77 ; CHECK: [[VREGR:%[0-9]+]]:gprnopc = MLA [[VREGX]], [[VREGY]], [[VREGZ]], 14, $noreg, $noreg 78 79 $r0 = COPY %4(s32) 80 ; CHECK: $r0 = COPY [[VREGR]] 81 82 BX_RET 14, $noreg, implicit $r0 83 ; CHECK: BX_RET 14, $noreg, implicit $r0 84 ... 85 --- 86 name: test_mla_commutative 87 # CHECK-LABEL: name: test_mla_commutative 88 legalized: true 89 regBankSelected: true 90 selected: false 91 # CHECK: selected: true 92 registers: 93 - { id: 0, class: gprb } 94 - { id: 1, class: gprb } 95 - { id: 2, class: gprb } 96 - { id: 3, class: gprb } 97 - { id: 4, class: gprb } 98 body: | 99 bb.0: 100 liveins: $r0, $r1, $r2 101 102 %0(s32) = COPY $r0 103 %1(s32) = COPY $r1 104 %2(s32) = COPY $r2 105 ; CHECK: [[VREGX:%[0-9]+]]:gprnopc = COPY $r0 106 ; CHECK: [[VREGY:%[0-9]+]]:gprnopc = COPY $r1 107 ; CHECK: [[VREGZ:%[0-9]+]]:gprnopc = COPY $r2 108 109 %3(s32) = G_MUL %0, %1 110 %4(s32) = G_ADD %2, %3 111 ; CHECK: [[VREGR:%[0-9]+]]:gprnopc = MLA [[VREGX]], [[VREGY]], [[VREGZ]], 14, $noreg, $noreg 112 113 $r0 = COPY %4(s32) 114 ; CHECK: $r0 = COPY [[VREGR]] 115 116 BX_RET 14, $noreg, implicit $r0 117 ; CHECK: BX_RET 14, $noreg, implicit $r0 118 ... 119 --- 120 name: test_mla_v5 121 # CHECK-LABEL: name: test_mla_v5 122 legalized: true 123 regBankSelected: true 124 selected: false 125 # CHECK: selected: true 126 registers: 127 - { id: 0, class: gprb } 128 - { id: 1, class: gprb } 129 - { id: 2, class: gprb } 130 - { id: 3, class: gprb } 131 - { id: 4, class: gprb } 132 body: | 133 bb.0: 134 liveins: $r0, $r1, $r2 135 136 %0(s32) = COPY $r0 137 %1(s32) = COPY $r1 138 %2(s32) = COPY $r2 139 ; CHECK: [[VREGX:%[0-9]+]]:gprnopc = COPY $r0 140 ; CHECK: [[VREGY:%[0-9]+]]:gprnopc = COPY $r1 141 ; CHECK: [[VREGZ:%[0-9]+]]:gprnopc = COPY $r2 142 143 %3(s32) = G_MUL %0, %1 144 %4(s32) = G_ADD %3, %2 145 ; CHECK: [[VREGR:%[0-9]+]]:gprnopc = MLAv5 [[VREGX]], [[VREGY]], [[VREGZ]], 14, $noreg, $noreg 146 147 $r0 = COPY %4(s32) 148 ; CHECK: $r0 = COPY [[VREGR]] 149 150 BX_RET 14, $noreg, implicit $r0 151 ; CHECK: BX_RET 14, $noreg, implicit $r0 152 ... 153 --- 154 name: test_mls 155 # CHECK-LABEL: name: test_mls 156 legalized: true 157 regBankSelected: true 158 selected: false 159 # CHECK: selected: true 160 registers: 161 - { id: 0, class: gprb } 162 - { id: 1, class: gprb } 163 - { id: 2, class: gprb } 164 - { id: 3, class: gprb } 165 - { id: 4, class: gprb } 166 body: | 167 bb.0: 168 liveins: $r0, $r1, $r2 169 170 %0(s32) = COPY $r0 171 %1(s32) = COPY $r1 172 %2(s32) = COPY $r2 173 ; CHECK: [[VREGX:%[0-9]+]]:gpr = COPY $r0 174 ; CHECK: [[VREGY:%[0-9]+]]:gpr = COPY $r1 175 ; CHECK: [[VREGZ:%[0-9]+]]:gpr = COPY $r2 176 177 %3(s32) = G_MUL %0, %1 178 %4(s32) = G_SUB %2, %3 179 ; CHECK: [[VREGR:%[0-9]+]]:gpr = MLS [[VREGX]], [[VREGY]], [[VREGZ]], 14, $noreg 180 181 $r0 = COPY %4(s32) 182 ; CHECK: $r0 = COPY [[VREGR]] 183 184 BX_RET 14, $noreg, implicit $r0 185 ; CHECK: BX_RET 14, $noreg, implicit $r0 186 ... 187 --- 188 name: test_no_mls 189 # CHECK-LABEL: name: test_no_mls 190 legalized: true 191 regBankSelected: true 192 selected: false 193 # CHECK: selected: true 194 registers: 195 - { id: 0, class: gprb } 196 - { id: 1, class: gprb } 197 - { id: 2, class: gprb } 198 - { id: 3, class: gprb } 199 - { id: 4, class: gprb } 200 body: | 201 bb.0: 202 liveins: $r0, $r1, $r2 203 204 %0(s32) = COPY $r0 205 %1(s32) = COPY $r1 206 %2(s32) = COPY $r2 207 ; CHECK: [[VREGX:%[0-9]+]]:gprnopc = COPY $r0 208 ; CHECK: [[VREGY:%[0-9]+]]:gprnopc = COPY $r1 209 ; CHECK: [[VREGZ:%[0-9]+]]:gpr = COPY $r2 210 211 %3(s32) = G_MUL %0, %1 212 %4(s32) = G_SUB %2, %3 213 ; CHECK: [[VREGM:%[0-9]+]]:gprnopc = MULv5 [[VREGX]], [[VREGY]], 14, $noreg, $noreg 214 ; CHECK: [[VREGR:%[0-9]+]]:gpr = SUBrr [[VREGZ]], [[VREGM]], 14, $noreg, $noreg 215 216 $r0 = COPY %4(s32) 217 ; CHECK: $r0 = COPY [[VREGR]] 218 219 BX_RET 14, $noreg, implicit $r0 220 ; CHECK: BX_RET 14, $noreg, implicit $r0 221 ... 222 --- 223 name: test_shifts_to_revsh 224 # CHECK-LABEL: name: test_shifts_to_revsh 225 legalized: true 226 regBankSelected: true 227 selected: false 228 # CHECK: selected: true 229 registers: 230 - { id: 0, class: gprb } 231 - { id: 1, class: gprb } 232 - { id: 2, class: gprb } 233 - { id: 3, class: gprb } 234 - { id: 4, class: gprb } 235 - { id: 5, class: gprb } 236 - { id: 6, class: gprb } 237 - { id: 7, class: gprb } 238 - { id: 8, class: gprb } 239 - { id: 9, class: gprb } 240 body: | 241 bb.0: 242 liveins: $r0 243 244 %0(s32) = COPY $r0 245 ; CHECK: [[VREGX:%[0-9]+]]:gpr = COPY $r0 246 247 %1(s32) = G_CONSTANT i32 24 248 %2(s32) = G_SHL %0(s32), %1(s32) 249 250 %3(s32) = G_CONSTANT i32 16 251 %4(s32) = G_ASHR %2(s32), %3(s32) 252 253 %5(s32) = G_CONSTANT i32 8 254 %6(s32) = G_LSHR %0(s32), %5(s32) 255 256 %7(s32) = G_CONSTANT 255 257 %8(s32) = G_AND %6(s32), %7(s32) 258 259 %9(s32) = G_OR %4(s32), %8(s32) 260 ; CHECK: [[VREGR:%[0-9]+]]:gpr = REVSH [[VREGX]] 261 262 $r0 = COPY %9(s32) 263 ; CHECK: $r0 = COPY [[VREGR]] 264 265 BX_RET 14, $noreg, implicit $r0 266 ; CHECK: BX_RET 14, $noreg, implicit $r0 267 ... 268 --- 269 name: test_shifts_to_revsh_commutative 270 # CHECK-LABEL: name: test_shifts_to_revsh_commutative 271 legalized: true 272 regBankSelected: true 273 selected: false 274 # CHECK: selected: true 275 registers: 276 - { id: 0, class: gprb } 277 - { id: 1, class: gprb } 278 - { id: 2, class: gprb } 279 - { id: 3, class: gprb } 280 - { id: 4, class: gprb } 281 - { id: 5, class: gprb } 282 - { id: 6, class: gprb } 283 - { id: 7, class: gprb } 284 - { id: 8, class: gprb } 285 - { id: 9, class: gprb } 286 body: | 287 bb.0: 288 liveins: $r0 289 290 %0(s32) = COPY $r0 291 ; CHECK: [[VREGX:%[0-9]+]]:gpr = COPY $r0 292 293 %1(s32) = G_CONSTANT i32 24 294 %2(s32) = G_SHL %0(s32), %1(s32) 295 296 %3(s32) = G_CONSTANT i32 16 297 %4(s32) = G_ASHR %2(s32), %3(s32) 298 299 %5(s32) = G_CONSTANT i32 8 300 %6(s32) = G_LSHR %0(s32), %5(s32) 301 302 %7(s32) = G_CONSTANT 255 303 %8(s32) = G_AND %6(s32), %7(s32) 304 305 %9(s32) = G_OR %8(s32), %4(s32) 306 ; CHECK: [[VREGR:%[0-9]+]]:gpr = REVSH [[VREGX]] 307 308 $r0 = COPY %9(s32) 309 ; CHECK: $r0 = COPY [[VREGR]] 310 311 BX_RET 14, $noreg, implicit $r0 312 ; CHECK: BX_RET 14, $noreg, implicit $r0 313 ... 314 --- 315 name: test_shifts_no_revsh_features 316 # CHECK-LABEL: name: test_shifts_no_revsh 317 legalized: true 318 regBankSelected: true 319 selected: false 320 # CHECK: selected: true 321 registers: 322 - { id: 0, class: gprb } 323 - { id: 1, class: gprb } 324 - { id: 2, class: gprb } 325 - { id: 3, class: gprb } 326 - { id: 4, class: gprb } 327 - { id: 5, class: gprb } 328 - { id: 6, class: gprb } 329 - { id: 7, class: gprb } 330 - { id: 8, class: gprb } 331 - { id: 9, class: gprb } 332 body: | 333 bb.0: 334 liveins: $r0 335 336 %0(s32) = COPY $r0 337 338 %1(s32) = G_CONSTANT i32 24 339 %2(s32) = G_SHL %0(s32), %1(s32) 340 341 %3(s32) = G_CONSTANT i32 16 342 %4(s32) = G_ASHR %2(s32), %3(s32) 343 344 %5(s32) = G_CONSTANT i32 8 345 %6(s32) = G_LSHR %0(s32), %5(s32) 346 347 %7(s32) = G_CONSTANT 255 348 %8(s32) = G_AND %6(s32), %7(s32) 349 350 %9(s32) = G_OR %4(s32), %8(s32) 351 ; We don't really care how this is folded as long as it's not into a REVSH. 352 ; CHECK-NOT: REVSH 353 354 $r0 = COPY %9(s32) 355 356 BX_RET 14, $noreg, implicit $r0 357 ... 358 --- 359 name: test_shifts_no_revsh_constants 360 # CHECK-LABEL: name: test_shifts_no_revsh_constants 361 legalized: true 362 regBankSelected: true 363 selected: false 364 # CHECK: selected: true 365 registers: 366 - { id: 0, class: gprb } 367 - { id: 1, class: gprb } 368 - { id: 2, class: gprb } 369 - { id: 3, class: gprb } 370 - { id: 4, class: gprb } 371 - { id: 5, class: gprb } 372 - { id: 6, class: gprb } 373 - { id: 7, class: gprb } 374 - { id: 8, class: gprb } 375 - { id: 9, class: gprb } 376 body: | 377 bb.0: 378 liveins: $r0 379 380 %0(s32) = COPY $r0 381 382 %1(s32) = G_CONSTANT i32 16 ; REVSH needs 24 here 383 %2(s32) = G_SHL %0(s32), %1(s32) 384 385 %3(s32) = G_CONSTANT i32 24 ; REVSH needs 16 here 386 %4(s32) = G_ASHR %2(s32), %3(s32) 387 388 %5(s32) = G_CONSTANT i32 8 389 %6(s32) = G_LSHR %0(s32), %5(s32) 390 391 %7(s32) = G_CONSTANT 255 392 %8(s32) = G_AND %6(s32), %7(s32) 393 394 %9(s32) = G_OR %4(s32), %8(s32) 395 ; We don't really care how this is folded as long as it's not into a REVSH. 396 ; CHECK-NOT: REVSH 397 398 $r0 = COPY %9(s32) 399 400 BX_RET 14, $noreg, implicit $r0 401 ... 402 --- 403 name: test_bicrr 404 # CHECK-LABEL: name: test_bicrr 405 legalized: true 406 regBankSelected: true 407 selected: false 408 # CHECK: selected: true 409 registers: 410 - { id: 0, class: gprb } 411 - { id: 1, class: gprb } 412 - { id: 2, class: gprb } 413 - { id: 3, class: gprb } 414 - { id: 4, class: gprb } 415 body: | 416 bb.0: 417 liveins: $r0, $r1 418 419 %0(s32) = COPY $r0 420 %1(s32) = COPY $r1 421 ; CHECK: [[VREGX:%[0-9]+]]:gpr = COPY $r0 422 ; CHECK: [[VREGY:%[0-9]+]]:gpr = COPY $r1 423 424 %2(s32) = G_CONSTANT i32 -1 425 %3(s32) = G_XOR %1, %2 426 %4(s32) = G_AND %0, %3 427 ; CHECK: [[VREGR:%[0-9]+]]:gpr = BICrr [[VREGX]], [[VREGY]], 14, $noreg, $noreg 428 429 $r0 = COPY %4(s32) 430 ; CHECK: $r0 = COPY [[VREGR]] 431 432 BX_RET 14, $noreg, implicit $r0 433 ; CHECK: BX_RET 14, $noreg, implicit $r0 434 ... 435 --- 436 name: test_bicrr_commutative 437 # CHECK-LABEL: name: test_bicrr_commutative 438 legalized: true 439 regBankSelected: true 440 selected: false 441 # CHECK: selected: true 442 registers: 443 - { id: 0, class: gprb } 444 - { id: 1, class: gprb } 445 - { id: 2, class: gprb } 446 - { id: 3, class: gprb } 447 - { id: 4, class: gprb } 448 body: | 449 bb.0: 450 liveins: $r0, $r1 451 452 %0(s32) = COPY $r0 453 %1(s32) = COPY $r1 454 ; CHECK: [[VREGX:%[0-9]+]]:gpr = COPY $r0 455 ; CHECK: [[VREGY:%[0-9]+]]:gpr = COPY $r1 456 457 %2(s32) = G_CONSTANT i32 -1 458 %3(s32) = G_XOR %1, %2 459 %4(s32) = G_AND %3, %0 460 ; CHECK: [[VREGR:%[0-9]+]]:gpr = BICrr [[VREGX]], [[VREGY]], 14, $noreg, $noreg 461 462 $r0 = COPY %4(s32) 463 ; CHECK: $r0 = COPY [[VREGR]] 464 465 BX_RET 14, $noreg, implicit $r0 466 ; CHECK: BX_RET 14, $noreg, implicit $r0 467 ... 468 --- 469 name: test_bicri 470 # CHECK-LABEL: name: test_bicri 471 legalized: true 472 regBankSelected: true 473 selected: false 474 # CHECK: selected: true 475 registers: 476 - { id: 0, class: gprb } 477 - { id: 1, class: gprb } 478 - { id: 2, class: gprb } 479 - { id: 3, class: gprb } 480 - { id: 4, class: gprb } 481 body: | 482 bb.0: 483 liveins: $r0 484 485 %0(s32) = COPY $r0 486 ; CHECK: [[VREGX:%[0-9]+]]:gpr = COPY $r0 487 488 ; This test and the following ones are a bit contrived, since they use a 489 ; G_XOR that can be constant-folded. They exist mostly to validate the 490 ; TableGen pattern that defines BICri. We also have a pattern for matching a 491 ; G_AND with a G_CONSTANT operand directly, which is the more common case, 492 ; but that will be covered by different tests. 493 %1(s32) = G_CONSTANT i32 192 494 495 %2(s32) = G_CONSTANT i32 -1 496 %3(s32) = G_XOR %1, %2 497 %4(s32) = G_AND %0, %3 498 ; CHECK: [[VREGR:%[0-9]+]]:gpr = BICri [[VREGX]], 192, 14, $noreg, $noreg 499 500 $r0 = COPY %4(s32) 501 ; CHECK: $r0 = COPY [[VREGR]] 502 503 BX_RET 14, $noreg, implicit $r0 504 ; CHECK: BX_RET 14, $noreg, implicit $r0 505 ... 506 --- 507 name: test_bicri_commutative_xor 508 # CHECK-LABEL: name: test_bicri_commutative_xor 509 legalized: true 510 regBankSelected: true 511 selected: false 512 # CHECK: selected: true 513 registers: 514 - { id: 0, class: gprb } 515 - { id: 1, class: gprb } 516 - { id: 2, class: gprb } 517 - { id: 3, class: gprb } 518 - { id: 4, class: gprb } 519 body: | 520 bb.0: 521 liveins: $r0 522 523 %0(s32) = COPY $r0 524 ; CHECK: [[VREGX:%[0-9]+]]:gpr = COPY $r0 525 526 %1(s32) = G_CONSTANT i32 192 527 528 %2(s32) = G_CONSTANT i32 -1 529 %3(s32) = G_XOR %2, %1 530 %4(s32) = G_AND %0, %3 531 ; CHECK: [[VREGR:%[0-9]+]]:gpr = BICri [[VREGX]], 192, 14, $noreg, $noreg 532 533 $r0 = COPY %4(s32) 534 ; CHECK: $r0 = COPY [[VREGR]] 535 536 BX_RET 14, $noreg, implicit $r0 537 ; CHECK: BX_RET 14, $noreg, implicit $r0 538 ... 539 --- 540 name: test_bicri_commutative_and 541 # CHECK-LABEL: name: test_bicri_commutative_and 542 legalized: true 543 regBankSelected: true 544 selected: false 545 # CHECK: selected: true 546 registers: 547 - { id: 0, class: gprb } 548 - { id: 1, class: gprb } 549 - { id: 2, class: gprb } 550 - { id: 3, class: gprb } 551 - { id: 4, class: gprb } 552 body: | 553 bb.0: 554 liveins: $r0 555 556 %0(s32) = COPY $r0 557 ; CHECK: [[VREGX:%[0-9]+]]:gpr = COPY $r0 558 559 %1(s32) = G_CONSTANT i32 192 560 561 %2(s32) = G_CONSTANT i32 -1 562 %3(s32) = G_XOR %1, %2 563 %4(s32) = G_AND %3, %0 564 ; CHECK: [[VREGR:%[0-9]+]]:gpr = BICri [[VREGX]], 192, 14, $noreg, $noreg 565 566 $r0 = COPY %4(s32) 567 ; CHECK: $r0 = COPY [[VREGR]] 568 569 BX_RET 14, $noreg, implicit $r0 570 ; CHECK: BX_RET 14, $noreg, implicit $r0 571 ... 572 --- 573 name: test_bicri_commutative_both 574 # CHECK-LABEL: name: test_bicri_commutative_both 575 legalized: true 576 regBankSelected: true 577 selected: false 578 # CHECK: selected: true 579 registers: 580 - { id: 0, class: gprb } 581 - { id: 1, class: gprb } 582 - { id: 2, class: gprb } 583 - { id: 3, class: gprb } 584 - { id: 4, class: gprb } 585 body: | 586 bb.0: 587 liveins: $r0 588 589 %0(s32) = COPY $r0 590 ; CHECK: [[VREGX:%[0-9]+]]:gpr = COPY $r0 591 592 %1(s32) = G_CONSTANT i32 192 593 594 %2(s32) = G_CONSTANT i32 -1 595 %3(s32) = G_XOR %2, %1 596 %4(s32) = G_AND %3, %0 597 ; CHECK: [[VREGR:%[0-9]+]]:gpr = BICri [[VREGX]], 192, 14, $noreg, $noreg 598 599 $r0 = COPY %4(s32) 600 ; CHECK: $r0 = COPY [[VREGR]] 601 602 BX_RET 14, $noreg, implicit $r0 603 ; CHECK: BX_RET 14, $noreg, implicit $r0 604 ... 605 --- 606 name: test_pkhbt 607 # CHECK-LABEL: name: test_pkhbt 608 legalized: true 609 regBankSelected: true 610 selected: false 611 # CHECK: selected: true 612 registers: 613 - { id: 0, class: gprb } 614 - { id: 1, class: gprb } 615 - { id: 2, class: gprb } 616 - { id: 3, class: gprb } 617 - { id: 4, class: gprb } 618 - { id: 5, class: gprb } 619 - { id: 6, class: gprb } 620 - { id: 7, class: gprb } 621 - { id: 8, class: gprb } 622 body: | 623 bb.0: 624 liveins: $r0, $r1 625 626 %0(s32) = COPY $r0 627 %1(s32) = COPY $r1 628 ; CHECK-DAG: [[VREGX:%[0-9]+]]:gprnopc = COPY $r0 629 ; CHECK-DAG: [[VREGY:%[0-9]+]]:gprnopc = COPY $r1 630 631 %2(s32) = G_CONSTANT i32 65535 ; 0xFFFF 632 %3(s32) = G_AND %0, %2 633 634 %4(s32) = G_CONSTANT i32 7 635 %5(s32) = G_SHL %1, %4 636 %6(s32) = G_CONSTANT i32 4294901760 ; 0xFFFF0000 637 %7(s32) = G_AND %5, %6 638 639 %8(s32) = G_OR %3, %7 640 ; CHECK: [[VREGR:%[0-9]+]]:gprnopc = PKHBT [[VREGX]], [[VREGY]], 7, 14, $noreg 641 642 $r0 = COPY %8(s32) 643 ; CHECK: $r0 = COPY [[VREGR]] 644 645 BX_RET 14, $noreg, implicit $r0 646 ; CHECK: BX_RET 14, $noreg, implicit $r0 647 ... 648 --- 649 name: test_pkhbt_commutative 650 # CHECK-LABEL: name: test_pkhbt_commutative 651 legalized: true 652 regBankSelected: true 653 selected: false 654 # CHECK: selected: true 655 registers: 656 - { id: 0, class: gprb } 657 - { id: 1, class: gprb } 658 - { id: 2, class: gprb } 659 - { id: 3, class: gprb } 660 - { id: 4, class: gprb } 661 - { id: 5, class: gprb } 662 - { id: 6, class: gprb } 663 - { id: 7, class: gprb } 664 - { id: 8, class: gprb } 665 body: | 666 bb.0: 667 liveins: $r0, $r1 668 669 %0(s32) = COPY $r0 670 %1(s32) = COPY $r1 671 ; CHECK-DAG: [[VREGX:%[0-9]+]]:gprnopc = COPY $r0 672 ; CHECK-DAG: [[VREGY:%[0-9]+]]:gprnopc = COPY $r1 673 674 %2(s32) = G_CONSTANT i32 65535 ; 0xFFFF 675 %3(s32) = G_AND %0, %2 676 677 %4(s32) = G_CONSTANT i32 7 678 %5(s32) = G_SHL %1, %4 679 %6(s32) = G_CONSTANT i32 4294901760 ; 0xFFFF0000 680 %7(s32) = G_AND %5, %6 681 682 %8(s32) = G_OR %7, %3 683 ; CHECK: [[VREGR:%[0-9]+]]:gprnopc = PKHBT [[VREGX]], [[VREGY]], 7, 14, $noreg 684 685 $r0 = COPY %8(s32) 686 ; CHECK: $r0 = COPY [[VREGR]] 687 688 BX_RET 14, $noreg, implicit $r0 689 ; CHECK: BX_RET 14, $noreg, implicit $r0 690 ... 691 --- 692 name: test_pkhbt_imm16_31 693 # CHECK-LABEL: name: test_pkhbt_imm16_31 694 legalized: true 695 regBankSelected: true 696 selected: false 697 # CHECK: selected: true 698 registers: 699 - { id: 0, class: gprb } 700 - { id: 1, class: gprb } 701 - { id: 2, class: gprb } 702 - { id: 3, class: gprb } 703 - { id: 4, class: gprb } 704 - { id: 5, class: gprb } 705 - { id: 6, class: gprb } 706 body: | 707 bb.0: 708 liveins: $r0, $r1 709 710 %0(s32) = COPY $r0 711 %1(s32) = COPY $r1 712 ; CHECK-DAG: [[VREGX:%[0-9]+]]:gprnopc = COPY $r0 713 ; CHECK-DAG: [[VREGY:%[0-9]+]]:gprnopc = COPY $r1 714 715 %2(s32) = G_CONSTANT i32 65535 ; 0xFFFF 716 %3(s32) = G_AND %0, %2 717 718 %4(s32) = G_CONSTANT i32 17 719 %5(s32) = G_SHL %1, %4 720 721 %6(s32) = G_OR %3, %5 722 ; CHECK: [[VREGR:%[0-9]+]]:gprnopc = PKHBT [[VREGX]], [[VREGY]], 17, 14, $noreg 723 724 $r0 = COPY %6(s32) 725 ; CHECK: $r0 = COPY [[VREGR]] 726 727 BX_RET 14, $noreg, implicit $r0 728 ; CHECK: BX_RET 14, $noreg, implicit $r0 729 ... 730 --- 731 name: test_pkhbt_unshifted 732 # CHECK-LABEL: name: test_pkhbt_unshifted 733 legalized: true 734 regBankSelected: true 735 selected: false 736 # CHECK: selected: true 737 registers: 738 - { id: 0, class: gprb } 739 - { id: 1, class: gprb } 740 - { id: 2, class: gprb } 741 - { id: 3, class: gprb } 742 - { id: 4, class: gprb } 743 - { id: 5, class: gprb } 744 - { id: 6, class: gprb } 745 body: | 746 bb.0: 747 liveins: $r0, $r1 748 749 %0(s32) = COPY $r0 750 %1(s32) = COPY $r1 751 ; CHECK-DAG: [[VREGX:%[0-9]+]]:gprnopc = COPY $r0 752 ; CHECK-DAG: [[VREGY:%[0-9]+]]:gprnopc = COPY $r1 753 754 %2(s32) = G_CONSTANT i32 65535 ; 0xFFFF 755 %3(s32) = G_AND %0, %2 756 757 %4(s32) = G_CONSTANT i32 4294901760 ; 0xFFFF0000 758 %5(s32) = G_AND %1, %4 759 760 %6(s32) = G_OR %3, %5 761 ; CHECK: [[VREGR:%[0-9]+]]:gprnopc = PKHBT [[VREGX]], [[VREGY]], 0, 14, $noreg 762 763 $r0 = COPY %6(s32) 764 ; CHECK: $r0 = COPY [[VREGR]] 765 766 BX_RET 14, $noreg, implicit $r0 767 ; CHECK: BX_RET 14, $noreg, implicit $r0 768 ... 769 --- 770 name: test_pkhtb_imm16 771 # CHECK-LABEL: name: test_pkhtb_imm16 772 legalized: true 773 regBankSelected: true 774 selected: false 775 # CHECK: selected: true 776 registers: 777 - { id: 0, class: gprb } 778 - { id: 1, class: gprb } 779 - { id: 2, class: gprb } 780 - { id: 3, class: gprb } 781 - { id: 4, class: gprb } 782 - { id: 5, class: gprb } 783 - { id: 6, class: gprb } 784 body: | 785 bb.0: 786 liveins: $r0, $r1 787 788 %0(s32) = COPY $r0 789 %1(s32) = COPY $r1 790 ; CHECK-DAG: [[VREGX:%[0-9]+]]:gprnopc = COPY $r0 791 ; CHECK-DAG: [[VREGY:%[0-9]+]]:gprnopc = COPY $r1 792 793 %2(s32) = G_CONSTANT i32 4294901760 ; 0xFFFF0000 794 %3(s32) = G_AND %0, %2 795 796 %4(s32) = G_CONSTANT i32 16 797 %5(s32) = G_LSHR %1, %4 798 799 %6(s32) = G_OR %3, %5 800 ; CHECK: [[VREGR:%[0-9]+]]:gprnopc = PKHTB [[VREGX]], [[VREGY]], 16, 14, $noreg 801 802 $r0 = COPY %6(s32) 803 ; CHECK: $r0 = COPY [[VREGR]] 804 805 BX_RET 14, $noreg, implicit $r0 806 ; CHECK: BX_RET 14, $noreg, implicit $r0 807 ... 808 --- 809 name: test_pkhtb_imm1_15 810 # CHECK-LABEL: name: test_pkhtb_imm1_15 811 legalized: true 812 regBankSelected: true 813 selected: false 814 # CHECK: selected: true 815 registers: 816 - { id: 0, class: gprb } 817 - { id: 1, class: gprb } 818 - { id: 2, class: gprb } 819 - { id: 3, class: gprb } 820 - { id: 4, class: gprb } 821 - { id: 5, class: gprb } 822 - { id: 6, class: gprb } 823 - { id: 7, class: gprb } 824 - { id: 8, class: gprb } 825 body: | 826 bb.0: 827 liveins: $r0, $r1 828 829 %0(s32) = COPY $r0 830 %1(s32) = COPY $r1 831 ; CHECK-DAG: [[VREGX:%[0-9]+]]:gprnopc = COPY $r0 832 ; CHECK-DAG: [[VREGY:%[0-9]+]]:gprnopc = COPY $r1 833 834 %2(s32) = G_CONSTANT i32 4294901760 ; 0xFFFF0000 835 %3(s32) = G_AND %0, %2 836 837 %4(s32) = G_CONSTANT i32 7 838 %5(s32) = G_LSHR %1, %4 839 %6(s32) = G_CONSTANT i32 65535 ; 0xFFFF 840 %7(s32) = G_AND %5, %6 841 842 %8(s32) = G_OR %3, %7 843 ; CHECK: [[VREGR:%[0-9]+]]:gprnopc = PKHTB [[VREGX]], [[VREGY]], 7, 14, $noreg 844 845 $r0 = COPY %8(s32) 846 ; CHECK: $r0 = COPY [[VREGR]] 847 848 BX_RET 14, $noreg, implicit $r0 849 ; CHECK: BX_RET 14, $noreg, implicit $r0 850 ... 851 --- 852 name: test_movti16_0xffff 853 # CHECK-LABEL: name: test_movti16_0xffff 854 legalized: true 855 regBankSelected: true 856 selected: false 857 # CHECK: selected: true 858 registers: 859 - { id: 0, class: gprb } 860 - { id: 1, class: gprb } 861 - { id: 2, class: gprb } 862 body: | 863 bb.0: 864 liveins: $r0 865 866 %0(s32) = COPY $r0 867 ; CHECK: [[VREGX:%[0-9]+]]:gpr = COPY $r0 868 869 %1(s32) = G_CONSTANT i32 4294901760 ; 0xFFFF0000 870 871 %2(s32) = G_OR %0, %1 872 ; CHECK: [[VREGR:%[0-9]+]]:gprnopc = MOVTi16 [[VREGX]], 65535, 14, $noreg 873 874 $r0 = COPY %2(s32) 875 ; CHECK: $r0 = COPY [[VREGR]] 876 877 BX_RET 14, $noreg, implicit $r0 878 ; CHECK: BX_RET 14, $noreg, implicit $r0 879 ... 880 --- 881 name: test_vnmuls 882 # CHECK-LABEL: name: test_vnmuls 883 legalized: true 884 regBankSelected: true 885 selected: false 886 # CHECK: selected: true 887 registers: 888 - { id: 0, class: fprb } 889 - { id: 1, class: fprb } 890 - { id: 2, class: fprb } 891 - { id: 3, class: fprb } 892 body: | 893 bb.0: 894 liveins: $s0, $s1 895 896 %0(s32) = COPY $s0 897 %1(s32) = COPY $s1 898 ; CHECK-DAG: [[VREGX:%[0-9]+]]:spr = COPY $s0 899 ; CHECK-DAG: [[VREGY:%[0-9]+]]:spr = COPY $s1 900 901 %2(s32) = G_FMUL %0, %1 902 %3(s32) = G_FNEG %2 903 ; CHECK: [[VREGR:%[0-9]+]]:spr = VNMULS [[VREGX]], [[VREGY]], 14, $noreg 904 905 $s0 = COPY %3(s32) 906 ; CHECK: $s0 = COPY [[VREGR]] 907 908 BX_RET 14, $noreg, implicit $s0 909 ; CHECK: BX_RET 14, $noreg, implicit $s0 910 ... 911 --- 912 name: test_vnmuls_reassociate 913 # CHECK-LABEL: name: test_vnmuls_reassociate 914 legalized: true 915 regBankSelected: true 916 selected: false 917 # CHECK: selected: true 918 registers: 919 - { id: 0, class: fprb } 920 - { id: 1, class: fprb } 921 - { id: 2, class: fprb } 922 - { id: 3, class: fprb } 923 body: | 924 bb.0: 925 liveins: $s0, $s1 926 927 %0(s32) = COPY $s0 928 %1(s32) = COPY $s1 929 ; CHECK-DAG: [[VREGX:%[0-9]+]]:spr = COPY $s0 930 ; CHECK-DAG: [[VREGY:%[0-9]+]]:spr = COPY $s1 931 932 %2(s32) = G_FNEG %0 933 %3(s32) = G_FMUL %1, %2 934 ; CHECK: [[VREGR:%[0-9]+]]:spr = VNMULS [[VREGX]], [[VREGY]], 14, $noreg 935 936 $s0 = COPY %3(s32) 937 ; CHECK: $s0 = COPY [[VREGR]] 938 939 BX_RET 14, $noreg, implicit $s0 940 ; CHECK: BX_RET 14, $noreg, implicit $s0 941 ... 942 --- 943 name: test_vnmuld 944 # CHECK-LABEL: name: test_vnmuld 945 legalized: true 946 regBankSelected: true 947 selected: false 948 # CHECK: selected: true 949 registers: 950 - { id: 0, class: fprb } 951 - { id: 1, class: fprb } 952 - { id: 2, class: fprb } 953 - { id: 3, class: fprb } 954 body: | 955 bb.0: 956 liveins: $d0, $d1 957 958 %0(s64) = COPY $d0 959 %1(s64) = COPY $d1 960 ; CHECK-DAG: [[VREGX:%[0-9]+]]:dpr = COPY $d0 961 ; CHECK-DAG: [[VREGY:%[0-9]+]]:dpr = COPY $d1 962 963 %2(s64) = G_FMUL %0, %1 964 %3(s64) = G_FNEG %2 965 ; CHECK: [[VREGR:%[0-9]+]]:dpr = VNMULD [[VREGX]], [[VREGY]], 14, $noreg 966 967 $d0 = COPY %3(s64) 968 ; CHECK: $d0 = COPY [[VREGR]] 969 970 BX_RET 14, $noreg, implicit $d0 971 ; CHECK: BX_RET 14, $noreg, implicit $d0 972 ... 973 --- 974 name: test_vfnmas 975 # CHECK-LABEL: name: test_vfnmas 976 legalized: true 977 regBankSelected: true 978 selected: false 979 # CHECK: selected: true 980 registers: 981 - { id: 0, class: fprb } 982 - { id: 1, class: fprb } 983 - { id: 2, class: fprb } 984 - { id: 3, class: fprb } 985 - { id: 4, class: fprb } 986 body: | 987 bb.0: 988 liveins: $s0, $s1, $s2 989 990 %0(s32) = COPY $s0 991 %1(s32) = COPY $s1 992 %2(s32) = COPY $s2 993 ; CHECK-DAG: [[VREGX:%[0-9]+]]:spr = COPY $s0 994 ; CHECK-DAG: [[VREGY:%[0-9]+]]:spr = COPY $s1 995 ; CHECK-DAG: [[VREGZ:%[0-9]+]]:spr = COPY $s2 996 997 %3(s32) = G_FMA %0, %1, %2 998 %4(s32) = G_FNEG %3 999 ; CHECK: [[VREGR:%[0-9]+]]:spr = VFNMAS [[VREGZ]], [[VREGX]], [[VREGY]], 14, $noreg 1000 1001 $s0 = COPY %4(s32) 1002 ; CHECK: $s0 = COPY [[VREGR]] 1003 1004 BX_RET 14, $noreg, implicit $s0 1005 ; CHECK: BX_RET 14, $noreg, implicit $s0 1006 ... 1007 --- 1008 name: test_vfnmad 1009 # CHECK-LABEL: name: test_vfnmad 1010 legalized: true 1011 regBankSelected: true 1012 selected: false 1013 # CHECK: selected: true 1014 registers: 1015 - { id: 0, class: fprb } 1016 - { id: 1, class: fprb } 1017 - { id: 2, class: fprb } 1018 - { id: 3, class: fprb } 1019 - { id: 4, class: fprb } 1020 - { id: 5, class: fprb } 1021 body: | 1022 bb.0: 1023 liveins: $d0, $d1, $d2 1024 1025 %0(s64) = COPY $d0 1026 %1(s64) = COPY $d1 1027 %2(s64) = COPY $d2 1028 ; CHECK-DAG: [[VREGX:%[0-9]+]]:dpr = COPY $d0 1029 ; CHECK-DAG: [[VREGY:%[0-9]+]]:dpr = COPY $d1 1030 ; CHECK-DAG: [[VREGZ:%[0-9]+]]:dpr = COPY $d2 1031 1032 %3(s64) = G_FNEG %0 1033 %4(s64) = G_FNEG %2 1034 %5(s64) = G_FMA %3, %1, %4 1035 ; CHECK: [[VREGR:%[0-9]+]]:dpr = VFNMAD [[VREGZ]], [[VREGX]], [[VREGY]], 14, $noreg 1036 1037 $d0 = COPY %5(s64) 1038 ; CHECK: $d0 = COPY [[VREGR]] 1039 1040 BX_RET 14, $noreg, implicit $d0 1041 ; CHECK: BX_RET 14, $noreg, implicit $d0 1042 ... 1043 --- 1044 name: test_vfmss 1045 # CHECK-LABEL: name: test_vfmss 1046 legalized: true 1047 regBankSelected: true 1048 selected: false 1049 # CHECK: selected: true 1050 registers: 1051 - { id: 0, class: fprb } 1052 - { id: 1, class: fprb } 1053 - { id: 2, class: fprb } 1054 - { id: 3, class: fprb } 1055 - { id: 4, class: fprb } 1056 body: | 1057 bb.0: 1058 liveins: $s0, $s1, $s2 1059 1060 %0(s32) = COPY $s0 1061 %1(s32) = COPY $s1 1062 %2(s32) = COPY $s2 1063 ; CHECK-DAG: [[VREGX:%[0-9]+]]:spr = COPY $s0 1064 ; CHECK-DAG: [[VREGY:%[0-9]+]]:spr = COPY $s1 1065 ; CHECK-DAG: [[VREGZ:%[0-9]+]]:spr = COPY $s2 1066 1067 %3(s32) = G_FNEG %0 1068 %4(s32) = G_FMA %3, %1, %2 1069 ; CHECK: [[VREGR:%[0-9]+]]:spr = VFMSS [[VREGZ]], [[VREGX]], [[VREGY]], 14, $noreg 1070 1071 $s0 = COPY %4(s32) 1072 ; CHECK: $s0 = COPY [[VREGR]] 1073 1074 BX_RET 14, $noreg, implicit $s0 1075 ; CHECK: BX_RET 14, $noreg, implicit $s0 1076 ... 1077 --- 1078 name: test_vfmsd 1079 # CHECK-LABEL: name: test_vfmsd 1080 legalized: true 1081 regBankSelected: true 1082 selected: false 1083 # CHECK: selected: true 1084 registers: 1085 - { id: 0, class: fprb } 1086 - { id: 1, class: fprb } 1087 - { id: 2, class: fprb } 1088 - { id: 3, class: fprb } 1089 - { id: 4, class: fprb } 1090 body: | 1091 bb.0: 1092 liveins: $d0, $d1, $d2 1093 1094 %0(s64) = COPY $d0 1095 %1(s64) = COPY $d1 1096 %2(s64) = COPY $d2 1097 ; CHECK-DAG: [[VREGX:%[0-9]+]]:dpr = COPY $d0 1098 ; CHECK-DAG: [[VREGY:%[0-9]+]]:dpr = COPY $d1 1099 ; CHECK-DAG: [[VREGZ:%[0-9]+]]:dpr = COPY $d2 1100 1101 %3(s64) = G_FNEG %1 1102 %4(s64) = G_FMA %0, %3, %2 1103 ; CHECK: [[VREGR:%[0-9]+]]:dpr = VFMSD [[VREGZ]], [[VREGX]], [[VREGY]], 14, $noreg 1104 1105 $d0 = COPY %4(s64) 1106 ; CHECK: $d0 = COPY [[VREGR]] 1107 1108 BX_RET 14, $noreg, implicit $d0 1109 ; CHECK: BX_RET 14, $noreg, implicit $d0 1110 ... 1111 --- 1112 name: test_vfnmss 1113 # CHECK-LABEL: name: test_vfnmss 1114 legalized: true 1115 regBankSelected: true 1116 selected: false 1117 # CHECK: selected: true 1118 registers: 1119 - { id: 0, class: fprb } 1120 - { id: 1, class: fprb } 1121 - { id: 2, class: fprb } 1122 - { id: 3, class: fprb } 1123 - { id: 4, class: fprb } 1124 body: | 1125 bb.0: 1126 liveins: $s0, $s1, $s2 1127 1128 %0(s32) = COPY $s0 1129 %1(s32) = COPY $s1 1130 %2(s32) = COPY $s2 1131 ; CHECK-DAG: [[VREGX:%[0-9]+]]:spr = COPY $s0 1132 ; CHECK-DAG: [[VREGY:%[0-9]+]]:spr = COPY $s1 1133 ; CHECK-DAG: [[VREGZ:%[0-9]+]]:spr = COPY $s2 1134 1135 %3(s32) = G_FNEG %2 1136 %4(s32) = G_FMA %0, %1, %3 1137 ; CHECK: [[VREGR:%[0-9]+]]:spr = VFNMSS [[VREGZ]], [[VREGX]], [[VREGY]], 14, $noreg 1138 1139 $s0 = COPY %4(s32) 1140 ; CHECK: $s0 = COPY [[VREGR]] 1141 1142 BX_RET 14, $noreg, implicit $s0 1143 ; CHECK: BX_RET 14, $noreg, implicit $s0 1144 ... 1145
