1 # RUN: llc -mtriple arm-linux-gnueabihf -mattr=+vfp2 -float-abi=hard -run-pass=legalizer %s -o - | FileCheck %s -check-prefix CHECK -check-prefix HARD 2 # RUN: llc -mtriple arm-linux-gnueabi -mattr=+vfp2,+soft-float -float-abi=soft -run-pass=legalizer %s -o - | FileCheck %s -check-prefix CHECK -check-prefix SOFT -check-prefix SOFT-AEABI 3 # RUN: llc -mtriple arm-linux-gnu -mattr=+soft-float -float-abi=soft -run-pass=legalizer %s -o - | FileCheck %s -check-prefix CHECK -check-prefix SOFT -check-prefix SOFT-DEFAULT 4 --- | 5 define void @test_frem_float() { ret void } 6 define void @test_frem_double() { ret void } 7 8 define void @test_fpow_float() { ret void } 9 define void @test_fpow_double() { ret void } 10 11 define void @test_fadd_float() { ret void } 12 define void @test_fadd_double() { ret void } 13 14 define void @test_fsub_float() { ret void } 15 define void @test_fsub_double() { ret void } 16 17 define void @test_fmul_float() { ret void } 18 define void @test_fmul_double() { ret void } 19 20 define void @test_fdiv_float() { ret void } 21 define void @test_fdiv_double() { ret void } 22 23 define void @test_fconstant_float() { ret void } 24 define void @test_fconstant_double() { ret void } 25 26 define void @test_fneg_float() { ret void } 27 define void @test_fneg_double() { ret void } 28 29 define void @test_fpext_float_to_double() { ret void } 30 define void @test_fptrunc_double_to_float() { ret void } 31 32 define void @test_fptosi_float() { ret void } 33 define void @test_fptosi_double() { ret void } 34 define void @test_fptoui_float() { ret void } 35 define void @test_fptoui_double() { ret void } 36 37 define void @test_sitofp_float() { ret void } 38 define void @test_sitofp_double() { ret void } 39 define void @test_uitofp_float() { ret void } 40 define void @test_uitofp_double() { ret void } 41 42 define void @test_fcmp_true_s32() { ret void } 43 define void @test_fcmp_false_s32() { ret void } 44 45 define void @test_fcmp_oeq_s32() { ret void } 46 define void @test_fcmp_ogt_s32() { ret void } 47 define void @test_fcmp_oge_s32() { ret void } 48 define void @test_fcmp_olt_s32() { ret void } 49 define void @test_fcmp_ole_s32() { ret void } 50 define void @test_fcmp_ord_s32() { ret void } 51 define void @test_fcmp_ugt_s32() { ret void } 52 define void @test_fcmp_uge_s32() { ret void } 53 define void @test_fcmp_ult_s32() { ret void } 54 define void @test_fcmp_ule_s32() { ret void } 55 define void @test_fcmp_une_s32() { ret void } 56 define void @test_fcmp_uno_s32() { ret void } 57 58 define void @test_fcmp_one_s32() { ret void } 59 define void @test_fcmp_ueq_s32() { ret void } 60 61 define void @test_fcmp_true_s64() { ret void } 62 define void @test_fcmp_false_s64() { ret void } 63 64 define void @test_fcmp_oeq_s64() { ret void } 65 define void @test_fcmp_ogt_s64() { ret void } 66 define void @test_fcmp_oge_s64() { ret void } 67 define void @test_fcmp_olt_s64() { ret void } 68 define void @test_fcmp_ole_s64() { ret void } 69 define void @test_fcmp_ord_s64() { ret void } 70 define void @test_fcmp_ugt_s64() { ret void } 71 define void @test_fcmp_uge_s64() { ret void } 72 define void @test_fcmp_ult_s64() { ret void } 73 define void @test_fcmp_ule_s64() { ret void } 74 define void @test_fcmp_une_s64() { ret void } 75 define void @test_fcmp_uno_s64() { ret void } 76 77 define void @test_fcmp_one_s64() { ret void } 78 define void @test_fcmp_ueq_s64() { ret void } 79 ... 80 --- 81 name: test_frem_float 82 # CHECK-LABEL: name: test_frem_float 83 legalized: false 84 # CHECK: legalized: true 85 regBankSelected: false 86 selected: false 87 tracksRegLiveness: true 88 registers: 89 - { id: 0, class: _ } 90 - { id: 1, class: _ } 91 - { id: 2, class: _ } 92 body: | 93 bb.0: 94 liveins: $r0, $r1 95 96 ; CHECK-DAG: [[X:%[0-9]+]]:_(s32) = COPY $r0 97 ; CHECK-DAG: [[Y:%[0-9]+]]:_(s32) = COPY $r1 98 %0(s32) = COPY $r0 99 %1(s32) = COPY $r1 100 ; CHECK-NOT: G_FREM 101 ; CHECK: ADJCALLSTACKDOWN 102 ; SOFT-DAG: $r0 = COPY [[X]] 103 ; SOFT-DAG: $r1 = COPY [[Y]] 104 ; HARD-DAG: $s0 = COPY [[X]] 105 ; HARD-DAG: $s1 = COPY [[Y]] 106 ; SOFT: BL &fmodf, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 107 ; HARD: BL &fmodf, {{.*}}, implicit $s0, implicit $s1, implicit-def $s0 108 ; SOFT: [[R:%[0-9]+]]:_(s32) = COPY $r0 109 ; HARD: [[R:%[0-9]+]]:_(s32) = COPY $s0 110 ; CHECK: ADJCALLSTACKUP 111 ; CHECK-NOT: G_FREM 112 %2(s32) = G_FREM %0, %1 113 ; CHECK: $r0 = COPY [[R]] 114 $r0 = COPY %2(s32) 115 BX_RET 14, $noreg, implicit $r0 116 ... 117 --- 118 name: test_frem_double 119 # CHECK-LABEL: name: test_frem_double 120 legalized: false 121 # CHECK: legalized: true 122 regBankSelected: false 123 selected: false 124 tracksRegLiveness: true 125 registers: 126 - { id: 0, class: _ } 127 - { id: 1, class: _ } 128 - { id: 2, class: _ } 129 - { id: 3, class: _ } 130 - { id: 4, class: _ } 131 - { id: 5, class: _ } 132 - { id: 6, class: _ } 133 - { id: 7, class: _ } 134 - { id: 8, class: _ } 135 body: | 136 bb.0: 137 liveins: $r0, $r1, $r2, $r3 138 139 ; The inputs may be in the wrong order (depending on the target's 140 ; endianness), but that's orthogonal to what we're trying to test here. 141 ; For soft float, we only need to check that the first value, received 142 ; through R0-R1, ends up in R0-R1 or R1-R0, and the second value, received 143 ; through R2-R3, ends up in R2-R3 or R3-R2, when passed to fmod. 144 ; For hard float, the values need to end up in D0 and D1. 145 ; CHECK-DAG: [[X0:%[0-9]+]]:_(s32) = COPY $r0 146 ; CHECK-DAG: [[X1:%[0-9]+]]:_(s32) = COPY $r1 147 ; CHECK-DAG: [[Y0:%[0-9]+]]:_(s32) = COPY $r2 148 ; CHECK-DAG: [[Y1:%[0-9]+]]:_(s32) = COPY $r3 149 %0(s32) = COPY $r0 150 %1(s32) = COPY $r1 151 %2(s32) = COPY $r2 152 %3(s32) = COPY $r3 153 ; HARD-DAG: [[X:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[X0]] 154 ; HARD-DAG: [[Y:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[Y0]] 155 %4(s64) = G_MERGE_VALUES %0(s32), %1(s32) 156 %5(s64) = G_MERGE_VALUES %2(s32), %3(s32) 157 ; CHECK-NOT: G_FREM 158 ; CHECK: ADJCALLSTACKDOWN 159 ; SOFT-DAG: $r{{[0-1]}} = COPY [[X0]] 160 ; SOFT-DAG: $r{{[0-1]}} = COPY [[X1]] 161 ; SOFT-DAG: $r{{[2-3]}} = COPY [[Y0]] 162 ; SOFT-DAG: $r{{[2-3]}} = COPY [[Y1]] 163 ; HARD-DAG: $d0 = COPY [[X]] 164 ; HARD-DAG: $d1 = COPY [[Y]] 165 ; SOFT: BL &fmod, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0, implicit-def $r1 166 ; HARD: BL &fmod, {{.*}}, implicit $d0, implicit $d1, implicit-def $d0 167 ; CHECK: ADJCALLSTACKUP 168 ; CHECK-NOT: G_FREM 169 %6(s64) = G_FREM %4, %5 170 %7(s32), %8(s32) = G_UNMERGE_VALUES %6(s64) 171 $r0 = COPY %7(s32) 172 $r1 = COPY %8(s32) 173 BX_RET 14, $noreg, implicit $r0, implicit $r1 174 ... 175 --- 176 name: test_fpow_float 177 # CHECK-LABEL: name: test_fpow_float 178 legalized: false 179 # CHECK: legalized: true 180 regBankSelected: false 181 selected: false 182 tracksRegLiveness: true 183 registers: 184 - { id: 0, class: _ } 185 - { id: 1, class: _ } 186 - { id: 2, class: _ } 187 body: | 188 bb.0: 189 liveins: $r0, $r1 190 191 ; CHECK-DAG: [[X:%[0-9]+]]:_(s32) = COPY $r0 192 ; CHECK-DAG: [[Y:%[0-9]+]]:_(s32) = COPY $r1 193 %0(s32) = COPY $r0 194 %1(s32) = COPY $r1 195 ; CHECK-NOT: G_FPOW 196 ; CHECK: ADJCALLSTACKDOWN 197 ; SOFT-DAG: $r0 = COPY [[X]] 198 ; SOFT-DAG: $r1 = COPY [[Y]] 199 ; HARD-DAG: $s0 = COPY [[X]] 200 ; HARD-DAG: $s1 = COPY [[Y]] 201 ; SOFT: BL &powf, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 202 ; HARD: BL &powf, {{.*}}, implicit $s0, implicit $s1, implicit-def $s0 203 ; SOFT: [[R:%[0-9]+]]:_(s32) = COPY $r0 204 ; HARD: [[R:%[0-9]+]]:_(s32) = COPY $s0 205 ; CHECK: ADJCALLSTACKUP 206 ; CHECK-NOT: G_FPOW 207 %2(s32) = G_FPOW %0, %1 208 ; CHECK: $r0 = COPY [[R]] 209 $r0 = COPY %2(s32) 210 BX_RET 14, $noreg, implicit $r0 211 ... 212 --- 213 name: test_fpow_double 214 # CHECK-LABEL: name: test_fpow_double 215 legalized: false 216 # CHECK: legalized: true 217 regBankSelected: false 218 selected: false 219 tracksRegLiveness: true 220 registers: 221 - { id: 0, class: _ } 222 - { id: 1, class: _ } 223 - { id: 2, class: _ } 224 - { id: 3, class: _ } 225 - { id: 4, class: _ } 226 - { id: 5, class: _ } 227 - { id: 6, class: _ } 228 - { id: 7, class: _ } 229 - { id: 8, class: _ } 230 body: | 231 bb.0: 232 liveins: $r0, $r1, $r2, $r3 233 234 ; The inputs may be in the wrong order (depending on the target's 235 ; endianness), but that's orthogonal to what we're trying to test here. 236 ; For soft float, we only need to check that the first value, received 237 ; through R0-R1, ends up in R0-R1 or R1-R0, and the second value, received 238 ; through R2-R3, ends up in R2-R3 or R3-R2, when passed to pow. 239 ; For hard float, the values need to end up in D0 and D1. 240 ; CHECK-DAG: [[X0:%[0-9]+]]:_(s32) = COPY $r0 241 ; CHECK-DAG: [[X1:%[0-9]+]]:_(s32) = COPY $r1 242 ; CHECK-DAG: [[Y0:%[0-9]+]]:_(s32) = COPY $r2 243 ; CHECK-DAG: [[Y1:%[0-9]+]]:_(s32) = COPY $r3 244 %0(s32) = COPY $r0 245 %1(s32) = COPY $r1 246 %2(s32) = COPY $r2 247 %3(s32) = COPY $r3 248 ; HARD-DAG: [[X:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[X0]] 249 ; HARD-DAG: [[Y:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[Y0]] 250 %4(s64) = G_MERGE_VALUES %0(s32), %1(s32) 251 %5(s64) = G_MERGE_VALUES %2(s32), %3(s32) 252 ; CHECK-NOT: G_FPOW 253 ; CHECK: ADJCALLSTACKDOWN 254 ; SOFT-DAG: $r{{[0-1]}} = COPY [[X0]] 255 ; SOFT-DAG: $r{{[0-1]}} = COPY [[X1]] 256 ; SOFT-DAG: $r{{[2-3]}} = COPY [[Y0]] 257 ; SOFT-DAG: $r{{[2-3]}} = COPY [[Y1]] 258 ; HARD-DAG: $d0 = COPY [[X]] 259 ; HARD-DAG: $d1 = COPY [[Y]] 260 ; SOFT: BL &pow, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0, implicit-def $r1 261 ; HARD: BL &pow, {{.*}}, implicit $d0, implicit $d1, implicit-def $d0 262 ; CHECK: ADJCALLSTACKUP 263 ; CHECK-NOT: G_FPOW 264 %6(s64) = G_FPOW %4, %5 265 %7(s32), %8(s32) = G_UNMERGE_VALUES %6(s64) 266 $r0 = COPY %7(s32) 267 $r1 = COPY %8(s32) 268 BX_RET 14, $noreg, implicit $r0, implicit $r1 269 ... 270 --- 271 name: test_fadd_float 272 # CHECK-LABEL: name: test_fadd_float 273 legalized: false 274 # CHECK: legalized: true 275 regBankSelected: false 276 selected: false 277 tracksRegLiveness: true 278 registers: 279 - { id: 0, class: _ } 280 - { id: 1, class: _ } 281 - { id: 2, class: _ } 282 body: | 283 bb.0: 284 liveins: $r0, $r1 285 286 ; CHECK-DAG: [[X:%[0-9]+]]:_(s32) = COPY $r0 287 ; CHECK-DAG: [[Y:%[0-9]+]]:_(s32) = COPY $r1 288 %0(s32) = COPY $r0 289 %1(s32) = COPY $r1 290 ; HARD: [[R:%[0-9]+]]:_(s32) = G_FADD [[X]], [[Y]] 291 ; SOFT-NOT: G_FADD 292 ; SOFT: ADJCALLSTACKDOWN 293 ; SOFT-DAG: $r0 = COPY [[X]] 294 ; SOFT-DAG: $r1 = COPY [[Y]] 295 ; SOFT-AEABI: BL &__aeabi_fadd, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 296 ; SOFT-DEFAULT: BL &__addsf3, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 297 ; SOFT: [[R:%[0-9]+]]:_(s32) = COPY $r0 298 ; SOFT: ADJCALLSTACKUP 299 ; SOFT-NOT: G_FADD 300 %2(s32) = G_FADD %0, %1 301 ; CHECK: $r0 = COPY [[R]] 302 $r0 = COPY %2(s32) 303 BX_RET 14, $noreg, implicit $r0 304 ... 305 --- 306 name: test_fadd_double 307 # CHECK-LABEL: name: test_fadd_double 308 legalized: false 309 # CHECK: legalized: true 310 regBankSelected: false 311 selected: false 312 tracksRegLiveness: true 313 registers: 314 - { id: 0, class: _ } 315 - { id: 1, class: _ } 316 - { id: 2, class: _ } 317 - { id: 3, class: _ } 318 - { id: 4, class: _ } 319 - { id: 5, class: _ } 320 - { id: 6, class: _ } 321 - { id: 7, class: _ } 322 - { id: 8, class: _ } 323 body: | 324 bb.0: 325 liveins: $r0, $r1, $r2, $r3 326 327 ; CHECK-DAG: [[X0:%[0-9]+]]:_(s32) = COPY $r0 328 ; CHECK-DAG: [[X1:%[0-9]+]]:_(s32) = COPY $r1 329 ; CHECK-DAG: [[Y0:%[0-9]+]]:_(s32) = COPY $r2 330 ; CHECK-DAG: [[Y1:%[0-9]+]]:_(s32) = COPY $r3 331 %0(s32) = COPY $r0 332 %1(s32) = COPY $r1 333 %2(s32) = COPY $r2 334 %3(s32) = COPY $r3 335 ; HARD-DAG: [[X:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[X0]] 336 ; HARD-DAG: [[Y:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[Y0]] 337 %4(s64) = G_MERGE_VALUES %0(s32), %1(s32) 338 %5(s64) = G_MERGE_VALUES %2(s32), %3(s32) 339 ; HARD: [[R:%[0-9]+]]:_(s64) = G_FADD [[X]], [[Y]] 340 ; SOFT-NOT: G_FADD 341 ; SOFT: ADJCALLSTACKDOWN 342 ; SOFT-DAG: $r{{[0-1]}} = COPY [[X0]] 343 ; SOFT-DAG: $r{{[0-1]}} = COPY [[X1]] 344 ; SOFT-DAG: $r{{[2-3]}} = COPY [[Y0]] 345 ; SOFT-DAG: $r{{[2-3]}} = COPY [[Y1]] 346 ; SOFT-AEABI: BL &__aeabi_dadd, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0, implicit-def $r1 347 ; SOFT-DEFAULT: BL &__adddf3, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0, implicit-def $r1 348 ; SOFT: ADJCALLSTACKUP 349 ; SOFT-NOT: G_FADD 350 %6(s64) = G_FADD %4, %5 351 ; HARD-DAG: G_UNMERGE_VALUES [[R]](s64) 352 %7(s32),%8(s32) = G_UNMERGE_VALUES %6(s64) 353 $r0 = COPY %7(s32) 354 $r1 = COPY %8(s32) 355 BX_RET 14, $noreg, implicit $r0, implicit $r1 356 ... 357 --- 358 name: test_fsub_float 359 # CHECK-LABEL: name: test_fsub_float 360 legalized: false 361 # CHECK: legalized: true 362 regBankSelected: false 363 selected: false 364 tracksRegLiveness: true 365 registers: 366 - { id: 0, class: _ } 367 - { id: 1, class: _ } 368 - { id: 2, class: _ } 369 body: | 370 bb.0: 371 liveins: $r0, $r1 372 373 ; CHECK-DAG: [[X:%[0-9]+]]:_(s32) = COPY $r0 374 ; CHECK-DAG: [[Y:%[0-9]+]]:_(s32) = COPY $r1 375 %0(s32) = COPY $r0 376 %1(s32) = COPY $r1 377 ; HARD: [[R:%[0-9]+]]:_(s32) = G_FSUB [[X]], [[Y]] 378 ; SOFT-NOT: G_FSUB 379 ; SOFT: ADJCALLSTACKDOWN 380 ; SOFT-DAG: $r0 = COPY [[X]] 381 ; SOFT-DAG: $r1 = COPY [[Y]] 382 ; SOFT-AEABI: BL &__aeabi_fsub, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 383 ; SOFT-DEFAULT: BL &__subsf3, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 384 ; SOFT: [[R:%[0-9]+]]:_(s32) = COPY $r0 385 ; SOFT: ADJCALLSTACKUP 386 ; SOFT-NOT: G_FSUB 387 %2(s32) = G_FSUB %0, %1 388 ; CHECK: $r0 = COPY [[R]] 389 $r0 = COPY %2(s32) 390 BX_RET 14, $noreg, implicit $r0 391 ... 392 --- 393 name: test_fsub_double 394 # CHECK-LABEL: name: test_fsub_double 395 legalized: false 396 # CHECK: legalized: true 397 regBankSelected: false 398 selected: false 399 tracksRegLiveness: true 400 registers: 401 - { id: 0, class: _ } 402 - { id: 1, class: _ } 403 - { id: 2, class: _ } 404 - { id: 3, class: _ } 405 - { id: 4, class: _ } 406 - { id: 5, class: _ } 407 - { id: 6, class: _ } 408 - { id: 7, class: _ } 409 - { id: 8, class: _ } 410 body: | 411 bb.0: 412 liveins: $r0, $r1, $r2, $r3 413 414 ; CHECK-DAG: [[X0:%[0-9]+]]:_(s32) = COPY $r0 415 ; CHECK-DAG: [[X1:%[0-9]+]]:_(s32) = COPY $r1 416 ; CHECK-DAG: [[Y0:%[0-9]+]]:_(s32) = COPY $r2 417 ; CHECK-DAG: [[Y1:%[0-9]+]]:_(s32) = COPY $r3 418 %0(s32) = COPY $r0 419 %1(s32) = COPY $r1 420 %2(s32) = COPY $r2 421 %3(s32) = COPY $r3 422 ; HARD-DAG: [[X:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[X0]] 423 ; HARD-DAG: [[Y:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[Y0]] 424 %4(s64) = G_MERGE_VALUES %0(s32), %1(s32) 425 %5(s64) = G_MERGE_VALUES %2(s32), %3(s32) 426 ; HARD: [[R:%[0-9]+]]:_(s64) = G_FSUB [[X]], [[Y]] 427 ; SOFT-NOT: G_FSUB 428 ; SOFT: ADJCALLSTACKDOWN 429 ; SOFT-DAG: $r{{[0-1]}} = COPY [[X0]] 430 ; SOFT-DAG: $r{{[0-1]}} = COPY [[X1]] 431 ; SOFT-DAG: $r{{[2-3]}} = COPY [[Y0]] 432 ; SOFT-DAG: $r{{[2-3]}} = COPY [[Y1]] 433 ; SOFT-AEABI: BL &__aeabi_dsub, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0, implicit-def $r1 434 ; SOFT-DEFAULT: BL &__subdf3, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0, implicit-def $r1 435 ; SOFT: ADJCALLSTACKUP 436 ; SOFT-NOT: G_FSUB 437 %6(s64) = G_FSUB %4, %5 438 ; HARD-DAG: G_UNMERGE_VALUES [[R]](s64) 439 %7(s32),%8(s32) = G_UNMERGE_VALUES %6(s64) 440 $r0 = COPY %7(s32) 441 $r1 = COPY %8(s32) 442 BX_RET 14, $noreg, implicit $r0, implicit $r1 443 ... 444 --- 445 name: test_fmul_float 446 # CHECK-LABEL: name: test_fmul_float 447 legalized: false 448 # CHECK: legalized: true 449 regBankSelected: false 450 selected: false 451 tracksRegLiveness: true 452 registers: 453 - { id: 0, class: _ } 454 - { id: 1, class: _ } 455 - { id: 2, class: _ } 456 body: | 457 bb.0: 458 liveins: $r0, $r1 459 460 ; CHECK-DAG: [[X:%[0-9]+]]:_(s32) = COPY $r0 461 ; CHECK-DAG: [[Y:%[0-9]+]]:_(s32) = COPY $r1 462 %0(s32) = COPY $r0 463 %1(s32) = COPY $r1 464 ; HARD: [[R:%[0-9]+]]:_(s32) = G_FMUL [[X]], [[Y]] 465 ; SOFT-NOT: G_FMUL 466 ; SOFT: ADJCALLSTACKDOWN 467 ; SOFT-DAG: $r0 = COPY [[X]] 468 ; SOFT-DAG: $r1 = COPY [[Y]] 469 ; SOFT-AEABI: BL &__aeabi_fmul, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 470 ; SOFT-DEFAULT: BL &__mulsf3, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 471 ; SOFT: [[R:%[0-9]+]]:_(s32) = COPY $r0 472 ; SOFT: ADJCALLSTACKUP 473 ; SOFT-NOT: G_FMUL 474 %2(s32) = G_FMUL %0, %1 475 ; CHECK: $r0 = COPY [[R]] 476 $r0 = COPY %2(s32) 477 BX_RET 14, $noreg, implicit $r0 478 ... 479 --- 480 name: test_fmul_double 481 # CHECK-LABEL: name: test_fmul_double 482 legalized: false 483 # CHECK: legalized: true 484 regBankSelected: false 485 selected: false 486 tracksRegLiveness: true 487 registers: 488 - { id: 0, class: _ } 489 - { id: 1, class: _ } 490 - { id: 2, class: _ } 491 - { id: 3, class: _ } 492 - { id: 4, class: _ } 493 - { id: 5, class: _ } 494 - { id: 6, class: _ } 495 - { id: 7, class: _ } 496 - { id: 8, class: _ } 497 body: | 498 bb.0: 499 liveins: $r0, $r1, $r2, $r3 500 501 ; CHECK-DAG: [[X0:%[0-9]+]]:_(s32) = COPY $r0 502 ; CHECK-DAG: [[X1:%[0-9]+]]:_(s32) = COPY $r1 503 ; CHECK-DAG: [[Y0:%[0-9]+]]:_(s32) = COPY $r2 504 ; CHECK-DAG: [[Y1:%[0-9]+]]:_(s32) = COPY $r3 505 %0(s32) = COPY $r0 506 %1(s32) = COPY $r1 507 %2(s32) = COPY $r2 508 %3(s32) = COPY $r3 509 ; HARD-DAG: [[X:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[X0]] 510 ; HARD-DAG: [[Y:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[Y0]] 511 %4(s64) = G_MERGE_VALUES %0(s32), %1(s32) 512 %5(s64) = G_MERGE_VALUES %2(s32), %3(s32) 513 ; HARD: [[R:%[0-9]+]]:_(s64) = G_FMUL [[X]], [[Y]] 514 ; SOFT-NOT: G_FMUL 515 ; SOFT: ADJCALLSTACKDOWN 516 ; SOFT-DAG: $r{{[0-1]}} = COPY [[X0]] 517 ; SOFT-DAG: $r{{[0-1]}} = COPY [[X1]] 518 ; SOFT-DAG: $r{{[2-3]}} = COPY [[Y0]] 519 ; SOFT-DAG: $r{{[2-3]}} = COPY [[Y1]] 520 ; SOFT-AEABI: BL &__aeabi_dmul, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0, implicit-def $r1 521 ; SOFT-DEFAULT: BL &__muldf3, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0, implicit-def $r1 522 ; SOFT: ADJCALLSTACKUP 523 ; SOFT-NOT: G_FMUL 524 %6(s64) = G_FMUL %4, %5 525 ; HARD-DAG: G_UNMERGE_VALUES [[R]](s64) 526 %7(s32),%8(s32) = G_UNMERGE_VALUES %6(s64) 527 $r0 = COPY %7(s32) 528 $r1 = COPY %8(s32) 529 BX_RET 14, $noreg, implicit $r0, implicit $r1 530 ... 531 --- 532 name: test_fdiv_float 533 # CHECK-LABEL: name: test_fdiv_float 534 legalized: false 535 # CHECK: legalized: true 536 regBankSelected: false 537 selected: false 538 tracksRegLiveness: true 539 registers: 540 - { id: 0, class: _ } 541 - { id: 1, class: _ } 542 - { id: 2, class: _ } 543 body: | 544 bb.0: 545 liveins: $r0, $r1 546 547 ; CHECK-DAG: [[X:%[0-9]+]]:_(s32) = COPY $r0 548 ; CHECK-DAG: [[Y:%[0-9]+]]:_(s32) = COPY $r1 549 %0(s32) = COPY $r0 550 %1(s32) = COPY $r1 551 ; HARD: [[R:%[0-9]+]]:_(s32) = G_FDIV [[X]], [[Y]] 552 ; SOFT-NOT: G_FDIV 553 ; SOFT: ADJCALLSTACKDOWN 554 ; SOFT-DAG: $r0 = COPY [[X]] 555 ; SOFT-DAG: $r1 = COPY [[Y]] 556 ; SOFT-AEABI: BL &__aeabi_fdiv, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 557 ; SOFT-DEFAULT: BL &__divsf3, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 558 ; SOFT: [[R:%[0-9]+]]:_(s32) = COPY $r0 559 ; SOFT: ADJCALLSTACKUP 560 ; SOFT-NOT: G_FDIV 561 %2(s32) = G_FDIV %0, %1 562 ; CHECK: $r0 = COPY [[R]] 563 $r0 = COPY %2(s32) 564 BX_RET 14, $noreg, implicit $r0 565 ... 566 --- 567 name: test_fdiv_double 568 # CHECK-LABEL: name: test_fdiv_double 569 legalized: false 570 # CHECK: legalized: true 571 regBankSelected: false 572 selected: false 573 tracksRegLiveness: true 574 registers: 575 - { id: 0, class: _ } 576 - { id: 1, class: _ } 577 - { id: 2, class: _ } 578 - { id: 3, class: _ } 579 - { id: 4, class: _ } 580 - { id: 5, class: _ } 581 - { id: 6, class: _ } 582 - { id: 7, class: _ } 583 - { id: 8, class: _ } 584 body: | 585 bb.0: 586 liveins: $r0, $r1, $r2, $r3 587 588 ; CHECK-DAG: [[X0:%[0-9]+]]:_(s32) = COPY $r0 589 ; CHECK-DAG: [[X1:%[0-9]+]]:_(s32) = COPY $r1 590 ; CHECK-DAG: [[Y0:%[0-9]+]]:_(s32) = COPY $r2 591 ; CHECK-DAG: [[Y1:%[0-9]+]]:_(s32) = COPY $r3 592 %0(s32) = COPY $r0 593 %1(s32) = COPY $r1 594 %2(s32) = COPY $r2 595 %3(s32) = COPY $r3 596 ; HARD-DAG: [[X:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[X0]] 597 ; HARD-DAG: [[Y:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[Y0]] 598 %4(s64) = G_MERGE_VALUES %0(s32), %1(s32) 599 %5(s64) = G_MERGE_VALUES %2(s32), %3(s32) 600 ; HARD: [[R:%[0-9]+]]:_(s64) = G_FDIV [[X]], [[Y]] 601 ; SOFT-NOT: G_FDIV 602 ; SOFT: ADJCALLSTACKDOWN 603 ; SOFT-DAG: $r{{[0-1]}} = COPY [[X0]] 604 ; SOFT-DAG: $r{{[0-1]}} = COPY [[X1]] 605 ; SOFT-DAG: $r{{[2-3]}} = COPY [[Y0]] 606 ; SOFT-DAG: $r{{[2-3]}} = COPY [[Y1]] 607 ; SOFT-AEABI: BL &__aeabi_ddiv, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0, implicit-def $r1 608 ; SOFT-DEFAULT: BL &__divdf3, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0, implicit-def $r1 609 ; SOFT: ADJCALLSTACKUP 610 ; SOFT-NOT: G_FDIV 611 %6(s64) = G_FDIV %4, %5 612 ; HARD-DAG: G_UNMERGE_VALUES [[R]](s64) 613 %7(s32),%8(s32) = G_UNMERGE_VALUES %6(s64) 614 $r0 = COPY %7(s32) 615 $r1 = COPY %8(s32) 616 BX_RET 14, $noreg, implicit $r0, implicit $r1 617 ... 618 --- 619 name: test_fconstant_float 620 # CHECK-LABEL: name: test_fconstant_float 621 legalized: false 622 # CHECK: legalized: true 623 regBankSelected: false 624 selected: false 625 tracksRegLiveness: true 626 registers: 627 - { id: 0, class: _ } 628 body: | 629 bb.0: 630 liveins: 631 632 ; HARD: [[R:%[0-9]+]]:_(s32) = G_FCONSTANT float -1.25 633 ; SOFT-NOT: G_FCONSTANT 634 ; SOFT: [[R:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1080033280 635 ; SOFT-NOT: G_FCONSTANT 636 %0(s32) = G_FCONSTANT float -1.25 637 ; CHECK: $r0 = COPY [[R]] 638 $r0 = COPY %0(s32) 639 BX_RET 14, $noreg, implicit $r0 640 ... 641 --- 642 name: test_fconstant_double 643 # CHECK-LABEL: name: test_fconstant_double 644 legalized: false 645 # CHECK: legalized: true 646 regBankSelected: false 647 selected: false 648 tracksRegLiveness: true 649 registers: 650 - { id: 0, class: _ } 651 - { id: 1, class: _ } 652 - { id: 2, class: _ } 653 body: | 654 bb.0: 655 liveins: 656 657 ; HARD: [[R:%[0-9]+]]:_(s64) = G_FCONSTANT double -2.4 658 ; SOFT-NOT: G_FCONSTANT 659 ; SOFT-DAG: [[HI:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1073532109 660 ; SOFT-DAG: [[LO:%[0-9]+]]:_(s32) = G_CONSTANT i32 858993459 661 ; SOFT-NOT: G_FCONSTANT 662 %0(s64) = G_FCONSTANT double -2.4 663 ; HARD-DAG: G_UNMERGE_VALUES [[R]](s64) 664 ; SOFT-DAG: $r0 = COPY [[HI]] 665 ; SOFT-DAG: $r1 = COPY [[LO]] 666 %1(s32),%2(s32) = G_UNMERGE_VALUES %0(s64) 667 $r0 = COPY %2(s32) 668 $r1 = COPY %1(s32) 669 BX_RET 14, $noreg, implicit $r0, implicit $r1 670 ... 671 --- 672 name: test_fneg_float 673 # CHECK-LABEL: name: test_fneg_float 674 legalized: false 675 # CHECK: legalized: true 676 regBankSelected: false 677 selected: false 678 tracksRegLiveness: true 679 registers: 680 - { id: 0, class: _ } 681 - { id: 1, class: _ } 682 body: | 683 bb.0: 684 liveins: $r0 685 686 ; CHECK-DAG: [[X:%[0-9]+]]:_(s32) = COPY $r0 687 %0(s32) = COPY $r0 688 ; HARD: [[R:%[0-9]+]]:_(s32) = G_FNEG [[X]] 689 ; SOFT-NOT: G_FNEG 690 ; SOFT-DAG: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648 691 ; SOFT: ADJCALLSTACKDOWN 692 ; SOFT-DAG: $r0 = COPY [[ZERO]] 693 ; SOFT-DAG: $r1 = COPY [[X]] 694 ; SOFT-AEABI: BL &__aeabi_fsub, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 695 ; SOFT-DEFAULT: BL &__subsf3, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 696 ; SOFT: [[R:%[0-9]+]]:_(s32) = COPY $r0 697 ; SOFT: ADJCALLSTACKUP 698 ; SOFT-NOT: G_FNEG 699 %1(s32) = G_FNEG %0 700 ; CHECK: $r0 = COPY [[R]] 701 $r0 = COPY %1(s32) 702 BX_RET 14, $noreg, implicit $r0 703 ... 704 --- 705 name: test_fneg_double 706 # CHECK-LABEL: name: test_fneg_double 707 legalized: false 708 # CHECK: legalized: true 709 regBankSelected: false 710 selected: false 711 tracksRegLiveness: true 712 registers: 713 - { id: 0, class: _ } 714 - { id: 1, class: _ } 715 - { id: 2, class: _ } 716 - { id: 3, class: _ } 717 - { id: 4, class: _ } 718 - { id: 5, class: _ } 719 body: | 720 bb.0: 721 liveins: $r0, $r1 722 723 ; CHECK-DAG: [[X0:%[0-9]+]]:_(s32) = COPY $r0 724 ; CHECK-DAG: [[X1:%[0-9]+]]:_(s32) = COPY $r1 725 %0(s32) = COPY $r0 726 %1(s32) = COPY $r1 727 ; HARD-DAG: [[X:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[X0]] 728 %2(s64) = G_MERGE_VALUES %0(s32), %1(s32) 729 ; HARD: [[R:%[0-9]+]]:_(s64) = G_FNEG [[X]] 730 ; SOFT-NOT: G_FNEG 731 ; SOFT-DAG: [[NEGATIVE_ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648 732 ; SOFT-DAG: [[POSITIVE_ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 733 ; SOFT: ADJCALLSTACKDOWN 734 ; SOFT-DAG: $r{{[0-1]}} = COPY [[NEGATIVE_ZERO]] 735 ; SOFT-DAG: $r{{[0-1]}} = COPY [[POSITIVE_ZERO]] 736 ; SOFT-DAG: $r{{[2-3]}} = COPY [[X0]] 737 ; SOFT-DAG: $r{{[2-3]}} = COPY [[X1]] 738 ; SOFT-AEABI: BL &__aeabi_dsub, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0, implicit-def $r1 739 ; SOFT-DEFAULT: BL &__subdf3, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0, implicit-def $r1 740 ; SOFT: ADJCALLSTACKUP 741 ; SOFT-NOT: G_FNEG 742 %3(s64) = G_FNEG %2 743 ; HARD-DAG: G_UNMERGE_VALUES [[R]](s64) 744 %4(s32),%5(s32) = G_UNMERGE_VALUES %3(s64) 745 $r0 = COPY %4(s32) 746 $r1 = COPY %5(s32) 747 BX_RET 14, $noreg, implicit $r0, implicit $r1 748 ... 749 --- 750 name: test_fpext_float_to_double 751 # CHECK-LABEL: name: test_fpext_float_to_double 752 legalized: false 753 # CHECK: legalized: true 754 regBankSelected: false 755 selected: false 756 tracksRegLiveness: true 757 registers: 758 - { id: 0, class: _ } 759 - { id: 1, class: _ } 760 - { id: 2, class: _ } 761 - { id: 3, class: _ } 762 body: | 763 bb.0: 764 liveins: $r0 765 766 ; CHECK-DAG: [[X:%[0-9]+]]:_(s32) = COPY $r0 767 %0(s32) = COPY $r0 768 ; HARD: [[R:%[0-9]+]]:_(s64) = G_FPEXT [[X]] 769 ; SOFT-NOT: G_FPEXT 770 ; SOFT: ADJCALLSTACKDOWN 771 ; SOFT-DAG: $r0 = COPY [[X]] 772 ; SOFT-AEABI: BL &__aeabi_f2d, {{.*}}, implicit $r0, implicit-def $r0, implicit-def $r1 773 ; SOFT-DEFAULT: BL &__extendsfdf2, {{.*}}, implicit $r0, implicit-def $r0, implicit-def $r1 774 ; SOFT: [[R0:%[0-9]+]]:_(s32) = COPY $r0 775 ; SOFT: [[R1:%[0-9]+]]:_(s32) = COPY $r1 776 ; SOFT: ADJCALLSTACKUP 777 ; SOFT-NOT: G_FPEXT 778 %1(s64) = G_FPEXT %0(s32) 779 ; HARD: G_UNMERGE_VALUES [[R]](s64) 780 ; SOFT-DAG: $r{{[0-1]}} = COPY [[R0]] 781 ; SOFT-DAG: $r{{[0-1]}} = COPY [[R1]] 782 %2(s32), %3(s32) = G_UNMERGE_VALUES %1(s64) 783 $r0 = COPY %2(s32) 784 $r1 = COPY %3(s32) 785 BX_RET 14, $noreg, implicit $r0, implicit $r1 786 ... 787 --- 788 name: test_fptrunc_double_to_float 789 # CHECK-LABEL: name: test_fptrunc_double_to_float 790 legalized: false 791 # CHECK: legalized: true 792 regBankSelected: false 793 selected: false 794 tracksRegLiveness: true 795 registers: 796 - { id: 0, class: _ } 797 - { id: 1, class: _ } 798 - { id: 2, class: _ } 799 - { id: 3, class: _ } 800 body: | 801 bb.0: 802 liveins: $r0, $r1 803 804 ; CHECK-DAG: [[X0:%[0-9]+]]:_(s32) = COPY $r0 805 ; CHECK-DAG: [[X1:%[0-9]+]]:_(s32) = COPY $r1 806 ; HARD: [[X:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[X0]] 807 %0(s32) = COPY $r0 808 %1(s32) = COPY $r1 809 %2(s64) = G_MERGE_VALUES %0(s32), %1(s32) 810 ; HARD: [[R:%[0-9]+]]:_(s32) = G_FPTRUNC [[X]] 811 ; SOFT-NOT: G_FPTRUNC 812 ; SOFT: ADJCALLSTACKDOWN 813 ; SOFT-DAG: $r0 = COPY [[X0]] 814 ; SOFT-DAG: $r1 = COPY [[X1]] 815 ; SOFT-AEABI: BL &__aeabi_d2f, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 816 ; SOFT-DEFAULT: BL &__truncdfsf2, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 817 ; SOFT: [[R:%[0-9]+]]:_(s32) = COPY $r0 818 ; SOFT: ADJCALLSTACKUP 819 ; SOFT-NOT: G_FPTRUNC 820 %3(s32) = G_FPTRUNC %2(s64) 821 ; CHECK: $r0 = COPY [[R]] 822 $r0 = COPY %3(s32) 823 BX_RET 14, $noreg, implicit $r0 824 --- 825 --- 826 name: test_fptosi_float 827 # CHECK-LABEL: name: test_fptosi_float 828 legalized: false 829 # CHECK: legalized: true 830 regBankSelected: false 831 selected: false 832 tracksRegLiveness: true 833 registers: 834 - { id: 0, class: _ } 835 - { id: 1, class: _ } 836 body: | 837 bb.0: 838 liveins: $r0 839 840 ; CHECK-DAG: [[X:%[0-9]+]]:_(s32) = COPY $r0 841 %0(s32) = COPY $r0 842 ; HARD: [[R:%[0-9]+]]:_(s32) = G_FPTOSI [[X]] 843 ; SOFT-NOT: G_FPTOSI 844 ; SOFT: ADJCALLSTACKDOWN 845 ; SOFT-DAG: $r0 = COPY [[X]] 846 ; SOFT-AEABI: BL &__aeabi_f2iz, {{.*}}, implicit $r0, implicit-def $r0 847 ; SOFT-DEFAULT: BL &__fixsfsi, {{.*}}, implicit $r0, implicit-def $r0 848 ; SOFT: [[R:%[0-9]+]]:_(s32) = COPY $r0 849 ; SOFT: ADJCALLSTACKUP 850 ; SOFT-NOT: G_FPTOSI 851 %1(s32) = G_FPTOSI %0(s32) 852 ; CHECK: $r0 = COPY [[R]] 853 $r0 = COPY %1(s32) 854 BX_RET 14, $noreg, implicit $r0 855 ... 856 --- 857 name: test_fptosi_double 858 # CHECK-LABEL: name: test_fptosi_double 859 legalized: false 860 # CHECK: legalized: true 861 regBankSelected: false 862 selected: false 863 tracksRegLiveness: true 864 registers: 865 - { id: 0, class: _ } 866 - { id: 1, class: _ } 867 - { id: 2, class: _ } 868 - { id: 3, class: _ } 869 body: | 870 bb.0: 871 liveins: $r0, $r1 872 873 ; CHECK-DAG: [[X0:%[0-9]+]]:_(s32) = COPY $r0 874 ; CHECK-DAG: [[X1:%[0-9]+]]:_(s32) = COPY $r1 875 %0(s32) = COPY $r0 876 %1(s32) = COPY $r1 877 ; HARD: [[X:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[X0]] 878 %2(s64) = G_MERGE_VALUES %0(s32), %1(s32) 879 ; HARD: [[R:%[0-9]+]]:_(s32) = G_FPTOSI [[X]] 880 ; SOFT-NOT: G_FPTOSI 881 ; SOFT: ADJCALLSTACKDOWN 882 ; SOFT-DAG: $r{{[0-1]}} = COPY [[X0]] 883 ; SOFT-DAG: $r{{[0-1]}} = COPY [[X1]] 884 ; SOFT-AEABI: BL &__aeabi_d2iz, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 885 ; SOFT-DEFAULT: BL &__fixdfsi, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 886 ; SOFT: [[R:%[0-9]+]]:_(s32) = COPY $r0 887 ; SOFT: ADJCALLSTACKUP 888 ; SOFT-NOT: G_FPTOSI 889 %3(s32) = G_FPTOSI %2(s64) 890 ; CHECK: $r0 = COPY [[R]](s32) 891 $r0 = COPY %3(s32) 892 BX_RET 14, $noreg, implicit $r0 893 ... 894 --- 895 name: test_fptoui_float 896 # CHECK-LABEL: name: test_fptoui_float 897 legalized: false 898 # CHECK: legalized: true 899 regBankSelected: false 900 selected: false 901 tracksRegLiveness: true 902 registers: 903 - { id: 0, class: _ } 904 - { id: 1, class: _ } 905 body: | 906 bb.0: 907 liveins: $r0 908 909 ; CHECK-DAG: [[X:%[0-9]+]]:_(s32) = COPY $r0 910 %0(s32) = COPY $r0 911 ; HARD: [[R:%[0-9]+]]:_(s32) = G_FPTOUI [[X]] 912 ; SOFT-NOT: G_FPTOUI 913 ; SOFT: ADJCALLSTACKDOWN 914 ; SOFT-DAG: $r0 = COPY [[X]] 915 ; SOFT-AEABI: BL &__aeabi_f2uiz, {{.*}}, implicit $r0, implicit-def $r0 916 ; SOFT-DEFAULT: BL &__fixunssfsi, {{.*}}, implicit $r0, implicit-def $r0 917 ; SOFT: [[R:%[0-9]+]]:_(s32) = COPY $r0 918 ; SOFT: ADJCALLSTACKUP 919 ; SOFT-NOT: G_FPTOUI 920 %1(s32) = G_FPTOUI %0(s32) 921 ; CHECK: $r0 = COPY [[R]] 922 $r0 = COPY %1(s32) 923 BX_RET 14, $noreg, implicit $r0 924 ... 925 --- 926 name: test_fptoui_double 927 # CHECK-LABEL: name: test_fptoui_double 928 legalized: false 929 # CHECK: legalized: true 930 regBankSelected: false 931 selected: false 932 tracksRegLiveness: true 933 registers: 934 - { id: 0, class: _ } 935 - { id: 1, class: _ } 936 - { id: 2, class: _ } 937 - { id: 3, class: _ } 938 body: | 939 bb.0: 940 liveins: $r0, $r1 941 942 ; CHECK-DAG: [[X0:%[0-9]+]]:_(s32) = COPY $r0 943 ; CHECK-DAG: [[X1:%[0-9]+]]:_(s32) = COPY $r1 944 %0(s32) = COPY $r0 945 %1(s32) = COPY $r1 946 ; HARD: [[X:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[X0]] 947 %2(s64) = G_MERGE_VALUES %0(s32), %1(s32) 948 ; HARD: [[R:%[0-9]+]]:_(s32) = G_FPTOUI [[X]] 949 ; SOFT-NOT: G_FPTOUI 950 ; SOFT: ADJCALLSTACKDOWN 951 ; SOFT-DAG: $r{{[0-1]}} = COPY [[X0]] 952 ; SOFT-DAG: $r{{[0-1]}} = COPY [[X1]] 953 ; SOFT-AEABI: BL &__aeabi_d2uiz, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 954 ; SOFT-DEFAULT: BL &__fixunsdfsi, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 955 ; SOFT: [[R:%[0-9]+]]:_(s32) = COPY $r0 956 ; SOFT: ADJCALLSTACKUP 957 ; SOFT-NOT: G_FPTOUI 958 %3(s32) = G_FPTOUI %2(s64) 959 ; CHECK: $r0 = COPY [[R]](s32) 960 $r0 = COPY %3(s32) 961 BX_RET 14, $noreg, implicit $r0 962 ... 963 --- 964 name: test_sitofp_float 965 # CHECK-LABEL: name: test_sitofp_float 966 legalized: false 967 # CHECK: legalized: true 968 regBankSelected: false 969 selected: false 970 tracksRegLiveness: true 971 registers: 972 - { id: 0, class: _ } 973 - { id: 1, class: _ } 974 body: | 975 bb.0: 976 liveins: $r0 977 978 ; CHECK-DAG: [[X:%[0-9]+]]:_(s32) = COPY $r0 979 %0(s32) = COPY $r0 980 ; HARD: [[R:%[0-9]+]]:_(s32) = G_SITOFP [[X]] 981 ; SOFT-NOT: G_SITOFP 982 ; SOFT: ADJCALLSTACKDOWN 983 ; SOFT-DAG: $r0 = COPY [[X]] 984 ; SOFT-AEABI: BL &__aeabi_i2f, {{.*}}, implicit $r0, implicit-def $r0 985 ; SOFT-DEFAULT: BL &__floatsisf, {{.*}}, implicit $r0, implicit-def $r0 986 ; SOFT: [[R:%[0-9]+]]:_(s32) = COPY $r0 987 ; SOFT: ADJCALLSTACKUP 988 ; SOFT-NOT: G_SITOFP 989 %1(s32) = G_SITOFP %0(s32) 990 ; CHECK: $r0 = COPY [[R]] 991 $r0 = COPY %1(s32) 992 BX_RET 14, $noreg, implicit $r0 993 ... 994 --- 995 name: test_sitofp_double 996 # CHECK-LABEL: name: test_sitofp_double 997 legalized: false 998 # CHECK: legalized: true 999 regBankSelected: false 1000 selected: false 1001 tracksRegLiveness: true 1002 registers: 1003 - { id: 0, class: _ } 1004 - { id: 1, class: _ } 1005 - { id: 2, class: _ } 1006 - { id: 3, class: _ } 1007 body: | 1008 bb.0: 1009 liveins: $r0 1010 1011 ; CHECK: [[X:%[0-9]+]]:_(s32) = COPY $r0 1012 %0(s32) = COPY $r0 1013 ; HARD: [[R:%[0-9]+]]:_(s64) = G_SITOFP [[X]] 1014 ; SOFT-NOT: G_SITOFP 1015 ; SOFT: ADJCALLSTACKDOWN 1016 ; SOFT: $r0 = COPY [[X]] 1017 ; SOFT-AEABI: BL &__aeabi_i2d, {{.*}}, implicit $r0, implicit-def $r0, implicit-def $r1 1018 ; SOFT-DEFAULT: BL &__floatsidf, {{.*}}, implicit $r0, implicit-def $r0, implicit-def $r1 1019 ; SOFT-DAG: [[R0:%[0-9]+]]:_(s32) = COPY $r0 1020 ; SOFT-DAG: [[R1:%[0-9]+]]:_(s32) = COPY $r1 1021 ; SOFT: ADJCALLSTACKUP 1022 ; SOFT-NOT: G_SITOFP 1023 %1(s64) = G_SITOFP %0(s32) 1024 ; HARD: [[R0:%[0-9]+]]:_(s32), [[R1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[R]] 1025 %2(s32), %3(s32) = G_UNMERGE_VALUES %1(s64) 1026 ; CHECK-DAG: $r0 = COPY [[R0]](s32) 1027 ; CHECK-DAG: $r1 = COPY [[R1]](s32) 1028 $r0 = COPY %2(s32) 1029 $r1 = COPY %3(s32) 1030 BX_RET 14, $noreg, implicit $r0, implicit $r1 1031 ... 1032 --- 1033 name: test_uitofp_float 1034 # CHECK-LABEL: name: test_uitofp_float 1035 legalized: false 1036 # CHECK: legalized: true 1037 regBankSelected: false 1038 selected: false 1039 tracksRegLiveness: true 1040 registers: 1041 - { id: 0, class: _ } 1042 - { id: 1, class: _ } 1043 body: | 1044 bb.0: 1045 liveins: $r0 1046 1047 ; CHECK-DAG: [[X:%[0-9]+]]:_(s32) = COPY $r0 1048 %0(s32) = COPY $r0 1049 ; HARD: [[R:%[0-9]+]]:_(s32) = G_UITOFP [[X]] 1050 ; SOFT-NOT: G_UITOFP 1051 ; SOFT: ADJCALLSTACKDOWN 1052 ; SOFT-DAG: $r0 = COPY [[X]] 1053 ; SOFT-AEABI: BL &__aeabi_ui2f, {{.*}}, implicit $r0, implicit-def $r0 1054 ; SOFT-DEFAULT: BL &__floatunsisf, {{.*}}, implicit $r0, implicit-def $r0 1055 ; SOFT: [[R:%[0-9]+]]:_(s32) = COPY $r0 1056 ; SOFT: ADJCALLSTACKUP 1057 ; SOFT-NOT: G_UITOFP 1058 %1(s32) = G_UITOFP %0(s32) 1059 ; CHECK: $r0 = COPY [[R]] 1060 $r0 = COPY %1(s32) 1061 BX_RET 14, $noreg, implicit $r0 1062 ... 1063 --- 1064 name: test_uitofp_double 1065 # CHECK-LABEL: name: test_uitofp_double 1066 legalized: false 1067 # CHECK: legalized: true 1068 regBankSelected: false 1069 selected: false 1070 tracksRegLiveness: true 1071 registers: 1072 - { id: 0, class: _ } 1073 - { id: 1, class: _ } 1074 - { id: 2, class: _ } 1075 - { id: 3, class: _ } 1076 body: | 1077 bb.0: 1078 liveins: $r0 1079 1080 ; CHECK: [[X:%[0-9]+]]:_(s32) = COPY $r0 1081 %0(s32) = COPY $r0 1082 ; HARD: [[R:%[0-9]+]]:_(s64) = G_UITOFP [[X]] 1083 ; SOFT-NOT: G_UITOFP 1084 ; SOFT: ADJCALLSTACKDOWN 1085 ; SOFT: $r0 = COPY [[X]] 1086 ; SOFT-AEABI: BL &__aeabi_ui2d, {{.*}}, implicit $r0, implicit-def $r0, implicit-def $r1 1087 ; SOFT-DEFAULT: BL &__floatunsidf, {{.*}}, implicit $r0, implicit-def $r0, implicit-def $r1 1088 ; SOFT-DAG: [[R0:%[0-9]+]]:_(s32) = COPY $r0 1089 ; SOFT-DAG: [[R1:%[0-9]+]]:_(s32) = COPY $r1 1090 ; SOFT: ADJCALLSTACKUP 1091 ; SOFT-NOT: G_UITOFP 1092 %1(s64) = G_UITOFP %0(s32) 1093 ; HARD: [[R0:%[0-9]+]]:_(s32), [[R1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[R]] 1094 %2(s32), %3(s32) = G_UNMERGE_VALUES %1(s64) 1095 ; CHECK-DAG: $r0 = COPY [[R0]](s32) 1096 ; CHECK-DAG: $r1 = COPY [[R1]](s32) 1097 $r0 = COPY %2(s32) 1098 $r1 = COPY %3(s32) 1099 BX_RET 14, $noreg, implicit $r0, implicit $r1 1100 ... 1101 ... 1102 name: test_fcmp_true_s32 1103 # CHECK-LABEL: name: test_fcmp_true_s32 1104 legalized: false 1105 # CHECK: legalized: true 1106 regBankSelected: false 1107 selected: false 1108 tracksRegLiveness: true 1109 registers: 1110 - { id: 0, class: _ } 1111 - { id: 1, class: _ } 1112 - { id: 2, class: _ } 1113 - { id: 3, class: _ } 1114 body: | 1115 bb.0: 1116 liveins: $r0, $r1 1117 1118 %0(s32) = COPY $r0 1119 %1(s32) = COPY $r1 1120 %2(s1) = G_FCMP floatpred(true), %0(s32), %1 1121 %3(s32) = G_ZEXT %2(s1) 1122 $r0 = COPY %3(s32) 1123 BX_RET 14, $noreg, implicit $r0 1124 ; HARD-DAG: [[X:%[0-9]+]]:_(s32) = COPY $r0 1125 ; HARD-DAG: [[Y:%[0-9]+]]:_(s32) = COPY $r1 1126 ; HARD: [[R:%[0-9]+]]:_(s1) = G_FCMP floatpred(true), [[X]](s32), [[Y]] 1127 ; HARD: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 1128 ; SOFT-NOT: G_FCMP 1129 ; For soft float we just need to return a '-1' constant, but the truncation 1130 ; to 1 bit is converted by the combiner to the following masking sequence. 1131 ; SOFT: [[R:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1 1132 ; SOFT: [[MASK:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 1133 ; SOFT: [[RCOPY:%[0-9]+]]:_(s32) = COPY [[R]](s32) 1134 ; SOFT: [[REXT:%[0-9]+]]:_(s32) = G_AND [[RCOPY]], [[MASK]] 1135 ; SOFT-NOT: G_FCMP 1136 ; CHECK: $r0 = COPY [[REXT]] 1137 ... 1138 --- 1139 name: test_fcmp_false_s32 1140 # CHECK-LABEL: name: test_fcmp_false_s32 1141 legalized: false 1142 # CHECK: legalized: true 1143 regBankSelected: false 1144 selected: false 1145 tracksRegLiveness: true 1146 registers: 1147 - { id: 0, class: _ } 1148 - { id: 1, class: _ } 1149 - { id: 2, class: _ } 1150 - { id: 3, class: _ } 1151 body: | 1152 bb.0: 1153 liveins: $r0, $r1 1154 1155 %0(s32) = COPY $r0 1156 %1(s32) = COPY $r1 1157 %2(s1) = G_FCMP floatpred(false), %0(s32), %1 1158 %3(s32) = G_ZEXT %2(s1) 1159 $r0 = COPY %3(s32) 1160 BX_RET 14, $noreg, implicit $r0 1161 ; HARD-DAG: [[X:%[0-9]+]]:_(s32) = COPY $r0 1162 ; HARD-DAG: [[Y:%[0-9]+]]:_(s32) = COPY $r1 1163 ; HARD: [[R:%[0-9]+]]:_(s1) = G_FCMP floatpred(false), [[X]](s32), [[Y]] 1164 ; HARD: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 1165 ; SOFT-NOT: G_FCMP 1166 ; For soft float we just need to return a '0' constant, but the truncation 1167 ; to 1 bit is converted by the combiner to the following masking sequence. 1168 ; SOFT: [[R:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1169 ; SOFT: [[MASK:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 1170 ; SOFT: [[RCOPY:%[0-9]+]]:_(s32) = COPY [[R]](s32) 1171 ; SOFT: [[REXT:%[0-9]+]]:_(s32) = G_AND [[RCOPY]], [[MASK]] 1172 ; SOFT-NOT: G_FCMP 1173 ; CHECK: $r0 = COPY [[REXT]] 1174 ... 1175 --- 1176 name: test_fcmp_oeq_s32 1177 # CHECK-LABEL: name: test_fcmp_oeq_s32 1178 legalized: false 1179 # CHECK: legalized: true 1180 regBankSelected: false 1181 selected: false 1182 tracksRegLiveness: true 1183 registers: 1184 - { id: 0, class: _ } 1185 - { id: 1, class: _ } 1186 - { id: 2, class: _ } 1187 - { id: 3, class: _ } 1188 body: | 1189 bb.0: 1190 liveins: $r0, $r1 1191 1192 %0(s32) = COPY $r0 1193 %1(s32) = COPY $r1 1194 ; CHECK-DAG: [[X:%[0-9]+]]:_(s32) = COPY $r0 1195 ; CHECK-DAG: [[Y:%[0-9]+]]:_(s32) = COPY $r1 1196 %2(s1) = G_FCMP floatpred(oeq), %0(s32), %1 1197 ; HARD: [[R:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[X]](s32), [[Y]] 1198 ; HARD: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 1199 ; SOFT-NOT: G_FCMP 1200 ; SOFT: ADJCALLSTACKDOWN 1201 ; SOFT-DAG: $r0 = COPY [[X]] 1202 ; SOFT-DAG: $r1 = COPY [[Y]] 1203 ; SOFT-AEABI: BL &__aeabi_fcmpeq, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 1204 ; SOFT-DEFAULT: BL &__eqsf2, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 1205 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY $r0 1206 ; SOFT: ADJCALLSTACKUP 1207 ; For aeabi, we just need to truncate the result. The combiner changes the 1208 ; truncation into the following masking sequence. 1209 ; SOFT-AEABI: [[MASK:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 1210 ; SOFT-AEABI: [[RCOPY:%[0-9]+]]:_(s32) = COPY [[RET]](s32) 1211 ; SOFT-AEABI: [[REXT:%[0-9]+]]:_(s32) = G_AND [[RCOPY]], [[MASK]] 1212 ; SOFT-DEFAULT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1213 ; SOFT-DEFAULT: [[R:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[RET]](s32), [[ZERO]] 1214 ; SOFT-DEFAULT: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 1215 ; SOFT-NOT: G_FCMP 1216 %3(s32) = G_ZEXT %2(s1) 1217 $r0 = COPY %3(s32) 1218 ; CHECK: $r0 = COPY [[REXT]] 1219 BX_RET 14, $noreg, implicit $r0 1220 ... 1221 --- 1222 name: test_fcmp_ogt_s32 1223 # CHECK-LABEL: name: test_fcmp_ogt_s32 1224 legalized: false 1225 # CHECK: legalized: true 1226 regBankSelected: false 1227 selected: false 1228 tracksRegLiveness: true 1229 registers: 1230 - { id: 0, class: _ } 1231 - { id: 1, class: _ } 1232 - { id: 2, class: _ } 1233 - { id: 3, class: _ } 1234 body: | 1235 bb.0: 1236 liveins: $r0, $r1 1237 1238 %0(s32) = COPY $r0 1239 %1(s32) = COPY $r1 1240 ; CHECK-DAG: [[X:%[0-9]+]]:_(s32) = COPY $r0 1241 ; CHECK-DAG: [[Y:%[0-9]+]]:_(s32) = COPY $r1 1242 %2(s1) = G_FCMP floatpred(ogt), %0(s32), %1 1243 ; HARD: [[R:%[0-9]+]]:_(s1) = G_FCMP floatpred(ogt), [[X]](s32), [[Y]] 1244 ; HARD: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 1245 ; SOFT-NOT: G_FCMP 1246 ; SOFT: ADJCALLSTACKDOWN 1247 ; SOFT-DAG: $r0 = COPY [[X]] 1248 ; SOFT-DAG: $r1 = COPY [[Y]] 1249 ; SOFT-AEABI: BL &__aeabi_fcmpgt, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 1250 ; SOFT-DEFAULT: BL &__gtsf2, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 1251 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY $r0 1252 ; SOFT: ADJCALLSTACKUP 1253 ; For aeabi, we just need to truncate the result. The combiner changes the 1254 ; truncation into the following masking sequence. 1255 ; SOFT-AEABI: [[MASK:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 1256 ; SOFT-AEABI: [[RCOPY:%[0-9]+]]:_(s32) = COPY [[RET]](s32) 1257 ; SOFT-AEABI: [[R:%[0-9]+]]:_(s32) = G_AND [[RCOPY]], [[MASK]] 1258 ; SOFT-DEFAULT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1259 ; SOFT-DEFAULT: [[R:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[RET]](s32), [[ZERO]] 1260 ; SOFT-DEFAULT: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 1261 ; SOFT-NOT: G_FCMP 1262 %3(s32) = G_ZEXT %2(s1) 1263 $r0 = COPY %3(s32) 1264 ; CHECK: $r0 = COPY [[REXT]] 1265 BX_RET 14, $noreg, implicit $r0 1266 ... 1267 --- 1268 name: test_fcmp_oge_s32 1269 # CHECK-LABEL: name: test_fcmp_oge_s32 1270 legalized: false 1271 # CHECK: legalized: true 1272 regBankSelected: false 1273 selected: false 1274 tracksRegLiveness: true 1275 registers: 1276 - { id: 0, class: _ } 1277 - { id: 1, class: _ } 1278 - { id: 2, class: _ } 1279 - { id: 3, class: _ } 1280 body: | 1281 bb.0: 1282 liveins: $r0, $r1 1283 1284 %0(s32) = COPY $r0 1285 %1(s32) = COPY $r1 1286 ; CHECK-DAG: [[X:%[0-9]+]]:_(s32) = COPY $r0 1287 ; CHECK-DAG: [[Y:%[0-9]+]]:_(s32) = COPY $r1 1288 %2(s1) = G_FCMP floatpred(oge), %0(s32), %1 1289 ; HARD: [[R:%[0-9]+]]:_(s1) = G_FCMP floatpred(oge), [[X]](s32), [[Y]] 1290 ; HARD: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 1291 ; SOFT-NOT: G_FCMP 1292 ; SOFT: ADJCALLSTACKDOWN 1293 ; SOFT-DAG: $r0 = COPY [[X]] 1294 ; SOFT-DAG: $r1 = COPY [[Y]] 1295 ; SOFT-AEABI: BL &__aeabi_fcmpge, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 1296 ; SOFT-DEFAULT: BL &__gesf2, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 1297 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY $r0 1298 ; SOFT: ADJCALLSTACKUP 1299 ; For aeabi, we just need to truncate the result. The combiner changes the 1300 ; truncation into the following masking sequence. 1301 ; SOFT-AEABI: [[MASK:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 1302 ; SOFT-AEABI: [[RCOPY:%[0-9]+]]:_(s32) = COPY [[RET]](s32) 1303 ; SOFT-AEABI: [[R:%[0-9]+]]:_(s32) = G_AND [[RCOPY]], [[MASK]] 1304 ; SOFT-DEFAULT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1305 ; SOFT-DEFAULT: [[R:%[0-9]+]]:_(s1) = G_ICMP intpred(sge), [[RET]](s32), [[ZERO]] 1306 ; SOFT-DEFAULT: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 1307 ; SOFT-NOT: G_FCMP 1308 %3(s32) = G_ZEXT %2(s1) 1309 $r0 = COPY %3(s32) 1310 ; CHECK: $r0 = COPY [[REXT]] 1311 BX_RET 14, $noreg, implicit $r0 1312 ... 1313 --- 1314 name: test_fcmp_olt_s32 1315 # CHECK-LABEL: name: test_fcmp_olt_s32 1316 legalized: false 1317 # CHECK: legalized: true 1318 regBankSelected: false 1319 selected: false 1320 tracksRegLiveness: true 1321 registers: 1322 - { id: 0, class: _ } 1323 - { id: 1, class: _ } 1324 - { id: 2, class: _ } 1325 - { id: 3, class: _ } 1326 body: | 1327 bb.0: 1328 liveins: $r0, $r1 1329 1330 %0(s32) = COPY $r0 1331 %1(s32) = COPY $r1 1332 ; CHECK-DAG: [[X:%[0-9]+]]:_(s32) = COPY $r0 1333 ; CHECK-DAG: [[Y:%[0-9]+]]:_(s32) = COPY $r1 1334 %2(s1) = G_FCMP floatpred(olt), %0(s32), %1 1335 ; HARD: [[R:%[0-9]+]]:_(s1) = G_FCMP floatpred(olt), [[X]](s32), [[Y]] 1336 ; HARD: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 1337 ; SOFT-NOT: G_FCMP 1338 ; SOFT: ADJCALLSTACKDOWN 1339 ; SOFT-DAG: $r0 = COPY [[X]] 1340 ; SOFT-DAG: $r1 = COPY [[Y]] 1341 ; SOFT-AEABI: BL &__aeabi_fcmplt, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 1342 ; SOFT-DEFAULT: BL &__ltsf2, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 1343 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY $r0 1344 ; SOFT: ADJCALLSTACKUP 1345 ; For aeabi, we just need to truncate the result. The combiner changes the 1346 ; truncation into the following masking sequence. 1347 ; SOFT-AEABI: [[MASK:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 1348 ; SOFT-AEABI: [[RCOPY:%[0-9]+]]:_(s32) = COPY [[RET]](s32) 1349 ; SOFT-AEABI: [[R:%[0-9]+]]:_(s32) = G_AND [[RCOPY]], [[MASK]] 1350 ; SOFT-DEFAULT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1351 ; SOFT-DEFAULT: [[R:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[RET]](s32), [[ZERO]] 1352 ; SOFT-DEFAULT: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 1353 ; SOFT-NOT: G_FCMP 1354 %3(s32) = G_ZEXT %2(s1) 1355 $r0 = COPY %3(s32) 1356 ; CHECK: $r0 = COPY [[REXT]] 1357 BX_RET 14, $noreg, implicit $r0 1358 ... 1359 --- 1360 name: test_fcmp_ole_s32 1361 # CHECK-LABEL: name: test_fcmp_ole_s32 1362 legalized: false 1363 # CHECK: legalized: true 1364 regBankSelected: false 1365 selected: false 1366 tracksRegLiveness: true 1367 registers: 1368 - { id: 0, class: _ } 1369 - { id: 1, class: _ } 1370 - { id: 2, class: _ } 1371 - { id: 3, class: _ } 1372 body: | 1373 bb.0: 1374 liveins: $r0, $r1 1375 1376 %0(s32) = COPY $r0 1377 %1(s32) = COPY $r1 1378 ; CHECK-DAG: [[X:%[0-9]+]]:_(s32) = COPY $r0 1379 ; CHECK-DAG: [[Y:%[0-9]+]]:_(s32) = COPY $r1 1380 %2(s1) = G_FCMP floatpred(ole), %0(s32), %1 1381 ; HARD: [[R:%[0-9]+]]:_(s1) = G_FCMP floatpred(ole), [[X]](s32), [[Y]] 1382 ; HARD: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 1383 ; SOFT-NOT: G_FCMP 1384 ; SOFT: ADJCALLSTACKDOWN 1385 ; SOFT-DAG: $r0 = COPY [[X]] 1386 ; SOFT-DAG: $r1 = COPY [[Y]] 1387 ; SOFT-AEABI: BL &__aeabi_fcmple, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 1388 ; SOFT-DEFAULT: BL &__lesf2, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 1389 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY $r0 1390 ; SOFT: ADJCALLSTACKUP 1391 ; For aeabi, we just need to truncate the result. The combiner changes the 1392 ; truncation into the following masking sequence. 1393 ; SOFT-AEABI: [[MASK:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 1394 ; SOFT-AEABI: [[RCOPY:%[0-9]+]]:_(s32) = COPY [[RET]](s32) 1395 ; SOFT-AEABI: [[R:%[0-9]+]]:_(s32) = G_AND [[RCOPY]], [[MASK]] 1396 ; SOFT-DEFAULT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1397 ; SOFT-DEFAULT: [[R:%[0-9]+]]:_(s1) = G_ICMP intpred(sle), [[RET]](s32), [[ZERO]] 1398 ; SOFT-DEFAULT: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 1399 ; SOFT-NOT: G_FCMP 1400 %3(s32) = G_ZEXT %2(s1) 1401 $r0 = COPY %3(s32) 1402 ; CHECK: $r0 = COPY [[REXT]] 1403 BX_RET 14, $noreg, implicit $r0 1404 ... 1405 --- 1406 name: test_fcmp_ord_s32 1407 # CHECK-LABEL: name: test_fcmp_ord_s32 1408 legalized: false 1409 # CHECK: legalized: true 1410 regBankSelected: false 1411 selected: false 1412 tracksRegLiveness: true 1413 registers: 1414 - { id: 0, class: _ } 1415 - { id: 1, class: _ } 1416 - { id: 2, class: _ } 1417 - { id: 3, class: _ } 1418 body: | 1419 bb.0: 1420 liveins: $r0, $r1 1421 1422 %0(s32) = COPY $r0 1423 %1(s32) = COPY $r1 1424 ; CHECK-DAG: [[X:%[0-9]+]]:_(s32) = COPY $r0 1425 ; CHECK-DAG: [[Y:%[0-9]+]]:_(s32) = COPY $r1 1426 %2(s1) = G_FCMP floatpred(ord), %0(s32), %1 1427 ; HARD: [[R:%[0-9]+]]:_(s1) = G_FCMP floatpred(ord), [[X]](s32), [[Y]] 1428 ; SOFT-NOT: G_FCMP 1429 ; SOFT: ADJCALLSTACKDOWN 1430 ; SOFT-DAG: $r0 = COPY [[X]] 1431 ; SOFT-DAG: $r1 = COPY [[Y]] 1432 ; SOFT-AEABI: BL &__aeabi_fcmpun, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 1433 ; SOFT-DEFAULT: BL &__unordsf2, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 1434 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY $r0 1435 ; SOFT: ADJCALLSTACKUP 1436 ; SOFT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1437 ; SOFT: [[R:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[RET]](s32), [[ZERO]] 1438 ; SOFT-NOT: G_FCMP 1439 %3(s32) = G_ZEXT %2(s1) 1440 ; CHECK: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 1441 $r0 = COPY %3(s32) 1442 ; CHECK: $r0 = COPY [[REXT]] 1443 BX_RET 14, $noreg, implicit $r0 1444 ... 1445 --- 1446 name: test_fcmp_ugt_s32 1447 # CHECK-LABEL: name: test_fcmp_ugt_s32 1448 legalized: false 1449 # CHECK: legalized: true 1450 regBankSelected: false 1451 selected: false 1452 tracksRegLiveness: true 1453 registers: 1454 - { id: 0, class: _ } 1455 - { id: 1, class: _ } 1456 - { id: 2, class: _ } 1457 - { id: 3, class: _ } 1458 body: | 1459 bb.0: 1460 liveins: $r0, $r1 1461 1462 %0(s32) = COPY $r0 1463 %1(s32) = COPY $r1 1464 ; CHECK-DAG: [[X:%[0-9]+]]:_(s32) = COPY $r0 1465 ; CHECK-DAG: [[Y:%[0-9]+]]:_(s32) = COPY $r1 1466 %2(s1) = G_FCMP floatpred(ugt), %0(s32), %1 1467 ; HARD: [[R:%[0-9]+]]:_(s1) = G_FCMP floatpred(ugt), [[X]](s32), [[Y]] 1468 ; SOFT-NOT: G_FCMP 1469 ; SOFT: ADJCALLSTACKDOWN 1470 ; SOFT-DAG: $r0 = COPY [[X]] 1471 ; SOFT-DAG: $r1 = COPY [[Y]] 1472 ; SOFT-AEABI: BL &__aeabi_fcmple, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 1473 ; SOFT-DEFAULT: BL &__lesf2, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 1474 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY $r0 1475 ; SOFT: ADJCALLSTACKUP 1476 ; SOFT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1477 ; SOFT-AEABI: [[R:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[RET]](s32), [[ZERO]] 1478 ; SOFT-DEFAULT: [[R:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[RET]](s32), [[ZERO]] 1479 ; SOFT-NOT: G_FCMP 1480 %3(s32) = G_ZEXT %2(s1) 1481 ; CHECK: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 1482 $r0 = COPY %3(s32) 1483 ; CHECK: $r0 = COPY [[REXT]] 1484 BX_RET 14, $noreg, implicit $r0 1485 ... 1486 --- 1487 name: test_fcmp_uge_s32 1488 # CHECK-LABEL: name: test_fcmp_uge_s32 1489 legalized: false 1490 # CHECK: legalized: true 1491 regBankSelected: false 1492 selected: false 1493 tracksRegLiveness: true 1494 registers: 1495 - { id: 0, class: _ } 1496 - { id: 1, class: _ } 1497 - { id: 2, class: _ } 1498 - { id: 3, class: _ } 1499 body: | 1500 bb.0: 1501 liveins: $r0, $r1 1502 1503 %0(s32) = COPY $r0 1504 %1(s32) = COPY $r1 1505 ; CHECK-DAG: [[X:%[0-9]+]]:_(s32) = COPY $r0 1506 ; CHECK-DAG: [[Y:%[0-9]+]]:_(s32) = COPY $r1 1507 %2(s1) = G_FCMP floatpred(uge), %0(s32), %1 1508 ; HARD: [[R:%[0-9]+]]:_(s1) = G_FCMP floatpred(uge), [[X]](s32), [[Y]] 1509 ; SOFT-NOT: G_FCMP 1510 ; SOFT: ADJCALLSTACKDOWN 1511 ; SOFT-DAG: $r0 = COPY [[X]] 1512 ; SOFT-DAG: $r1 = COPY [[Y]] 1513 ; SOFT-AEABI: BL &__aeabi_fcmplt, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 1514 ; SOFT-DEFAULT: BL &__ltsf2, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 1515 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY $r0 1516 ; SOFT: ADJCALLSTACKUP 1517 ; SOFT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1518 ; SOFT-AEABI: [[R:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[RET]](s32), [[ZERO]] 1519 ; SOFT-DEFAULT: [[R:%[0-9]+]]:_(s1) = G_ICMP intpred(sge), [[RET]](s32), [[ZERO]] 1520 ; SOFT-NOT: G_FCMP 1521 %3(s32) = G_ZEXT %2(s1) 1522 ; CHECK: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 1523 $r0 = COPY %3(s32) 1524 ; CHECK: $r0 = COPY [[REXT]] 1525 BX_RET 14, $noreg, implicit $r0 1526 ... 1527 --- 1528 name: test_fcmp_ult_s32 1529 # CHECK-LABEL: name: test_fcmp_ult_s32 1530 legalized: false 1531 # CHECK: legalized: true 1532 regBankSelected: false 1533 selected: false 1534 tracksRegLiveness: true 1535 registers: 1536 - { id: 0, class: _ } 1537 - { id: 1, class: _ } 1538 - { id: 2, class: _ } 1539 - { id: 3, class: _ } 1540 body: | 1541 bb.0: 1542 liveins: $r0, $r1 1543 1544 %0(s32) = COPY $r0 1545 %1(s32) = COPY $r1 1546 ; CHECK-DAG: [[X:%[0-9]+]]:_(s32) = COPY $r0 1547 ; CHECK-DAG: [[Y:%[0-9]+]]:_(s32) = COPY $r1 1548 %2(s1) = G_FCMP floatpred(ult), %0(s32), %1 1549 ; HARD: [[R:%[0-9]+]]:_(s1) = G_FCMP floatpred(ult), [[X]](s32), [[Y]] 1550 ; SOFT-NOT: G_FCMP 1551 ; SOFT: ADJCALLSTACKDOWN 1552 ; SOFT-DAG: $r0 = COPY [[X]] 1553 ; SOFT-DAG: $r1 = COPY [[Y]] 1554 ; SOFT-AEABI: BL &__aeabi_fcmpge, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 1555 ; SOFT-DEFAULT: BL &__gesf2, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 1556 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY $r0 1557 ; SOFT: ADJCALLSTACKUP 1558 ; SOFT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1559 ; SOFT-AEABI: [[R:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[RET]](s32), [[ZERO]] 1560 ; SOFT-DEFAULT: [[R:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[RET]](s32), [[ZERO]] 1561 ; SOFT-NOT: G_FCMP 1562 %3(s32) = G_ZEXT %2(s1) 1563 ; CHECK: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 1564 $r0 = COPY %3(s32) 1565 ; CHECK: $r0 = COPY [[REXT]] 1566 BX_RET 14, $noreg, implicit $r0 1567 ... 1568 --- 1569 name: test_fcmp_ule_s32 1570 # CHECK-LABEL: name: test_fcmp_ule_s32 1571 legalized: false 1572 # CHECK: legalized: true 1573 regBankSelected: false 1574 selected: false 1575 tracksRegLiveness: true 1576 registers: 1577 - { id: 0, class: _ } 1578 - { id: 1, class: _ } 1579 - { id: 2, class: _ } 1580 - { id: 3, class: _ } 1581 body: | 1582 bb.0: 1583 liveins: $r0, $r1 1584 1585 %0(s32) = COPY $r0 1586 %1(s32) = COPY $r1 1587 ; CHECK-DAG: [[X:%[0-9]+]]:_(s32) = COPY $r0 1588 ; CHECK-DAG: [[Y:%[0-9]+]]:_(s32) = COPY $r1 1589 %2(s1) = G_FCMP floatpred(ule), %0(s32), %1 1590 ; HARD: [[R:%[0-9]+]]:_(s1) = G_FCMP floatpred(ule), [[X]](s32), [[Y]] 1591 ; SOFT-NOT: G_FCMP 1592 ; SOFT: ADJCALLSTACKDOWN 1593 ; SOFT-DAG: $r0 = COPY [[X]] 1594 ; SOFT-DAG: $r1 = COPY [[Y]] 1595 ; SOFT-AEABI: BL &__aeabi_fcmpgt, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 1596 ; SOFT-DEFAULT: BL &__gtsf2, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 1597 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY $r0 1598 ; SOFT: ADJCALLSTACKUP 1599 ; SOFT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1600 ; SOFT-AEABI: [[R:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[RET]](s32), [[ZERO]] 1601 ; SOFT-DEFAULT: [[R:%[0-9]+]]:_(s1) = G_ICMP intpred(sle), [[RET]](s32), [[ZERO]] 1602 ; SOFT-NOT: G_FCMP 1603 %3(s32) = G_ZEXT %2(s1) 1604 ; CHECK: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 1605 $r0 = COPY %3(s32) 1606 ; CHECK: $r0 = COPY [[REXT]] 1607 BX_RET 14, $noreg, implicit $r0 1608 ... 1609 --- 1610 name: test_fcmp_une_s32 1611 # CHECK-LABEL: name: test_fcmp_une_s32 1612 legalized: false 1613 # CHECK: legalized: true 1614 regBankSelected: false 1615 selected: false 1616 tracksRegLiveness: true 1617 registers: 1618 - { id: 0, class: _ } 1619 - { id: 1, class: _ } 1620 - { id: 2, class: _ } 1621 - { id: 3, class: _ } 1622 body: | 1623 bb.0: 1624 liveins: $r0, $r1 1625 1626 %0(s32) = COPY $r0 1627 %1(s32) = COPY $r1 1628 ; CHECK-DAG: [[X:%[0-9]+]]:_(s32) = COPY $r0 1629 ; CHECK-DAG: [[Y:%[0-9]+]]:_(s32) = COPY $r1 1630 %2(s1) = G_FCMP floatpred(une), %0(s32), %1 1631 ; HARD: [[R:%[0-9]+]]:_(s1) = G_FCMP floatpred(une), [[X]](s32), [[Y]] 1632 ; SOFT-NOT: G_FCMP 1633 ; SOFT: ADJCALLSTACKDOWN 1634 ; SOFT-DAG: $r0 = COPY [[X]] 1635 ; SOFT-DAG: $r1 = COPY [[Y]] 1636 ; SOFT-AEABI: BL &__aeabi_fcmpeq, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 1637 ; SOFT-DEFAULT: BL &__nesf2, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 1638 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY $r0 1639 ; SOFT: ADJCALLSTACKUP 1640 ; SOFT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1641 ; SOFT-AEABI: [[R:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[RET]](s32), [[ZERO]] 1642 ; SOFT-DEFAULT: [[R:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[RET]](s32), [[ZERO]] 1643 ; SOFT-NOT: G_FCMP 1644 %3(s32) = G_ZEXT %2(s1) 1645 ; CHECK: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 1646 $r0 = COPY %3(s32) 1647 ; CHECK: $r0 = COPY [[REXT]] 1648 BX_RET 14, $noreg, implicit $r0 1649 ... 1650 --- 1651 name: test_fcmp_uno_s32 1652 # CHECK-LABEL: name: test_fcmp_uno_s32 1653 legalized: false 1654 # CHECK: legalized: true 1655 regBankSelected: false 1656 selected: false 1657 tracksRegLiveness: true 1658 registers: 1659 - { id: 0, class: _ } 1660 - { id: 1, class: _ } 1661 - { id: 2, class: _ } 1662 - { id: 3, class: _ } 1663 body: | 1664 bb.0: 1665 liveins: $r0, $r1 1666 1667 %0(s32) = COPY $r0 1668 %1(s32) = COPY $r1 1669 ; CHECK-DAG: [[X:%[0-9]+]]:_(s32) = COPY $r0 1670 ; CHECK-DAG: [[Y:%[0-9]+]]:_(s32) = COPY $r1 1671 %2(s1) = G_FCMP floatpred(uno), %0(s32), %1 1672 ; HARD: [[R:%[0-9]+]]:_(s1) = G_FCMP floatpred(uno), [[X]](s32), [[Y]] 1673 ; HARD: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 1674 ; SOFT-NOT: G_FCMP 1675 ; SOFT: ADJCALLSTACKDOWN 1676 ; SOFT-DAG: $r0 = COPY [[X]] 1677 ; SOFT-DAG: $r1 = COPY [[Y]] 1678 ; SOFT-AEABI: BL &__aeabi_fcmpun, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 1679 ; SOFT-DEFAULT: BL &__unordsf2, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 1680 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY $r0 1681 ; SOFT: ADJCALLSTACKUP 1682 ; For aeabi, we just need to truncate the result. The combiner changes the 1683 ; truncation into the following masking sequence. 1684 ; SOFT-AEABI: [[MASK:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 1685 ; SOFT-AEABI: [[RCOPY:%[0-9]+]]:_(s32) = COPY [[RET]](s32) 1686 ; SOFT-AEABI: [[R:%[0-9]+]]:_(s32) = G_AND [[RCOPY]], [[MASK]] 1687 ; SOFT-DEFAULT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1688 ; SOFT-DEFAULT: [[R:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[RET]](s32), [[ZERO]] 1689 ; SOFT-DEFAULT: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 1690 ; SOFT-NOT: G_FCMP 1691 %3(s32) = G_ZEXT %2(s1) 1692 $r0 = COPY %3(s32) 1693 ; CHECK: $r0 = COPY [[REXT]] 1694 BX_RET 14, $noreg, implicit $r0 1695 ... 1696 --- 1697 name: test_fcmp_one_s32 1698 # CHECK-LABEL: name: test_fcmp_one_s32 1699 legalized: false 1700 # CHECK: legalized: true 1701 regBankSelected: false 1702 selected: false 1703 tracksRegLiveness: true 1704 registers: 1705 - { id: 0, class: _ } 1706 - { id: 1, class: _ } 1707 - { id: 2, class: _ } 1708 - { id: 3, class: _ } 1709 body: | 1710 bb.0: 1711 liveins: $r0, $r1 1712 1713 %0(s32) = COPY $r0 1714 %1(s32) = COPY $r1 1715 ; CHECK-DAG: [[X:%[0-9]+]]:_(s32) = COPY $r0 1716 ; CHECK-DAG: [[Y:%[0-9]+]]:_(s32) = COPY $r1 1717 %2(s1) = G_FCMP floatpred(one), %0(s32), %1 1718 ; HARD: [[R:%[0-9]+]]:_(s1) = G_FCMP floatpred(one), [[X]](s32), [[Y]] 1719 ; HARD: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 1720 ; SOFT-NOT: G_FCMP 1721 ; SOFT: ADJCALLSTACKDOWN 1722 ; SOFT-DAG: $r0 = COPY [[X]] 1723 ; SOFT-DAG: $r1 = COPY [[Y]] 1724 ; SOFT-AEABI: BL &__aeabi_fcmpgt, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 1725 ; SOFT-DEFAULT: BL &__gtsf2, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 1726 ; SOFT: [[RET1:%[0-9]+]]:_(s32) = COPY $r0 1727 ; SOFT: ADJCALLSTACKUP 1728 ; SOFT-DEFAULT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1729 ; SOFT-DEFAULT: [[R1:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[RET1]](s32), [[ZERO]] 1730 ; SOFT-NOT: G_FCMP 1731 ; SOFT: ADJCALLSTACKDOWN 1732 ; SOFT-DAG: $r0 = COPY [[X]] 1733 ; SOFT-DAG: $r1 = COPY [[Y]] 1734 ; SOFT-AEABI: BL &__aeabi_fcmplt, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 1735 ; SOFT-DEFAULT: BL &__ltsf2, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 1736 ; SOFT: [[RET2:%[0-9]+]]:_(s32) = COPY $r0 1737 ; SOFT: ADJCALLSTACKUP 1738 ; SOFT-DEFAULT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1739 ; SOFT-DEFAULT: [[R2:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[RET2]](s32), [[ZERO]] 1740 ; SOFT-AEABI: [[R1EXT:%[0-9]+]]:_(s32) = COPY [[RET1]] 1741 ; SOFT-AEABI: [[R2EXT:%[0-9]+]]:_(s32) = COPY [[RET2]] 1742 ; SOFT-DEFAULT: [[R1EXT:%[0-9]+]]:_(s32) = G_ANYEXT [[R1]] 1743 ; SOFT-DEFAULT: [[R2EXT:%[0-9]+]]:_(s32) = G_ANYEXT [[R2]] 1744 ; SOFT: [[R:%[0-9]+]]:_(s32) = G_OR [[R1EXT]], [[R2EXT]] 1745 ; The result of the G_OR needs to be truncated, and the combiner turns the 1746 ; truncation into the following masking sequence. 1747 ; SOFT: [[MASK:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 1748 ; SOFT: [[RCOPY:%[0-9]+]]:_(s32) = COPY [[R]] 1749 ; SOFT: [[REXT:%[0-9]+]]:_(s32) = G_AND [[RCOPY]], [[MASK]] 1750 ; SOFT-NOT: G_FCMP 1751 %3(s32) = G_ZEXT %2(s1) 1752 $r0 = COPY %3(s32) 1753 ; CHECK: $r0 = COPY [[REXT]] 1754 BX_RET 14, $noreg, implicit $r0 1755 ... 1756 --- 1757 name: test_fcmp_ueq_s32 1758 # CHECK-LABEL: name: test_fcmp_ueq_s32 1759 legalized: false 1760 # CHECK: legalized: true 1761 regBankSelected: false 1762 selected: false 1763 tracksRegLiveness: true 1764 registers: 1765 - { id: 0, class: _ } 1766 - { id: 1, class: _ } 1767 - { id: 2, class: _ } 1768 - { id: 3, class: _ } 1769 body: | 1770 bb.0: 1771 liveins: $r0, $r1 1772 1773 %0(s32) = COPY $r0 1774 %1(s32) = COPY $r1 1775 ; CHECK-DAG: [[X:%[0-9]+]]:_(s32) = COPY $r0 1776 ; CHECK-DAG: [[Y:%[0-9]+]]:_(s32) = COPY $r1 1777 %2(s1) = G_FCMP floatpred(ueq), %0(s32), %1 1778 ; HARD: [[R:%[0-9]+]]:_(s1) = G_FCMP floatpred(ueq), [[X]](s32), [[Y]] 1779 ; HARD: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 1780 ; SOFT-NOT: G_FCMP 1781 ; SOFT: ADJCALLSTACKDOWN 1782 ; SOFT-DAG: $r0 = COPY [[X]] 1783 ; SOFT-DAG: $r1 = COPY [[Y]] 1784 ; SOFT-AEABI: BL &__aeabi_fcmpeq, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 1785 ; SOFT-DEFAULT: BL &__eqsf2, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 1786 ; SOFT: [[RET1:%[0-9]+]]:_(s32) = COPY $r0 1787 ; SOFT: ADJCALLSTACKUP 1788 ; SOFT-DEFAULT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1789 ; SOFT-DEFAULT: [[R1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[RET1]](s32), [[ZERO]] 1790 ; SOFT-NOT: G_FCMP 1791 ; SOFT: ADJCALLSTACKDOWN 1792 ; SOFT-DAG: $r0 = COPY [[X]] 1793 ; SOFT-DAG: $r1 = COPY [[Y]] 1794 ; SOFT-AEABI: BL &__aeabi_fcmpun, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 1795 ; SOFT-DEFAULT: BL &__unordsf2, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 1796 ; SOFT: [[RET2:%[0-9]+]]:_(s32) = COPY $r0 1797 ; SOFT: ADJCALLSTACKUP 1798 ; SOFT-DEFAULT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1799 ; SOFT-DEFAULT: [[R2:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[RET2]](s32), [[ZERO]] 1800 ; SOFT-AEABI: [[R1EXT:%[0-9]+]]:_(s32) = COPY [[RET1]] 1801 ; SOFT-AEABI: [[R2EXT:%[0-9]+]]:_(s32) = COPY [[RET2]] 1802 ; SOFT-DEFAULT: [[R1EXT:%[0-9]+]]:_(s32) = G_ANYEXT [[R1]] 1803 ; SOFT-DEFAULT: [[R2EXT:%[0-9]+]]:_(s32) = G_ANYEXT [[R2]] 1804 ; SOFT: [[R:%[0-9]+]]:_(s32) = G_OR [[R1EXT]], [[R2EXT]] 1805 ; The result of the G_OR needs to be truncated, and the combiner turns the 1806 ; truncation into the following masking sequence. 1807 ; SOFT: [[MASK:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 1808 ; SOFT: [[RCOPY:%[0-9]+]]:_(s32) = COPY [[R]] 1809 ; SOFT: [[REXT:%[0-9]+]]:_(s32) = G_AND [[RCOPY]], [[MASK]] 1810 ; SOFT-NOT: G_FCMP 1811 %3(s32) = G_ZEXT %2(s1) 1812 $r0 = COPY %3(s32) 1813 ; CHECK: $r0 = COPY [[REXT]] 1814 BX_RET 14, $noreg, implicit $r0 1815 ... 1816 --- 1817 name: test_fcmp_true_s64 1818 # CHECK-LABEL: name: test_fcmp_true_s64 1819 legalized: false 1820 # CHECK: legalized: true 1821 regBankSelected: false 1822 selected: false 1823 tracksRegLiveness: true 1824 registers: 1825 - { id: 0, class: _ } 1826 - { id: 1, class: _ } 1827 - { id: 2, class: _ } 1828 - { id: 3, class: _ } 1829 - { id: 4, class: _ } 1830 - { id: 5, class: _ } 1831 - { id: 6, class: _ } 1832 - { id: 7, class: _ } 1833 body: | 1834 bb.0: 1835 liveins: $r0, $r1, $r2, $r3 1836 1837 %0(s32) = COPY $r0 1838 %1(s32) = COPY $r1 1839 %2(s32) = COPY $r2 1840 %3(s32) = COPY $r3 1841 ; CHECK-DAG: [[X0:%[0-9]+]]:_(s32) = COPY $r0 1842 ; CHECK-DAG: [[X1:%[0-9]+]]:_(s32) = COPY $r1 1843 ; CHECK-DAG: [[Y0:%[0-9]+]]:_(s32) = COPY $r2 1844 ; CHECK-DAG: [[Y1:%[0-9]+]]:_(s32) = COPY $r3 1845 %4(s64) = G_MERGE_VALUES %0(s32), %1 1846 %5(s64) = G_MERGE_VALUES %2(s32), %3 1847 ; HARD-DAG: [[X:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[X0]](s32), [[X1]](s32) 1848 ; HARD-DAG: [[Y:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[Y0]](s32), [[Y1]](s32) 1849 %6(s1) = G_FCMP floatpred(true), %4(s64), %5 1850 ; HARD: [[R:%[0-9]+]]:_(s1) = G_FCMP floatpred(true), [[X]](s64), [[Y]] 1851 ; HARD: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 1852 ; SOFT-NOT: G_FCMP 1853 ; SOFT: [[R:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1 1854 ; The result needs to be truncated, and the combiner turns the truncation 1855 ; into the following masking sequence. 1856 ; SOFT: [[MASK:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 1857 ; SOFT: [[RCOPY:%[0-9]+]]:_(s32) = COPY [[R]] 1858 ; SOFT: [[REXT:%[0-9]+]]:_(s32) = G_AND [[RCOPY]], [[MASK]] 1859 ; SOFT-NOT: G_FCMP 1860 %7(s32) = G_ZEXT %6(s1) 1861 $r0 = COPY %7(s32) 1862 ; CHECK: $r0 = COPY [[REXT]] 1863 BX_RET 14, $noreg, implicit $r0 1864 ... 1865 --- 1866 name: test_fcmp_false_s64 1867 # CHECK-LABEL: name: test_fcmp_false_s64 1868 legalized: false 1869 # CHECK: legalized: true 1870 regBankSelected: false 1871 selected: false 1872 tracksRegLiveness: true 1873 registers: 1874 - { id: 0, class: _ } 1875 - { id: 1, class: _ } 1876 - { id: 2, class: _ } 1877 - { id: 3, class: _ } 1878 - { id: 4, class: _ } 1879 - { id: 5, class: _ } 1880 - { id: 6, class: _ } 1881 - { id: 7, class: _ } 1882 body: | 1883 bb.0: 1884 liveins: $r0, $r1, $r2, $r3 1885 1886 %0(s32) = COPY $r0 1887 %1(s32) = COPY $r1 1888 %2(s32) = COPY $r2 1889 %3(s32) = COPY $r3 1890 ; CHECK-DAG: [[X0:%[0-9]+]]:_(s32) = COPY $r0 1891 ; CHECK-DAG: [[X1:%[0-9]+]]:_(s32) = COPY $r1 1892 ; CHECK-DAG: [[Y0:%[0-9]+]]:_(s32) = COPY $r2 1893 ; CHECK-DAG: [[Y1:%[0-9]+]]:_(s32) = COPY $r3 1894 %4(s64) = G_MERGE_VALUES %0(s32), %1 1895 %5(s64) = G_MERGE_VALUES %2(s32), %3 1896 ; HARD-DAG: [[X:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[X0]](s32), [[X1]](s32) 1897 ; HARD-DAG: [[Y:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[Y0]](s32), [[Y1]](s32) 1898 %6(s1) = G_FCMP floatpred(false), %4(s64), %5 1899 ; HARD: [[R:%[0-9]+]]:_(s1) = G_FCMP floatpred(false), [[X]](s64), [[Y]] 1900 ; HARD: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 1901 ; SOFT-NOT: G_FCMP 1902 ; SOFT: [[R:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1903 ; The result needs to be truncated, and the combiner turns the truncation 1904 ; into the following masking sequence. 1905 ; SOFT: [[MASK:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 1906 ; SOFT: [[RCOPY:%[0-9]+]]:_(s32) = COPY [[R]] 1907 ; SOFT: [[REXT:%[0-9]+]]:_(s32) = G_AND [[RCOPY]], [[MASK]] 1908 ; SOFT-NOT: G_FCMP 1909 ; SOFT-NOT: G_FCMP 1910 %7(s32) = G_ZEXT %6(s1) 1911 $r0 = COPY %7(s32) 1912 ; CHECK: $r0 = COPY [[REXT]] 1913 BX_RET 14, $noreg, implicit $r0 1914 ... 1915 --- 1916 name: test_fcmp_oeq_s64 1917 # CHECK-LABEL: name: test_fcmp_oeq_s64 1918 legalized: false 1919 # CHECK: legalized: true 1920 regBankSelected: false 1921 selected: false 1922 tracksRegLiveness: true 1923 registers: 1924 - { id: 0, class: _ } 1925 - { id: 1, class: _ } 1926 - { id: 2, class: _ } 1927 - { id: 3, class: _ } 1928 - { id: 4, class: _ } 1929 - { id: 5, class: _ } 1930 - { id: 6, class: _ } 1931 - { id: 7, class: _ } 1932 body: | 1933 bb.0: 1934 liveins: $r0, $r1, $r2, $r3 1935 1936 %0(s32) = COPY $r0 1937 %1(s32) = COPY $r1 1938 %2(s32) = COPY $r2 1939 %3(s32) = COPY $r3 1940 ; CHECK-DAG: [[X0:%[0-9]+]]:_(s32) = COPY $r0 1941 ; CHECK-DAG: [[X1:%[0-9]+]]:_(s32) = COPY $r1 1942 ; CHECK-DAG: [[Y0:%[0-9]+]]:_(s32) = COPY $r2 1943 ; CHECK-DAG: [[Y1:%[0-9]+]]:_(s32) = COPY $r3 1944 %4(s64) = G_MERGE_VALUES %0(s32), %1 1945 %5(s64) = G_MERGE_VALUES %2(s32), %3 1946 ; HARD-DAG: [[X:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[X0]](s32), [[X1]](s32) 1947 ; HARD-DAG: [[Y:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[Y0]](s32), [[Y1]](s32) 1948 %6(s1) = G_FCMP floatpred(oeq), %4(s64), %5 1949 ; HARD: [[R:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[X]](s64), [[Y]] 1950 ; HARD: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 1951 ; SOFT-NOT: G_FCMP 1952 ; SOFT: ADJCALLSTACKDOWN 1953 ; SOFT-DAG: $r0 = COPY [[X0]] 1954 ; SOFT-DAG: $r1 = COPY [[X1]] 1955 ; SOFT-DAG: $r2 = COPY [[Y0]] 1956 ; SOFT-DAG: $r3 = COPY [[Y1]] 1957 ; SOFT-AEABI: BL &__aeabi_dcmpeq, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0 1958 ; SOFT-DEFAULT: BL &__eqdf2, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0 1959 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY $r0 1960 ; SOFT: ADJCALLSTACKUP 1961 ; For aeabi, we just need to truncate the result. The combiner changes the 1962 ; truncation into the following masking sequence. 1963 ; SOFT-AEABI: [[MASK:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 1964 ; SOFT-AEABI: [[RCOPY:%[0-9]+]]:_(s32) = COPY [[RET]](s32) 1965 ; SOFT-AEABI: [[REXT:%[0-9]+]]:_(s32) = G_AND [[RCOPY]], [[MASK]] 1966 ; SOFT-DEFAULT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1967 ; SOFT-DEFAULT: [[R:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[RET]](s32), [[ZERO]] 1968 ; SOFT-DEFAULT: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 1969 ; SOFT-NOT: G_FCMP 1970 %7(s32) = G_ZEXT %6(s1) 1971 $r0 = COPY %7(s32) 1972 ; CHECK: $r0 = COPY [[REXT]] 1973 BX_RET 14, $noreg, implicit $r0 1974 ... 1975 --- 1976 name: test_fcmp_ogt_s64 1977 # CHECK-LABEL: name: test_fcmp_ogt_s64 1978 legalized: false 1979 # CHECK: legalized: true 1980 regBankSelected: false 1981 selected: false 1982 tracksRegLiveness: true 1983 registers: 1984 - { id: 0, class: _ } 1985 - { id: 1, class: _ } 1986 - { id: 2, class: _ } 1987 - { id: 3, class: _ } 1988 - { id: 4, class: _ } 1989 - { id: 5, class: _ } 1990 - { id: 6, class: _ } 1991 - { id: 7, class: _ } 1992 body: | 1993 bb.0: 1994 liveins: $r0, $r1, $r2, $r3 1995 1996 %0(s32) = COPY $r0 1997 %1(s32) = COPY $r1 1998 %2(s32) = COPY $r2 1999 %3(s32) = COPY $r3 2000 ; CHECK-DAG: [[X0:%[0-9]+]]:_(s32) = COPY $r0 2001 ; CHECK-DAG: [[X1:%[0-9]+]]:_(s32) = COPY $r1 2002 ; CHECK-DAG: [[Y0:%[0-9]+]]:_(s32) = COPY $r2 2003 ; CHECK-DAG: [[Y1:%[0-9]+]]:_(s32) = COPY $r3 2004 %4(s64) = G_MERGE_VALUES %0(s32), %1 2005 %5(s64) = G_MERGE_VALUES %2(s32), %3 2006 ; HARD-DAG: [[X:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[X0]](s32), [[X1]](s32) 2007 ; HARD-DAG: [[Y:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[Y0]](s32), [[Y1]](s32) 2008 %6(s1) = G_FCMP floatpred(ogt), %4(s64), %5 2009 ; HARD: [[R:%[0-9]+]]:_(s1) = G_FCMP floatpred(ogt), [[X]](s64), [[Y]] 2010 ; HARD: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 2011 ; SOFT-NOT: G_FCMP 2012 ; SOFT: ADJCALLSTACKDOWN 2013 ; SOFT-DAG: $r0 = COPY [[X0]] 2014 ; SOFT-DAG: $r1 = COPY [[X1]] 2015 ; SOFT-DAG: $r2 = COPY [[Y0]] 2016 ; SOFT-DAG: $r3 = COPY [[Y1]] 2017 ; SOFT-AEABI: BL &__aeabi_dcmpgt, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0 2018 ; SOFT-DEFAULT: BL &__gtdf2, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0 2019 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY $r0 2020 ; SOFT: ADJCALLSTACKUP 2021 ; For aeabi, we just need to truncate the result. The combiner changes the 2022 ; truncation into the following masking sequence. 2023 ; SOFT-AEABI: [[MASK:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 2024 ; SOFT-AEABI: [[RCOPY:%[0-9]+]]:_(s32) = COPY [[RET]](s32) 2025 ; SOFT-AEABI: [[REXT:%[0-9]+]]:_(s32) = G_AND [[RCOPY]], [[MASK]] 2026 ; SOFT-DEFAULT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 2027 ; SOFT-DEFAULT: [[R:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[RET]](s32), [[ZERO]] 2028 ; SOFT-DEFAULT: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 2029 ; SOFT-NOT: G_FCMP 2030 %7(s32) = G_ZEXT %6(s1) 2031 $r0 = COPY %7(s32) 2032 ; CHECK: $r0 = COPY [[REXT]] 2033 BX_RET 14, $noreg, implicit $r0 2034 ... 2035 --- 2036 name: test_fcmp_oge_s64 2037 # CHECK-LABEL: name: test_fcmp_oge_s64 2038 legalized: false 2039 # CHECK: legalized: true 2040 regBankSelected: false 2041 selected: false 2042 tracksRegLiveness: true 2043 registers: 2044 - { id: 0, class: _ } 2045 - { id: 1, class: _ } 2046 - { id: 2, class: _ } 2047 - { id: 3, class: _ } 2048 - { id: 4, class: _ } 2049 - { id: 5, class: _ } 2050 - { id: 6, class: _ } 2051 - { id: 7, class: _ } 2052 body: | 2053 bb.0: 2054 liveins: $r0, $r1, $r2, $r3 2055 2056 %0(s32) = COPY $r0 2057 %1(s32) = COPY $r1 2058 %2(s32) = COPY $r2 2059 %3(s32) = COPY $r3 2060 ; CHECK-DAG: [[X0:%[0-9]+]]:_(s32) = COPY $r0 2061 ; CHECK-DAG: [[X1:%[0-9]+]]:_(s32) = COPY $r1 2062 ; CHECK-DAG: [[Y0:%[0-9]+]]:_(s32) = COPY $r2 2063 ; CHECK-DAG: [[Y1:%[0-9]+]]:_(s32) = COPY $r3 2064 %4(s64) = G_MERGE_VALUES %0(s32), %1 2065 %5(s64) = G_MERGE_VALUES %2(s32), %3 2066 ; HARD-DAG: [[X:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[X0]](s32), [[X1]](s32) 2067 ; HARD-DAG: [[Y:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[Y0]](s32), [[Y1]](s32) 2068 %6(s1) = G_FCMP floatpred(oge), %4(s64), %5 2069 ; HARD: [[R:%[0-9]+]]:_(s1) = G_FCMP floatpred(oge), [[X]](s64), [[Y]] 2070 ; HARD: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 2071 ; SOFT-NOT: G_FCMP 2072 ; SOFT: ADJCALLSTACKDOWN 2073 ; SOFT-DAG: $r0 = COPY [[X0]] 2074 ; SOFT-DAG: $r1 = COPY [[X1]] 2075 ; SOFT-DAG: $r2 = COPY [[Y0]] 2076 ; SOFT-DAG: $r3 = COPY [[Y1]] 2077 ; SOFT-AEABI: BL &__aeabi_dcmpge, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0 2078 ; SOFT-DEFAULT: BL &__gedf2, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0 2079 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY $r0 2080 ; SOFT: ADJCALLSTACKUP 2081 ; For aeabi, we just need to truncate the result. The combiner changes the 2082 ; truncation into the following masking sequence. 2083 ; SOFT-AEABI: [[MASK:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 2084 ; SOFT-AEABI: [[RCOPY:%[0-9]+]]:_(s32) = COPY [[RET]](s32) 2085 ; SOFT-AEABI: [[REXT:%[0-9]+]]:_(s32) = G_AND [[RCOPY]], [[MASK]] 2086 ; SOFT-DEFAULT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 2087 ; SOFT-DEFAULT: [[R:%[0-9]+]]:_(s1) = G_ICMP intpred(sge), [[RET]](s32), [[ZERO]] 2088 ; SOFT-DEFAULT: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 2089 ; SOFT-NOT: G_FCMP 2090 %7(s32) = G_ZEXT %6(s1) 2091 $r0 = COPY %7(s32) 2092 ; CHECK: $r0 = COPY [[REXT]] 2093 BX_RET 14, $noreg, implicit $r0 2094 ... 2095 --- 2096 name: test_fcmp_olt_s64 2097 # CHECK-LABEL: name: test_fcmp_olt_s64 2098 legalized: false 2099 # CHECK: legalized: true 2100 regBankSelected: false 2101 selected: false 2102 tracksRegLiveness: true 2103 registers: 2104 - { id: 0, class: _ } 2105 - { id: 1, class: _ } 2106 - { id: 2, class: _ } 2107 - { id: 3, class: _ } 2108 - { id: 4, class: _ } 2109 - { id: 5, class: _ } 2110 - { id: 6, class: _ } 2111 - { id: 7, class: _ } 2112 body: | 2113 bb.0: 2114 liveins: $r0, $r1, $r2, $r3 2115 2116 %0(s32) = COPY $r0 2117 %1(s32) = COPY $r1 2118 %2(s32) = COPY $r2 2119 %3(s32) = COPY $r3 2120 ; CHECK-DAG: [[X0:%[0-9]+]]:_(s32) = COPY $r0 2121 ; CHECK-DAG: [[X1:%[0-9]+]]:_(s32) = COPY $r1 2122 ; CHECK-DAG: [[Y0:%[0-9]+]]:_(s32) = COPY $r2 2123 ; CHECK-DAG: [[Y1:%[0-9]+]]:_(s32) = COPY $r3 2124 %4(s64) = G_MERGE_VALUES %0(s32), %1 2125 %5(s64) = G_MERGE_VALUES %2(s32), %3 2126 ; HARD-DAG: [[X:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[X0]](s32), [[X1]](s32) 2127 ; HARD-DAG: [[Y:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[Y0]](s32), [[Y1]](s32) 2128 %6(s1) = G_FCMP floatpred(olt), %4(s64), %5 2129 ; HARD: [[R:%[0-9]+]]:_(s1) = G_FCMP floatpred(olt), [[X]](s64), [[Y]] 2130 ; HARD: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 2131 ; SOFT-NOT: G_FCMP 2132 ; SOFT: ADJCALLSTACKDOWN 2133 ; SOFT-DAG: $r0 = COPY [[X0]] 2134 ; SOFT-DAG: $r1 = COPY [[X1]] 2135 ; SOFT-DAG: $r2 = COPY [[Y0]] 2136 ; SOFT-DAG: $r3 = COPY [[Y1]] 2137 ; SOFT-AEABI: BL &__aeabi_dcmplt, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0 2138 ; SOFT-DEFAULT: BL &__ltdf2, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0 2139 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY $r0 2140 ; SOFT: ADJCALLSTACKUP 2141 ; For aeabi, we just need to truncate the result. The combiner changes the 2142 ; truncation into the following masking sequence. 2143 ; SOFT-AEABI: [[MASK:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 2144 ; SOFT-AEABI: [[RCOPY:%[0-9]+]]:_(s32) = COPY [[RET]](s32) 2145 ; SOFT-AEABI: [[REXT:%[0-9]+]]:_(s32) = G_AND [[RCOPY]], [[MASK]] 2146 ; SOFT-DEFAULT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 2147 ; SOFT-DEFAULT: [[R:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[RET]](s32), [[ZERO]] 2148 ; SOFT-DEFAULT: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 2149 ; SOFT-NOT: G_FCMP 2150 %7(s32) = G_ZEXT %6(s1) 2151 $r0 = COPY %7(s32) 2152 ; CHECK: $r0 = COPY [[REXT]] 2153 BX_RET 14, $noreg, implicit $r0 2154 ... 2155 --- 2156 name: test_fcmp_ole_s64 2157 # CHECK-LABEL: name: test_fcmp_ole_s64 2158 legalized: false 2159 # CHECK: legalized: true 2160 regBankSelected: false 2161 selected: false 2162 tracksRegLiveness: true 2163 registers: 2164 - { id: 0, class: _ } 2165 - { id: 1, class: _ } 2166 - { id: 2, class: _ } 2167 - { id: 3, class: _ } 2168 - { id: 4, class: _ } 2169 - { id: 5, class: _ } 2170 - { id: 6, class: _ } 2171 - { id: 7, class: _ } 2172 body: | 2173 bb.0: 2174 liveins: $r0, $r1, $r2, $r3 2175 2176 %0(s32) = COPY $r0 2177 %1(s32) = COPY $r1 2178 %2(s32) = COPY $r2 2179 %3(s32) = COPY $r3 2180 ; CHECK-DAG: [[X0:%[0-9]+]]:_(s32) = COPY $r0 2181 ; CHECK-DAG: [[X1:%[0-9]+]]:_(s32) = COPY $r1 2182 ; CHECK-DAG: [[Y0:%[0-9]+]]:_(s32) = COPY $r2 2183 ; CHECK-DAG: [[Y1:%[0-9]+]]:_(s32) = COPY $r3 2184 %4(s64) = G_MERGE_VALUES %0(s32), %1 2185 %5(s64) = G_MERGE_VALUES %2(s32), %3 2186 ; HARD-DAG: [[X:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[X0]](s32), [[X1]](s32) 2187 ; HARD-DAG: [[Y:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[Y0]](s32), [[Y1]](s32) 2188 %6(s1) = G_FCMP floatpred(ole), %4(s64), %5 2189 ; HARD: [[R:%[0-9]+]]:_(s1) = G_FCMP floatpred(ole), [[X]](s64), [[Y]] 2190 ; HARD: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 2191 ; SOFT-NOT: G_FCMP 2192 ; SOFT: ADJCALLSTACKDOWN 2193 ; SOFT-DAG: $r0 = COPY [[X0]] 2194 ; SOFT-DAG: $r1 = COPY [[X1]] 2195 ; SOFT-DAG: $r2 = COPY [[Y0]] 2196 ; SOFT-DAG: $r3 = COPY [[Y1]] 2197 ; SOFT-AEABI: BL &__aeabi_dcmple, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0 2198 ; SOFT-DEFAULT: BL &__ledf2, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0 2199 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY $r0 2200 ; SOFT: ADJCALLSTACKUP 2201 ; For aeabi, we just need to truncate the result. The combiner changes the 2202 ; truncation into the following masking sequence. 2203 ; SOFT-AEABI: [[MASK:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 2204 ; SOFT-AEABI: [[RCOPY:%[0-9]+]]:_(s32) = COPY [[RET]](s32) 2205 ; SOFT-AEABI: [[REXT:%[0-9]+]]:_(s32) = G_AND [[RCOPY]], [[MASK]] 2206 ; SOFT-DEFAULT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 2207 ; SOFT-DEFAULT: [[R:%[0-9]+]]:_(s1) = G_ICMP intpred(sle), [[RET]](s32), [[ZERO]] 2208 ; SOFT-DEFAULT: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 2209 ; SOFT-NOT: G_FCMP 2210 %7(s32) = G_ZEXT %6(s1) 2211 $r0 = COPY %7(s32) 2212 ; CHECK: $r0 = COPY [[REXT]] 2213 BX_RET 14, $noreg, implicit $r0 2214 ... 2215 --- 2216 name: test_fcmp_ord_s64 2217 # CHECK-LABEL: name: test_fcmp_ord_s64 2218 legalized: false 2219 # CHECK: legalized: true 2220 regBankSelected: false 2221 selected: false 2222 tracksRegLiveness: true 2223 registers: 2224 - { id: 0, class: _ } 2225 - { id: 1, class: _ } 2226 - { id: 2, class: _ } 2227 - { id: 3, class: _ } 2228 - { id: 4, class: _ } 2229 - { id: 5, class: _ } 2230 - { id: 6, class: _ } 2231 - { id: 7, class: _ } 2232 body: | 2233 bb.0: 2234 liveins: $r0, $r1, $r2, $r3 2235 2236 %0(s32) = COPY $r0 2237 %1(s32) = COPY $r1 2238 %2(s32) = COPY $r2 2239 %3(s32) = COPY $r3 2240 ; CHECK-DAG: [[X0:%[0-9]+]]:_(s32) = COPY $r0 2241 ; CHECK-DAG: [[X1:%[0-9]+]]:_(s32) = COPY $r1 2242 ; CHECK-DAG: [[Y0:%[0-9]+]]:_(s32) = COPY $r2 2243 ; CHECK-DAG: [[Y1:%[0-9]+]]:_(s32) = COPY $r3 2244 %4(s64) = G_MERGE_VALUES %0(s32), %1 2245 %5(s64) = G_MERGE_VALUES %2(s32), %3 2246 ; HARD-DAG: [[X:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[X0]](s32), [[X1]](s32) 2247 ; HARD-DAG: [[Y:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[Y0]](s32), [[Y1]](s32) 2248 %6(s1) = G_FCMP floatpred(ord), %4(s64), %5 2249 ; HARD: [[R:%[0-9]+]]:_(s1) = G_FCMP floatpred(ord), [[X]](s64), [[Y]] 2250 ; SOFT-NOT: G_FCMP 2251 ; SOFT: ADJCALLSTACKDOWN 2252 ; SOFT-DAG: $r0 = COPY [[X0]] 2253 ; SOFT-DAG: $r1 = COPY [[X1]] 2254 ; SOFT-DAG: $r2 = COPY [[Y0]] 2255 ; SOFT-DAG: $r3 = COPY [[Y1]] 2256 ; SOFT-AEABI: BL &__aeabi_dcmpun, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0 2257 ; SOFT-DEFAULT: BL &__unorddf2, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0 2258 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY $r0 2259 ; SOFT: ADJCALLSTACKUP 2260 ; SOFT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 2261 ; SOFT: [[R:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[RET]](s32), [[ZERO]] 2262 ; SOFT-NOT: G_FCMP 2263 %7(s32) = G_ZEXT %6(s1) 2264 ; CHECK: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 2265 $r0 = COPY %7(s32) 2266 ; CHECK: $r0 = COPY [[REXT]] 2267 BX_RET 14, $noreg, implicit $r0 2268 ... 2269 --- 2270 name: test_fcmp_ugt_s64 2271 # CHECK-LABEL: name: test_fcmp_ugt_s64 2272 legalized: false 2273 # CHECK: legalized: true 2274 regBankSelected: false 2275 selected: false 2276 tracksRegLiveness: true 2277 registers: 2278 - { id: 0, class: _ } 2279 - { id: 1, class: _ } 2280 - { id: 2, class: _ } 2281 - { id: 3, class: _ } 2282 - { id: 4, class: _ } 2283 - { id: 5, class: _ } 2284 - { id: 6, class: _ } 2285 - { id: 7, class: _ } 2286 body: | 2287 bb.0: 2288 liveins: $r0, $r1, $r2, $r3 2289 2290 %0(s32) = COPY $r0 2291 %1(s32) = COPY $r1 2292 %2(s32) = COPY $r2 2293 %3(s32) = COPY $r3 2294 ; CHECK-DAG: [[X0:%[0-9]+]]:_(s32) = COPY $r0 2295 ; CHECK-DAG: [[X1:%[0-9]+]]:_(s32) = COPY $r1 2296 ; CHECK-DAG: [[Y0:%[0-9]+]]:_(s32) = COPY $r2 2297 ; CHECK-DAG: [[Y1:%[0-9]+]]:_(s32) = COPY $r3 2298 %4(s64) = G_MERGE_VALUES %0(s32), %1 2299 %5(s64) = G_MERGE_VALUES %2(s32), %3 2300 ; HARD-DAG: [[X:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[X0]](s32), [[X1]](s32) 2301 ; HARD-DAG: [[Y:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[Y0]](s32), [[Y1]](s32) 2302 %6(s1) = G_FCMP floatpred(ugt), %4(s64), %5 2303 ; HARD: [[R:%[0-9]+]]:_(s1) = G_FCMP floatpred(ugt), [[X]](s64), [[Y]] 2304 ; SOFT-NOT: G_FCMP 2305 ; SOFT: ADJCALLSTACKDOWN 2306 ; SOFT-DAG: $r0 = COPY [[X0]] 2307 ; SOFT-DAG: $r1 = COPY [[X1]] 2308 ; SOFT-DAG: $r2 = COPY [[Y0]] 2309 ; SOFT-DAG: $r3 = COPY [[Y1]] 2310 ; SOFT-AEABI: BL &__aeabi_dcmple, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0 2311 ; SOFT-DEFAULT: BL &__ledf2, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0 2312 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY $r0 2313 ; SOFT: ADJCALLSTACKUP 2314 ; SOFT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 2315 ; SOFT-AEABI: [[R:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[RET]](s32), [[ZERO]] 2316 ; SOFT-DEFAULT: [[R:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[RET]](s32), [[ZERO]] 2317 ; SOFT-NOT: G_FCMP 2318 %7(s32) = G_ZEXT %6(s1) 2319 ; CHECK: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 2320 $r0 = COPY %7(s32) 2321 ; CHECK: $r0 = COPY [[REXT]] 2322 BX_RET 14, $noreg, implicit $r0 2323 ... 2324 --- 2325 name: test_fcmp_uge_s64 2326 # CHECK-LABEL: name: test_fcmp_uge_s64 2327 legalized: false 2328 # CHECK: legalized: true 2329 regBankSelected: false 2330 selected: false 2331 tracksRegLiveness: true 2332 registers: 2333 - { id: 0, class: _ } 2334 - { id: 1, class: _ } 2335 - { id: 2, class: _ } 2336 - { id: 3, class: _ } 2337 - { id: 4, class: _ } 2338 - { id: 5, class: _ } 2339 - { id: 6, class: _ } 2340 - { id: 7, class: _ } 2341 body: | 2342 bb.0: 2343 liveins: $r0, $r1, $r2, $r3 2344 2345 %0(s32) = COPY $r0 2346 %1(s32) = COPY $r1 2347 %2(s32) = COPY $r2 2348 %3(s32) = COPY $r3 2349 ; CHECK-DAG: [[X0:%[0-9]+]]:_(s32) = COPY $r0 2350 ; CHECK-DAG: [[X1:%[0-9]+]]:_(s32) = COPY $r1 2351 ; CHECK-DAG: [[Y0:%[0-9]+]]:_(s32) = COPY $r2 2352 ; CHECK-DAG: [[Y1:%[0-9]+]]:_(s32) = COPY $r3 2353 %4(s64) = G_MERGE_VALUES %0(s32), %1 2354 %5(s64) = G_MERGE_VALUES %2(s32), %3 2355 ; HARD-DAG: [[X:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[X0]](s32), [[X1]](s32) 2356 ; HARD-DAG: [[Y:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[Y0]](s32), [[Y1]](s32) 2357 %6(s1) = G_FCMP floatpred(uge), %4(s64), %5 2358 ; HARD: [[R:%[0-9]+]]:_(s1) = G_FCMP floatpred(uge), [[X]](s64), [[Y]] 2359 ; SOFT-NOT: G_FCMP 2360 ; SOFT: ADJCALLSTACKDOWN 2361 ; SOFT-DAG: $r0 = COPY [[X0]] 2362 ; SOFT-DAG: $r1 = COPY [[X1]] 2363 ; SOFT-DAG: $r2 = COPY [[Y0]] 2364 ; SOFT-DAG: $r3 = COPY [[Y1]] 2365 ; SOFT-AEABI: BL &__aeabi_dcmplt, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0 2366 ; SOFT-DEFAULT: BL &__ltdf2, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0 2367 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY $r0 2368 ; SOFT: ADJCALLSTACKUP 2369 ; SOFT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 2370 ; SOFT-AEABI: [[R:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[RET]](s32), [[ZERO]] 2371 ; SOFT-DEFAULT: [[R:%[0-9]+]]:_(s1) = G_ICMP intpred(sge), [[RET]](s32), [[ZERO]] 2372 ; SOFT-NOT: G_FCMP 2373 %7(s32) = G_ZEXT %6(s1) 2374 ; CHECK: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 2375 $r0 = COPY %7(s32) 2376 ; CHECK: $r0 = COPY [[REXT]] 2377 BX_RET 14, $noreg, implicit $r0 2378 ... 2379 --- 2380 name: test_fcmp_ult_s64 2381 # CHECK-LABEL: name: test_fcmp_ult_s64 2382 legalized: false 2383 # CHECK: legalized: true 2384 regBankSelected: false 2385 selected: false 2386 tracksRegLiveness: true 2387 registers: 2388 - { id: 0, class: _ } 2389 - { id: 1, class: _ } 2390 - { id: 2, class: _ } 2391 - { id: 3, class: _ } 2392 - { id: 4, class: _ } 2393 - { id: 5, class: _ } 2394 - { id: 6, class: _ } 2395 - { id: 7, class: _ } 2396 body: | 2397 bb.0: 2398 liveins: $r0, $r1, $r2, $r3 2399 2400 %0(s32) = COPY $r0 2401 %1(s32) = COPY $r1 2402 %2(s32) = COPY $r2 2403 %3(s32) = COPY $r3 2404 ; CHECK-DAG: [[X0:%[0-9]+]]:_(s32) = COPY $r0 2405 ; CHECK-DAG: [[X1:%[0-9]+]]:_(s32) = COPY $r1 2406 ; CHECK-DAG: [[Y0:%[0-9]+]]:_(s32) = COPY $r2 2407 ; CHECK-DAG: [[Y1:%[0-9]+]]:_(s32) = COPY $r3 2408 %4(s64) = G_MERGE_VALUES %0(s32), %1 2409 %5(s64) = G_MERGE_VALUES %2(s32), %3 2410 ; HARD-DAG: [[X:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[X0]](s32), [[X1]](s32) 2411 ; HARD-DAG: [[Y:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[Y0]](s32), [[Y1]](s32) 2412 %6(s1) = G_FCMP floatpred(ult), %4(s64), %5 2413 ; HARD: [[R:%[0-9]+]]:_(s1) = G_FCMP floatpred(ult), [[X]](s64), [[Y]] 2414 ; SOFT-NOT: G_FCMP 2415 ; SOFT: ADJCALLSTACKDOWN 2416 ; SOFT-DAG: $r0 = COPY [[X0]] 2417 ; SOFT-DAG: $r1 = COPY [[X1]] 2418 ; SOFT-DAG: $r2 = COPY [[Y0]] 2419 ; SOFT-DAG: $r3 = COPY [[Y1]] 2420 ; SOFT-AEABI: BL &__aeabi_dcmpge, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0 2421 ; SOFT-DEFAULT: BL &__gedf2, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0 2422 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY $r0 2423 ; SOFT: ADJCALLSTACKUP 2424 ; SOFT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 2425 ; SOFT-AEABI: [[R:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[RET]](s32), [[ZERO]] 2426 ; SOFT-DEFAULT: [[R:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[RET]](s32), [[ZERO]] 2427 ; SOFT-NOT: G_FCMP 2428 %7(s32) = G_ZEXT %6(s1) 2429 ; CHECK: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 2430 $r0 = COPY %7(s32) 2431 ; CHECK: $r0 = COPY [[REXT]] 2432 BX_RET 14, $noreg, implicit $r0 2433 ... 2434 --- 2435 name: test_fcmp_ule_s64 2436 # CHECK-LABEL: name: test_fcmp_ule_s64 2437 legalized: false 2438 # CHECK: legalized: true 2439 regBankSelected: false 2440 selected: false 2441 tracksRegLiveness: true 2442 registers: 2443 - { id: 0, class: _ } 2444 - { id: 1, class: _ } 2445 - { id: 2, class: _ } 2446 - { id: 3, class: _ } 2447 - { id: 4, class: _ } 2448 - { id: 5, class: _ } 2449 - { id: 6, class: _ } 2450 - { id: 7, class: _ } 2451 body: | 2452 bb.0: 2453 liveins: $r0, $r1, $r2, $r3 2454 2455 %0(s32) = COPY $r0 2456 %1(s32) = COPY $r1 2457 %2(s32) = COPY $r2 2458 %3(s32) = COPY $r3 2459 ; CHECK-DAG: [[X0:%[0-9]+]]:_(s32) = COPY $r0 2460 ; CHECK-DAG: [[X1:%[0-9]+]]:_(s32) = COPY $r1 2461 ; CHECK-DAG: [[Y0:%[0-9]+]]:_(s32) = COPY $r2 2462 ; CHECK-DAG: [[Y1:%[0-9]+]]:_(s32) = COPY $r3 2463 %4(s64) = G_MERGE_VALUES %0(s32), %1 2464 %5(s64) = G_MERGE_VALUES %2(s32), %3 2465 ; HARD-DAG: [[X:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[X0]](s32), [[X1]](s32) 2466 ; HARD-DAG: [[Y:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[Y0]](s32), [[Y1]](s32) 2467 %6(s1) = G_FCMP floatpred(ule), %4(s64), %5 2468 ; HARD: [[R:%[0-9]+]]:_(s1) = G_FCMP floatpred(ule), [[X]](s64), [[Y]] 2469 ; SOFT-NOT: G_FCMP 2470 ; SOFT: ADJCALLSTACKDOWN 2471 ; SOFT-DAG: $r0 = COPY [[X0]] 2472 ; SOFT-DAG: $r1 = COPY [[X1]] 2473 ; SOFT-DAG: $r2 = COPY [[Y0]] 2474 ; SOFT-DAG: $r3 = COPY [[Y1]] 2475 ; SOFT-AEABI: BL &__aeabi_dcmpgt, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0 2476 ; SOFT-DEFAULT: BL &__gtdf2, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0 2477 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY $r0 2478 ; SOFT: ADJCALLSTACKUP 2479 ; SOFT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 2480 ; SOFT-AEABI: [[R:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[RET]](s32), [[ZERO]] 2481 ; SOFT-DEFAULT: [[R:%[0-9]+]]:_(s1) = G_ICMP intpred(sle), [[RET]](s32), [[ZERO]] 2482 ; SOFT-NOT: G_FCMP 2483 %7(s32) = G_ZEXT %6(s1) 2484 ; CHECK: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 2485 $r0 = COPY %7(s32) 2486 ; CHECK: $r0 = COPY [[REXT]] 2487 BX_RET 14, $noreg, implicit $r0 2488 ... 2489 --- 2490 name: test_fcmp_une_s64 2491 # CHECK-LABEL: name: test_fcmp_une_s64 2492 legalized: false 2493 # CHECK: legalized: true 2494 regBankSelected: false 2495 selected: false 2496 tracksRegLiveness: true 2497 registers: 2498 - { id: 0, class: _ } 2499 - { id: 1, class: _ } 2500 - { id: 2, class: _ } 2501 - { id: 3, class: _ } 2502 - { id: 4, class: _ } 2503 - { id: 5, class: _ } 2504 - { id: 6, class: _ } 2505 - { id: 7, class: _ } 2506 body: | 2507 bb.0: 2508 liveins: $r0, $r1, $r2, $r3 2509 2510 %0(s32) = COPY $r0 2511 %1(s32) = COPY $r1 2512 %2(s32) = COPY $r2 2513 %3(s32) = COPY $r3 2514 ; CHECK-DAG: [[X0:%[0-9]+]]:_(s32) = COPY $r0 2515 ; CHECK-DAG: [[X1:%[0-9]+]]:_(s32) = COPY $r1 2516 ; CHECK-DAG: [[Y0:%[0-9]+]]:_(s32) = COPY $r2 2517 ; CHECK-DAG: [[Y1:%[0-9]+]]:_(s32) = COPY $r3 2518 %4(s64) = G_MERGE_VALUES %0(s32), %1 2519 %5(s64) = G_MERGE_VALUES %2(s32), %3 2520 ; HARD-DAG: [[X:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[X0]](s32), [[X1]](s32) 2521 ; HARD-DAG: [[Y:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[Y0]](s32), [[Y1]](s32) 2522 %6(s1) = G_FCMP floatpred(une), %4(s64), %5 2523 ; HARD: [[R:%[0-9]+]]:_(s1) = G_FCMP floatpred(une), [[X]](s64), [[Y]] 2524 ; SOFT-NOT: G_FCMP 2525 ; SOFT: ADJCALLSTACKDOWN 2526 ; SOFT-DAG: $r0 = COPY [[X0]] 2527 ; SOFT-DAG: $r1 = COPY [[X1]] 2528 ; SOFT-DAG: $r2 = COPY [[Y0]] 2529 ; SOFT-DAG: $r3 = COPY [[Y1]] 2530 ; SOFT-AEABI: BL &__aeabi_dcmpeq, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0 2531 ; SOFT-DEFAULT: BL &__nedf2, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0 2532 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY $r0 2533 ; SOFT: ADJCALLSTACKUP 2534 ; SOFT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 2535 ; SOFT-AEABI: [[R:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[RET]](s32), [[ZERO]] 2536 ; SOFT-DEFAULT: [[R:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[RET]](s32), [[ZERO]] 2537 ; SOFT-NOT: G_FCMP 2538 %7(s32) = G_ZEXT %6(s1) 2539 ; CHECK: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 2540 $r0 = COPY %7(s32) 2541 ; CHECK: $r0 = COPY [[REXT]] 2542 BX_RET 14, $noreg, implicit $r0 2543 ... 2544 --- 2545 name: test_fcmp_uno_s64 2546 # CHECK-LABEL: name: test_fcmp_uno_s64 2547 legalized: false 2548 # CHECK: legalized: true 2549 regBankSelected: false 2550 selected: false 2551 tracksRegLiveness: true 2552 registers: 2553 - { id: 0, class: _ } 2554 - { id: 1, class: _ } 2555 - { id: 2, class: _ } 2556 - { id: 3, class: _ } 2557 - { id: 4, class: _ } 2558 - { id: 5, class: _ } 2559 - { id: 6, class: _ } 2560 - { id: 7, class: _ } 2561 body: | 2562 bb.0: 2563 liveins: $r0, $r1, $r2, $r3 2564 2565 %0(s32) = COPY $r0 2566 %1(s32) = COPY $r1 2567 %2(s32) = COPY $r2 2568 %3(s32) = COPY $r3 2569 ; CHECK-DAG: [[X0:%[0-9]+]]:_(s32) = COPY $r0 2570 ; CHECK-DAG: [[X1:%[0-9]+]]:_(s32) = COPY $r1 2571 ; CHECK-DAG: [[Y0:%[0-9]+]]:_(s32) = COPY $r2 2572 ; CHECK-DAG: [[Y1:%[0-9]+]]:_(s32) = COPY $r3 2573 %4(s64) = G_MERGE_VALUES %0(s32), %1 2574 %5(s64) = G_MERGE_VALUES %2(s32), %3 2575 ; HARD-DAG: [[X:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[X0]](s32), [[X1]](s32) 2576 ; HARD-DAG: [[Y:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[Y0]](s32), [[Y1]](s32) 2577 %6(s1) = G_FCMP floatpred(uno), %4(s64), %5 2578 ; HARD: [[R:%[0-9]+]]:_(s1) = G_FCMP floatpred(uno), [[X]](s64), [[Y]] 2579 ; HARD: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 2580 ; SOFT-NOT: G_FCMP 2581 ; SOFT: ADJCALLSTACKDOWN 2582 ; SOFT-DAG: $r0 = COPY [[X0]] 2583 ; SOFT-DAG: $r1 = COPY [[X1]] 2584 ; SOFT-DAG: $r2 = COPY [[Y0]] 2585 ; SOFT-DAG: $r3 = COPY [[Y1]] 2586 ; SOFT-AEABI: BL &__aeabi_dcmpun, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0 2587 ; SOFT-DEFAULT: BL &__unorddf2, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0 2588 ; SOFT: [[RET:%[0-9]+]]:_(s32) = COPY $r0 2589 ; SOFT: ADJCALLSTACKUP 2590 ; For aeabi, we just need to truncate the result. The combiner changes the 2591 ; truncation into the following masking sequence. 2592 ; SOFT-AEABI: [[MASK:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 2593 ; SOFT-AEABI: [[RCOPY:%[0-9]+]]:_(s32) = COPY [[RET]](s32) 2594 ; SOFT-AEABI: [[REXT:%[0-9]+]]:_(s32) = G_AND [[RCOPY]], [[MASK]] 2595 ; SOFT-DEFAULT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 2596 ; SOFT-DEFAULT: [[R:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[RET]](s32), [[ZERO]] 2597 ; SOFT-DEFAULT: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 2598 ; SOFT-NOT: G_FCMP 2599 %7(s32) = G_ZEXT %6(s1) 2600 $r0 = COPY %7(s32) 2601 ; CHECK: $r0 = COPY [[REXT]] 2602 BX_RET 14, $noreg, implicit $r0 2603 ... 2604 --- 2605 name: test_fcmp_one_s64 2606 # CHECK-LABEL: name: test_fcmp_one_s64 2607 legalized: false 2608 # CHECK: legalized: true 2609 regBankSelected: false 2610 selected: false 2611 tracksRegLiveness: true 2612 registers: 2613 - { id: 0, class: _ } 2614 - { id: 1, class: _ } 2615 - { id: 2, class: _ } 2616 - { id: 3, class: _ } 2617 - { id: 4, class: _ } 2618 - { id: 5, class: _ } 2619 - { id: 6, class: _ } 2620 - { id: 7, class: _ } 2621 body: | 2622 bb.0: 2623 liveins: $r0, $r1, $r2, $r3 2624 2625 %0(s32) = COPY $r0 2626 %1(s32) = COPY $r1 2627 %2(s32) = COPY $r2 2628 %3(s32) = COPY $r3 2629 ; CHECK-DAG: [[X0:%[0-9]+]]:_(s32) = COPY $r0 2630 ; CHECK-DAG: [[X1:%[0-9]+]]:_(s32) = COPY $r1 2631 ; CHECK-DAG: [[Y0:%[0-9]+]]:_(s32) = COPY $r2 2632 ; CHECK-DAG: [[Y1:%[0-9]+]]:_(s32) = COPY $r3 2633 %4(s64) = G_MERGE_VALUES %0(s32), %1 2634 %5(s64) = G_MERGE_VALUES %2(s32), %3 2635 ; HARD-DAG: [[X:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[X0]](s32), [[X1]](s32) 2636 ; HARD-DAG: [[Y:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[Y0]](s32), [[Y1]](s32) 2637 %6(s1) = G_FCMP floatpred(one), %4(s64), %5 2638 ; HARD: [[R:%[0-9]+]]:_(s1) = G_FCMP floatpred(one), [[X]](s64), [[Y]] 2639 ; HARD: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 2640 ; SOFT-NOT: G_FCMP 2641 ; SOFT: ADJCALLSTACKDOWN 2642 ; SOFT-DAG: $r0 = COPY [[X0]] 2643 ; SOFT-DAG: $r1 = COPY [[X1]] 2644 ; SOFT-DAG: $r2 = COPY [[Y0]] 2645 ; SOFT-DAG: $r3 = COPY [[Y1]] 2646 ; SOFT-AEABI: BL &__aeabi_dcmpgt, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0 2647 ; SOFT-DEFAULT: BL &__gtdf2, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0 2648 ; SOFT: [[RET1:%[0-9]+]]:_(s32) = COPY $r0 2649 ; SOFT: ADJCALLSTACKUP 2650 ; SOFT-DEFAULT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 2651 ; SOFT-DEFAULT: [[R1:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[RET1]](s32), [[ZERO]] 2652 ; SOFT-NOT: G_FCMP 2653 ; SOFT: ADJCALLSTACKDOWN 2654 ; SOFT-DAG: $r0 = COPY [[X0]] 2655 ; SOFT-DAG: $r1 = COPY [[X1]] 2656 ; SOFT-DAG: $r2 = COPY [[Y0]] 2657 ; SOFT-DAG: $r3 = COPY [[Y1]] 2658 ; SOFT-AEABI: BL &__aeabi_dcmplt, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0 2659 ; SOFT-DEFAULT: BL &__ltdf2, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0 2660 ; SOFT: [[RET2:%[0-9]+]]:_(s32) = COPY $r0 2661 ; SOFT: ADJCALLSTACKUP 2662 ; SOFT-DEFAULT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 2663 ; SOFT-DEFAULT: [[R2:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[RET2]](s32), [[ZERO]] 2664 ; SOFT-AEABI: [[R1EXT:%[0-9]+]]:_(s32) = COPY [[RET1]] 2665 ; SOFT-AEABI: [[R2EXT:%[0-9]+]]:_(s32) = COPY [[RET2]] 2666 ; SOFT-DEFAULT: [[R1EXT:%[0-9]+]]:_(s32) = G_ANYEXT [[R1]] 2667 ; SOFT-DEFAULT: [[R2EXT:%[0-9]+]]:_(s32) = G_ANYEXT [[R2]] 2668 ; SOFT: [[R:%[0-9]+]]:_(s32) = G_OR [[R1EXT]], [[R2EXT]] 2669 ; The result of the G_OR needs to be truncated, and the combiner turns the 2670 ; truncation into the following masking sequence. 2671 ; SOFT: [[MASK:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 2672 ; SOFT: [[RCOPY:%[0-9]+]]:_(s32) = COPY [[R]] 2673 ; SOFT: [[REXT:%[0-9]+]]:_(s32) = G_AND [[RCOPY]], [[MASK]] 2674 ; SOFT-NOT: G_FCMP 2675 %7(s32) = G_ZEXT %6(s1) 2676 $r0 = COPY %7(s32) 2677 ; CHECK: $r0 = COPY [[REXT]] 2678 BX_RET 14, $noreg, implicit $r0 2679 ... 2680 --- 2681 name: test_fcmp_ueq_s64 2682 # CHECK-LABEL: name: test_fcmp_ueq_s64 2683 legalized: false 2684 # CHECK: legalized: true 2685 regBankSelected: false 2686 selected: false 2687 tracksRegLiveness: true 2688 registers: 2689 - { id: 0, class: _ } 2690 - { id: 1, class: _ } 2691 - { id: 2, class: _ } 2692 - { id: 3, class: _ } 2693 - { id: 4, class: _ } 2694 - { id: 5, class: _ } 2695 - { id: 6, class: _ } 2696 - { id: 7, class: _ } 2697 body: | 2698 bb.0: 2699 liveins: $r0, $r1, $r2, $r3 2700 2701 %0(s32) = COPY $r0 2702 %1(s32) = COPY $r1 2703 %2(s32) = COPY $r2 2704 %3(s32) = COPY $r3 2705 ; CHECK-DAG: [[X0:%[0-9]+]]:_(s32) = COPY $r0 2706 ; CHECK-DAG: [[X1:%[0-9]+]]:_(s32) = COPY $r1 2707 ; CHECK-DAG: [[Y0:%[0-9]+]]:_(s32) = COPY $r2 2708 ; CHECK-DAG: [[Y1:%[0-9]+]]:_(s32) = COPY $r3 2709 %4(s64) = G_MERGE_VALUES %0(s32), %1 2710 %5(s64) = G_MERGE_VALUES %2(s32), %3 2711 ; HARD-DAG: [[X:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[X0]](s32), [[X1]](s32) 2712 ; HARD-DAG: [[Y:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[Y0]](s32), [[Y1]](s32) 2713 %6(s1) = G_FCMP floatpred(ueq), %4(s64), %5 2714 ; HARD: [[R:%[0-9]+]]:_(s1) = G_FCMP floatpred(ueq), [[X]](s64), [[Y]] 2715 ; HARD: [[REXT:%[0-9]+]]:_(s32) = G_ZEXT [[R]](s1) 2716 ; SOFT-NOT: G_FCMP 2717 ; SOFT: ADJCALLSTACKDOWN 2718 ; SOFT-DAG: $r0 = COPY [[X0]] 2719 ; SOFT-DAG: $r1 = COPY [[X1]] 2720 ; SOFT-DAG: $r2 = COPY [[Y0]] 2721 ; SOFT-DAG: $r3 = COPY [[Y1]] 2722 ; SOFT-AEABI: BL &__aeabi_dcmpeq, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0 2723 ; SOFT-DEFAULT: BL &__eqdf2, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0 2724 ; SOFT: [[RET1:%[0-9]+]]:_(s32) = COPY $r0 2725 ; SOFT: ADJCALLSTACKUP 2726 ; SOFT-DEFAULT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 2727 ; SOFT-DEFAULT: [[R1:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[RET1]](s32), [[ZERO]] 2728 ; SOFT-NOT: G_FCMP 2729 ; SOFT: ADJCALLSTACKDOWN 2730 ; SOFT-DAG: $r0 = COPY [[X0]] 2731 ; SOFT-DAG: $r1 = COPY [[X1]] 2732 ; SOFT-DAG: $r2 = COPY [[Y0]] 2733 ; SOFT-DAG: $r3 = COPY [[Y1]] 2734 ; SOFT-AEABI: BL &__aeabi_dcmpun, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0 2735 ; SOFT-DEFAULT: BL &__unorddf2, {{.*}}, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $r0 2736 ; SOFT: [[RET2:%[0-9]+]]:_(s32) = COPY $r0 2737 ; SOFT: ADJCALLSTACKUP 2738 ; SOFT-DEFAULT: [[ZERO:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 2739 ; SOFT-DEFAULT: [[R2:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[RET2]](s32), [[ZERO]] 2740 ; SOFT-AEABI: [[R1EXT:%[0-9]+]]:_(s32) = COPY [[RET1]] 2741 ; SOFT-AEABI: [[R2EXT:%[0-9]+]]:_(s32) = COPY [[RET2]] 2742 ; SOFT-DEFAULT: [[R1EXT:%[0-9]+]]:_(s32) = G_ANYEXT [[R1]] 2743 ; SOFT-DEFAULT: [[R2EXT:%[0-9]+]]:_(s32) = G_ANYEXT [[R2]] 2744 ; SOFT: [[R:%[0-9]+]]:_(s32) = G_OR [[R1EXT]], [[R2EXT]] 2745 ; The result of the G_OR needs to be truncated, and the combiner turns the 2746 ; truncation into the following masking sequence. 2747 ; SOFT: [[MASK:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 2748 ; SOFT: [[RCOPY:%[0-9]+]]:_(s32) = COPY [[R]] 2749 ; SOFT: [[REXT:%[0-9]+]]:_(s32) = G_AND [[RCOPY]], [[MASK]] 2750 ; SOFT-NOT: G_FCMP 2751 %7(s32) = G_ZEXT %6(s1) 2752 $r0 = COPY %7(s32) 2753 ; CHECK: $r0 = COPY [[REXT]] 2754 BX_RET 14, $noreg, implicit $r0 2755 ... 2756
