1 ; This tests that MC/asm header conversion is smooth and that the 2 ; build attributes are correct 3 4 ; RUN: llc < %s -mtriple=thumbv5-linux-gnueabi -mcpu=xscale -mattr=+strict-align | FileCheck %s --check-prefix=XSCALE 5 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6 6 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6-FAST 7 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 8 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6M 9 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST 10 ; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6M 11 ; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST 12 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align | FileCheck %s --check-prefix=ARM1156T2F-S 13 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=ARM1156T2F-S-FAST 14 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 15 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi | FileCheck %s --check-prefix=V7M 16 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7M-FAST 17 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 18 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=V7 19 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 20 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7-FAST 21 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8 22 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V8-FAST 23 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 24 ; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi | FileCheck %s --check-prefix=Vt8 25 ; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 26 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-neon,-crypto | FileCheck %s --check-prefix=V8-FPARMv8 27 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-fp-armv8,-crypto | FileCheck %s --check-prefix=V8-NEON 28 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-crypto | FileCheck %s --check-prefix=V8-FPARMv8-NEON 29 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8-FPARMv8-NEON-CRYPTO 30 ; RUN: llc < %s -mtriple=thumbv8m.base-linux-gnueabi | FileCheck %s --check-prefix=V8MBASELINE 31 ; RUN: llc < %s -mtriple=thumbv8m.main-linux-gnueabi | FileCheck %s --check-prefix=V8MMAINLINE 32 ; RUN: llc < %s -mtriple=thumbv8m.main-linux-gnueabi -mattr=+dsp | FileCheck %s --check-prefix=V8MMAINLINE_DSP 33 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT 34 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT-FAST 35 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 36 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-neon,+d16 | FileCheck %s --check-prefix=CORTEX-A5-NONEON 37 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A5-NOFPU 38 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-NOFPU-FAST 39 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A8-SOFT 40 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A8-SOFT-FAST 41 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-A8-HARD 42 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=hard -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A8-HARD-FAST 43 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 44 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A8-SOFT 45 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT 46 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-SOFT-FAST 47 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-A9-HARD 48 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-HARD-FAST 49 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 50 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT 51 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT 52 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT-FAST 53 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A12-NOFPU 54 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-NOFPU-FAST 55 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 56 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s --check-prefix=CORTEX-A15 57 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A15-FAST 58 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 59 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 | FileCheck %s --check-prefix=CORTEX-A17-DEFAULT 60 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-FAST 61 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A17-NOFPU 62 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-NOFPU-FAST 63 64 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -enable-no-trapping-fp-math | FileCheck %s --check-prefix=NO-TRAPPING-MATH 65 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -denormal-fp-math=ieee | FileCheck %s --check-prefix=DENORMAL-IEEE 66 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -denormal-fp-math=preserve-sign | FileCheck %s --check-prefix=DENORMAL-PRESERVE-SIGN 67 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -denormal-fp-math=positive-zero | FileCheck %s --check-prefix=DENORMAL-POSITIVE-ZERO 68 69 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-FP16 70 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+d16,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-D16-FP16 71 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp-only-sp,+d16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD 72 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp-only-sp,+d16,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD-FP16 73 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=+neon,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-NEON-FP16 74 75 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 76 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 | FileCheck %s --check-prefix=CORTEX-M0 77 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0-FAST 78 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 79 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus | FileCheck %s --check-prefix=CORTEX-M0PLUS 80 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0PLUS-FAST 81 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 82 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 | FileCheck %s --check-prefix=CORTEX-M1 83 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M1-FAST 84 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 85 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align | FileCheck %s --check-prefix=SC000 86 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC000-FAST 87 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 88 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=CORTEX-M3 89 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M3-FAST 90 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 91 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 | FileCheck %s --check-prefix=SC300 92 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC300-FAST 93 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 94 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-M4-SOFT 95 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-SOFT-FAST 96 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-M4-HARD 97 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-HARD-FAST 98 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 99 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SOFT 100 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-NOFPU-FAST 101 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=+fp-only-sp | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SINGLE 102 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=+fp-only-sp -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-FAST 103 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 | FileCheck %s --check-prefix=CORTEX-M7-DOUBLE 104 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 105 ; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m23 | FileCheck %s --check-prefix=CORTEX-M23 106 ; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m33 | FileCheck %s --check-prefix=CORTEX-M33 107 ; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m33 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M33-FAST 108 ; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m33 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 109 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4 | FileCheck %s --check-prefix=CORTEX-R4 110 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4f | FileCheck %s --check-prefix=CORTEX-R4F 111 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=CORTEX-R5 112 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R5-FAST 113 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 114 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 | FileCheck %s --check-prefix=CORTEX-R7 115 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R7-FAST 116 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 117 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 | FileCheck %s --check-prefix=CORTEX-R8 118 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R8-FAST 119 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 120 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32 | FileCheck %s --check-prefix=CORTEX-A32 121 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A32-FAST 122 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 123 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 | FileCheck %s --check-prefix=CORTEX-A35 124 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A35-FAST 125 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 126 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 | FileCheck %s --check-prefix=CORTEX-A53 127 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A53-FAST 128 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 129 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=CORTEX-A57 130 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A57-FAST 131 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 132 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=CORTEX-A72 133 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A72-FAST 134 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 135 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a73 | FileCheck %s --check-prefix=CORTEX-A73 136 ; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A 137 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1 | FileCheck %s --check-prefix=EXYNOS-M1 138 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=EXYNOS-M1-FAST 139 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 140 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m2 | FileCheck %s --check-prefix=EXYNOS-M2 141 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m2 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=EXYNOS-M1-FAST 142 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m2 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 143 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m3 | FileCheck %s --check-prefix=EXYNOS-M3 144 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m3 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=EXYNOS-M1-FAST 145 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m3 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 146 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m4 | FileCheck %s --check-prefix=EXYNOS-M4 147 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m4 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=EXYNOS-M1-FAST 148 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m4 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 149 ; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A-FAST 150 ; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 151 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=CORTEX-A7-CHECK 152 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-CHECK-FAST 153 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2,-vfp3,-vfp4,-neon,-fp16 | FileCheck %s --check-prefix=CORTEX-A7-NOFPU 154 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2,-vfp3,-vfp4,-neon,-fp16 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-NOFPU-FAST 155 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4 156 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 157 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-FPUV4-FAST 158 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,,+d16,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4 159 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=pic | FileCheck %s --check-prefix=RELOC-PIC 160 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=static | FileCheck %s --check-prefix=RELOC-OTHER 161 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=dynamic-no-pic | FileCheck %s --check-prefix=RELOC-OTHER 162 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=RELOC-OTHER 163 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=PCS-R9-USE 164 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+reserve-r9,+strict-align | FileCheck %s --check-prefix=PCS-R9-RESERVE 165 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=ropi | FileCheck %s --check-prefix=RELOC-ROPI 166 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=rwpi | FileCheck %s --check-prefix=RELOC-RWPI 167 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=ropi-rwpi | FileCheck %s --check-prefix=RELOC-ROPI-RWPI 168 169 ; ARMv8.1a (AArch32) 170 ; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN 171 ; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 172 ; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN 173 ; ARMv8a (AArch32) 174 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a32 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 175 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a32 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 176 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a35 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 177 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a35 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 178 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 179 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 180 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 181 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 182 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m1 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 183 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m1 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 184 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m2 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 185 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m2 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 186 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m3 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 187 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m3 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 188 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m4 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 189 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m4 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 190 191 ; ARMv7a 192 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 193 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 194 ; ARMv7ve 195 ; RUN: llc < %s -mtriple=armv7ve-none-linux-gnueabi | FileCheck %s --check-prefix=V7VE 196 ; ARMv7r 197 ; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 198 ; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 199 ; ARMv7em 200 ; RUN: llc < %s -mtriple=thumbv7em-none-linux-gnueabi -mcpu=cortex-m4 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 201 ; RUN: llc < %s -mtriple=thumbv7em-none-linux-gnueabi -mcpu=cortex-m4 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 202 ; ARMv7m 203 ; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 204 ; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 205 ; ARMv6 206 ; RUN: llc < %s -mtriple=armv6-none-netbsd-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN 207 ; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 208 ; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN 209 ; ARMv6k 210 ; RUN: llc < %s -mtriple=armv6k-none-netbsd-gnueabi -mcpu=arm1176j-s 2> %t | FileCheck %s --check-prefix=NO-STRICT-ALIGN 211 ; RUN: FileCheck %s < %t --allow-empty --check-prefix=CPU-SUPPORTED 212 ; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 213 ; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN 214 ; ARMv6m 215 ; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 216 ; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mattr=+strict-align -mcpu=cortex-m0 | FileCheck %s --check-prefix=STRICT-ALIGN 217 ; RUN: llc < %s -mtriple=thumbv6m-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 218 ; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 219 ; ARMv5 220 ; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e | FileCheck %s --check-prefix=NO-STRICT-ALIGN 221 ; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 222 223 ; ARMv8-R 224 ; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-r52 -mattr=-vfp2,-fp16 | FileCheck %s --check-prefix=ARMv8R --check-prefix=ARMv8R-NOFPU 225 ; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-r52 -mattr=-neon,+fp-only-sp,+d16 | FileCheck %s --check-prefix=ARMv8R --check-prefix=ARMv8R-SP 226 ; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-r52 | FileCheck %s --check-prefix=ARMv8R --check-prefix=ARMv8R-NEON 227 228 ; ARMv8-M 229 ; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m23 | FileCheck %s --check-prefix=STRICT-ALIGN 230 ; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m33 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 231 ; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m33 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 232 233 ; CPU-SUPPORTED-NOT: is not a recognized processor for this target 234 235 ; XSCALE: .eabi_attribute 6, 5 236 ; XSCALE: .eabi_attribute 8, 1 237 ; XSCALE: .eabi_attribute 9, 1 238 239 ; DYN-ROUNDING: .eabi_attribute 19, 1 240 241 ; V6: .eabi_attribute 6, 6 242 ; V6: .eabi_attribute 8, 1 243 ;; We assume round-to-nearest by default (matches GCC) 244 ; V6-NOT: .eabi_attribute 27 245 ; V6-NOT: .eabi_attribute 36 246 ; V6-NOT: .eabi_attribute 42 247 ; V6-NOT: .eabi_attribute 44 248 ; V6-NOT: .eabi_attribute 68 249 ; V6-NOT: .eabi_attribute 19 250 ;; The default choice made by llc is for a V6 CPU without an FPU. 251 ;; This is not an interesting detail, but for such CPUs, the default intention is to use 252 ;; software floating-point support. The choice is not important for targets without 253 ;; FPU support! 254 ; V6: .eabi_attribute 20, 1 255 ; V6: .eabi_attribute 21, 1 256 ; V6-NOT: .eabi_attribute 22 257 ; V6: .eabi_attribute 23, 3 258 ; V6: .eabi_attribute 24, 1 259 ; V6: .eabi_attribute 25, 1 260 ; V6-NOT: .eabi_attribute 28 261 ; V6: .eabi_attribute 38, 1 262 263 ; V6-FAST-NOT: .eabi_attribute 19 264 ;; Despite the V6 CPU having no FPU by default, we chose to flush to 265 ;; positive zero here. There's no hardware support doing this, but the 266 ;; fast maths software library might. 267 ; V6-FAST-NOT: .eabi_attribute 20 268 ; V6-FAST-NOT: .eabi_attribute 21 269 ; V6-FAST-NOT: .eabi_attribute 22 270 ; V6-FAST: .eabi_attribute 23, 1 271 272 ;; We emit 6, 12 for both v6-M and v6S-M, technically this is incorrect for 273 ;; V6-M, however we don't model the OS extension so this is fine. 274 ; V6M: .eabi_attribute 6, 12 275 ; V6M: .eabi_attribute 7, 77 276 ; V6M: .eabi_attribute 8, 0 277 ; V6M: .eabi_attribute 9, 1 278 ; V6M-NOT: .eabi_attribute 27 279 ; V6M-NOT: .eabi_attribute 36 280 ; V6M-NOT: .eabi_attribute 42 281 ; V6M-NOT: .eabi_attribute 44 282 ; V6M-NOT: .eabi_attribute 68 283 ; V6M-NOT: .eabi_attribute 19 284 ;; The default choice made by llc is for a V6M CPU without an FPU. 285 ;; This is not an interesting detail, but for such CPUs, the default intention is to use 286 ;; software floating-point support. The choice is not important for targets without 287 ;; FPU support! 288 ; V6M: .eabi_attribute 20, 1 289 ; V6M: .eabi_attribute 21, 1 290 ; V6M-NOT: .eabi_attribute 22 291 ; V6M: .eabi_attribute 23, 3 292 ; V6M: .eabi_attribute 24, 1 293 ; V6M: .eabi_attribute 25, 1 294 ; V6M-NOT: .eabi_attribute 28 295 ; V6M: .eabi_attribute 38, 1 296 297 ; V6M-FAST-NOT: .eabi_attribute 19 298 ;; Despite the V6M CPU having no FPU by default, we chose to flush to 299 ;; positive zero here. There's no hardware support doing this, but the 300 ;; fast maths software library might. 301 ; V6M-FAST-NOT: .eabi_attribute 20 302 ; V6M-FAST-NOT: .eabi_attribute 21 303 ; V6M-FAST-NOT: .eabi_attribute 22 304 ; V6M-FAST: .eabi_attribute 23, 1 305 306 ; ARM1156T2F-S: .cpu arm1156t2f-s 307 ; ARM1156T2F-S: .eabi_attribute 6, 8 308 ; ARM1156T2F-S: .eabi_attribute 8, 1 309 ; ARM1156T2F-S: .eabi_attribute 9, 2 310 ; ARM1156T2F-S: .fpu vfpv2 311 ; ARM1156T2F-S-NOT: .eabi_attribute 27 312 ; ARM1156T2F-S-NOT: .eabi_attribute 36 313 ; ARM1156T2F-S-NOT: .eabi_attribute 42 314 ; ARM1156T2F-S-NOT: .eabi_attribute 44 315 ; ARM1156T2F-S-NOT: .eabi_attribute 68 316 ; ARM1156T2F-S-NOT: .eabi_attribute 19 317 ;; We default to IEEE 754 compliance 318 ; ARM1156T2F-S: .eabi_attribute 20, 1 319 ; ARM1156T2F-S: .eabi_attribute 21, 1 320 ; ARM1156T2F-S-NOT: .eabi_attribute 22 321 ; ARM1156T2F-S: .eabi_attribute 23, 3 322 ; ARM1156T2F-S: .eabi_attribute 24, 1 323 ; ARM1156T2F-S: .eabi_attribute 25, 1 324 ; ARM1156T2F-S-NOT: .eabi_attribute 28 325 ; ARM1156T2F-S: .eabi_attribute 38, 1 326 327 ; ARM1156T2F-S-FAST-NOT: .eabi_attribute 19 328 ;; V6 cores default to flush to positive zero (value 0). Note that value 2 is also equally 329 ;; valid for this core, it's an implementation defined question as to which of 0 and 2 you 330 ;; select. LLVM historically picks 0. 331 ; ARM1156T2F-S-FAST-NOT: .eabi_attribute 20 332 ; ARM1156T2F-S-FAST-NOT: .eabi_attribute 21 333 ; ARM1156T2F-S-FAST-NOT: .eabi_attribute 22 334 ; ARM1156T2F-S-FAST: .eabi_attribute 23, 1 335 336 ; V7M: .eabi_attribute 6, 10 337 ; V7M: .eabi_attribute 7, 77 338 ; V7M: .eabi_attribute 8, 0 339 ; V7M: .eabi_attribute 9, 2 340 ; V7M-NOT: .eabi_attribute 27 341 ; V7M-NOT: .eabi_attribute 36 342 ; V7M-NOT: .eabi_attribute 42 343 ; V7M-NOT: .eabi_attribute 44 344 ; V7M-NOT: .eabi_attribute 68 345 ; V7M-NOT: .eabi_attribute 19 346 ;; The default choice made by llc is for a V7M CPU without an FPU. 347 ;; This is not an interesting detail, but for such CPUs, the default intention is to use 348 ;; software floating-point support. The choice is not important for targets without 349 ;; FPU support! 350 ; V7M: .eabi_attribute 20, 1 351 ; V7M: .eabi_attribute 21, 1 352 ; V7M-NOT: .eabi_attribute 22 353 ; V7M: .eabi_attribute 23, 3 354 ; V7M: .eabi_attribute 24, 1 355 ; V7M: .eabi_attribute 25, 1 356 ; V7M-NOT: .eabi_attribute 28 357 ; V7M: .eabi_attribute 38, 1 358 359 ; V7M-FAST-NOT: .eabi_attribute 19 360 ;; Despite the V7M CPU having no FPU by default, we chose to flush 361 ;; preserving sign. This matches what the hardware would do in the 362 ;; architecture revision were to exist on the current target. 363 ; V7M-FAST: .eabi_attribute 20, 2 364 ; V7M-FAST-NOT: .eabi_attribute 21 365 ; V7M-FAST-NOT: .eabi_attribute 22 366 ; V7M-FAST: .eabi_attribute 23, 1 367 368 ; V7: .syntax unified 369 ; V7: .eabi_attribute 6, 10 370 ; V7-NOT: .eabi_attribute 27 371 ; V7-NOT: .eabi_attribute 36 372 ; V7-NOT: .eabi_attribute 42 373 ; V7-NOT: .eabi_attribute 44 374 ; V7-NOT: .eabi_attribute 68 375 ; V7-NOT: .eabi_attribute 19 376 ;; In safe-maths mode we default to an IEEE 754 compliant choice. 377 ; V7: .eabi_attribute 20, 1 378 ; V7: .eabi_attribute 21, 1 379 ; V7-NOT: .eabi_attribute 22 380 ; V7: .eabi_attribute 23, 3 381 ; V7: .eabi_attribute 24, 1 382 ; V7: .eabi_attribute 25, 1 383 ; V7-NOT: .eabi_attribute 28 384 ; V7: .eabi_attribute 38, 1 385 386 ; V7-FAST-NOT: .eabi_attribute 19 387 ;; The default CPU does have an FPU and it must be VFPv3 or better, so it flushes 388 ;; denormals to zero preserving the sign. 389 ; V7-FAST: .eabi_attribute 20, 2 390 ; V7-FAST-NOT: .eabi_attribute 21 391 ; V7-FAST-NOT: .eabi_attribute 22 392 ; V7-FAST: .eabi_attribute 23, 1 393 394 ; V7VE: .syntax unified 395 ; V7VE: .eabi_attribute 6, 10 @ Tag_CPU_arch 396 ; V7VE: .eabi_attribute 7, 65 @ Tag_CPU_arch_profile 397 ; V7VE: .eabi_attribute 8, 1 @ Tag_ARM_ISA_use 398 ; V7VE: .eabi_attribute 9, 2 @ Tag_THUMB_ISA_use 399 ; V7VE: .eabi_attribute 42, 1 @ Tag_MPextension_use 400 ; V7VE: .eabi_attribute 44, 2 @ Tag_DIV_use 401 ; V7VE: .eabi_attribute 68, 3 @ Tag_Virtualization_use 402 ; V7VE: .eabi_attribute 17, 1 @ Tag_ABI_PCS_GOT_use 403 ; V7VE: .eabi_attribute 20, 1 @ Tag_ABI_FP_denormal 404 ; V7VE: .eabi_attribute 21, 1 @ Tag_ABI_FP_exceptions 405 ; V7VE: .eabi_attribute 23, 3 @ Tag_ABI_FP_number_model 406 ; V7VE: .eabi_attribute 24, 1 @ Tag_ABI_align_needed 407 ; V7VE: .eabi_attribute 25, 1 @ Tag_ABI_align_preserved 408 ; V7VE: .eabi_attribute 38, 1 @ Tag_ABI_FP_16bit_format 409 410 ; V8: .syntax unified 411 ; V8: .eabi_attribute 67, "2.09" 412 ; V8: .eabi_attribute 6, 14 413 ; V8-NOT: .eabi_attribute 44 414 ; V8-NOT: .eabi_attribute 19 415 ; V8: .eabi_attribute 20, 1 416 ; V8: .eabi_attribute 21, 1 417 ; V8-NOT: .eabi_attribute 22 418 ; V8: .eabi_attribute 23, 3 419 420 ; V8-FAST-NOT: .eabi_attribute 19 421 ;; The default does have an FPU, and for V8-A, it flushes preserving sign. 422 ; V8-FAST: .eabi_attribute 20, 2 423 ; V8-FAST-NOT: .eabi_attribute 21 424 ; V8-FAST-NOT: .eabi_attribute 22 425 ; V8-FAST: .eabi_attribute 23, 1 426 427 ; Vt8: .syntax unified 428 ; Vt8: .eabi_attribute 6, 14 429 ; Vt8-NOT: .eabi_attribute 19 430 ; Vt8: .eabi_attribute 20, 1 431 ; Vt8: .eabi_attribute 21, 1 432 ; Vt8-NOT: .eabi_attribute 22 433 ; Vt8: .eabi_attribute 23, 3 434 435 ; V8-FPARMv8: .syntax unified 436 ; V8-FPARMv8: .eabi_attribute 6, 14 437 ; V8-FPARMv8: .fpu fp-armv8 438 439 ; V8-NEON: .syntax unified 440 ; V8-NEON: .eabi_attribute 6, 14 441 ; V8-NEON: .fpu neon 442 ; V8-NEON: .eabi_attribute 12, 3 443 444 ; V8-FPARMv8-NEON: .syntax unified 445 ; V8-FPARMv8-NEON: .eabi_attribute 6, 14 446 ; V8-FPARMv8-NEON: .fpu neon-fp-armv8 447 ; V8-FPARMv8-NEON: .eabi_attribute 12, 3 448 449 ; V8-FPARMv8-NEON-CRYPTO: .syntax unified 450 ; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 6, 14 451 ; V8-FPARMv8-NEON-CRYPTO: .fpu crypto-neon-fp-armv8 452 ; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 12, 3 453 454 ; V8MBASELINE: .syntax unified 455 ; '6' is Tag_CPU_arch, '16' is ARM v8-M Baseline 456 ; V8MBASELINE: .eabi_attribute 6, 16 457 ; '7' is Tag_CPU_arch_profile, '77' is 'M' 458 ; V8MBASELINE: .eabi_attribute 7, 77 459 ; '8' is Tag_ARM_ISA_use 460 ; V8MBASELINE: .eabi_attribute 8, 0 461 ; '9' is Tag_Thumb_ISA_use 462 ; V8MBASELINE: .eabi_attribute 9, 3 463 464 ; V8MMAINLINE: .syntax unified 465 ; '6' is Tag_CPU_arch, '17' is ARM v8-M Mainline 466 ; V8MMAINLINE: .eabi_attribute 6, 17 467 ; V8MMAINLINE: .eabi_attribute 7, 77 468 ; V8MMAINLINE: .eabi_attribute 8, 0 469 ; V8MMAINLINE: .eabi_attribute 9, 3 470 ; V8MMAINLINE_DSP-NOT: .eabi_attribute 46 471 472 ; V8MMAINLINE_DSP: .syntax unified 473 ; V8MBASELINE_DSP: .eabi_attribute 6, 17 474 ; V8MBASELINE_DSP: .eabi_attribute 7, 77 475 ; V8MMAINLINE_DSP: .eabi_attribute 8, 0 476 ; V8MMAINLINE_DSP: .eabi_attribute 9, 3 477 ; V8MMAINLINE_DSP: .eabi_attribute 46, 1 478 479 ; Tag_CPU_unaligned_access 480 ; NO-STRICT-ALIGN: .eabi_attribute 34, 1 481 ; STRICT-ALIGN: .eabi_attribute 34, 0 482 483 ; Tag_CPU_arch 'ARMv7' 484 ; CORTEX-A7-CHECK: .eabi_attribute 6, 10 485 ; CORTEX-A7-NOFPU: .eabi_attribute 6, 10 486 487 ; CORTEX-A7-FPUV4: .eabi_attribute 6, 10 488 489 ; Tag_CPU_arch_profile 'A' 490 ; CORTEX-A7-CHECK: .eabi_attribute 7, 65 491 ; CORTEX-A7-NOFPU: .eabi_attribute 7, 65 492 ; CORTEX-A7-FPUV4: .eabi_attribute 7, 65 493 494 ; Tag_ARM_ISA_use 495 ; CORTEX-A7-CHECK: .eabi_attribute 8, 1 496 ; CORTEX-A7-NOFPU: .eabi_attribute 8, 1 497 ; CORTEX-A7-FPUV4: .eabi_attribute 8, 1 498 499 ; Tag_THUMB_ISA_use 500 ; CORTEX-A7-CHECK: .eabi_attribute 9, 2 501 ; CORTEX-A7-NOFPU: .eabi_attribute 9, 2 502 ; CORTEX-A7-FPUV4: .eabi_attribute 9, 2 503 504 ; CORTEX-A7-CHECK: .fpu neon-vfpv4 505 ; CORTEX-A7-NOFPU-NOT: .fpu 506 ; CORTEX-A7-FPUV4: .fpu vfpv4 507 508 ; CORTEX-A7-CHECK-NOT: .eabi_attribute 19 509 510 ; Tag_FP_HP_extension 511 ; CORTEX-A7-CHECK: .eabi_attribute 36, 1 512 ; CORTEX-A7-NOFPU-NOT: .eabi_attribute 36 513 ; CORTEX-A7-FPUV4: .eabi_attribute 36, 1 514 515 ; Tag_MPextension_use 516 ; CORTEX-A7-CHECK: .eabi_attribute 42, 1 517 ; CORTEX-A7-NOFPU: .eabi_attribute 42, 1 518 ; CORTEX-A7-FPUV4: .eabi_attribute 42, 1 519 520 ; Tag_DIV_use 521 ; CORTEX-A7-CHECK: .eabi_attribute 44, 2 522 ; CORTEX-A7-NOFPU: .eabi_attribute 44, 2 523 ; CORTEX-A7-FPUV4: .eabi_attribute 44, 2 524 525 ; Tag_DSP_extension 526 ; CORTEX-A7-CHECK-NOT: .eabi_attribute 46 527 528 ; Tag_Virtualization_use 529 ; CORTEX-A7-CHECK: .eabi_attribute 68, 3 530 ; CORTEX-A7-NOFPU: .eabi_attribute 68, 3 531 ; CORTEX-A7-FPUV4: .eabi_attribute 68, 3 532 533 ; Tag_ABI_FP_denormal 534 ;; We default to IEEE 754 compliance 535 ; CORTEX-A7-CHECK: .eabi_attribute 20, 1 536 ;; The A7 has VFPv3 support by default, so flush preserving sign. 537 ; CORTEX-A7-CHECK-FAST: .eabi_attribute 20, 2 538 ; CORTEX-A7-NOFPU: .eabi_attribute 20, 1 539 ;; Despite there being no FPU, we chose to flush to zero preserving 540 ;; sign. This matches what the hardware would do for this architecture 541 ;; revision. 542 ; CORTEX-A7-NOFPU-FAST: .eabi_attribute 20, 2 543 ; CORTEX-A7-FPUV4: .eabi_attribute 20, 1 544 ;; The VFPv4 FPU flushes preserving sign. 545 ; CORTEX-A7-FPUV4-FAST: .eabi_attribute 20, 2 546 547 ; Tag_ABI_FP_exceptions 548 ; CORTEX-A7-CHECK: .eabi_attribute 21, 1 549 ; CORTEX-A7-NOFPU: .eabi_attribute 21, 1 550 ; CORTEX-A7-FPUV4: .eabi_attribute 21, 1 551 552 ; Tag_ABI_FP_user_exceptions 553 ; CORTEX-A7-CHECK-NOT: .eabi_attribute 22 554 ; CORTEX-A7-NOFPU-NOT: .eabi_attribute 22 555 ; CORTEX-A7-FPUV4-NOT: .eabi_attribute 22 556 557 ; Tag_ABI_FP_number_model 558 ; CORTEX-A7-CHECK: .eabi_attribute 23, 3 559 ; CORTEX-A7-NOFPU: .eabi_attribute 23, 3 560 ; CORTEX-A7-FPUV4: .eabi_attribute 23, 3 561 562 ; Tag_ABI_align_needed 563 ; CORTEX-A7-CHECK: .eabi_attribute 24, 1 564 ; CORTEX-A7-NOFPU: .eabi_attribute 24, 1 565 ; CORTEX-A7-FPUV4: .eabi_attribute 24, 1 566 567 ; Tag_ABI_align_preserved 568 ; CORTEX-A7-CHECK: .eabi_attribute 25, 1 569 ; CORTEX-A7-NOFPU: .eabi_attribute 25, 1 570 ; CORTEX-A7-FPUV4: .eabi_attribute 25, 1 571 572 ; Tag_FP_16bit_format 573 ; CORTEX-A7-CHECK: .eabi_attribute 38, 1 574 ; CORTEX-A7-NOFPU: .eabi_attribute 38, 1 575 ; CORTEX-A7-FPUV4: .eabi_attribute 38, 1 576 577 ; CORTEX-A5-DEFAULT: .cpu cortex-a5 578 ; CORTEX-A5-DEFAULT: .eabi_attribute 6, 10 579 ; CORTEX-A5-DEFAULT: .eabi_attribute 7, 65 580 ; CORTEX-A5-DEFAULT: .eabi_attribute 8, 1 581 ; CORTEX-A5-DEFAULT: .eabi_attribute 9, 2 582 ; CORTEX-A5-DEFAULT: .fpu neon-vfpv4 583 ; CORTEX-A5-DEFAULT: .eabi_attribute 42, 1 584 ; CORTEX-A5-DEFAULT-NOT: .eabi_attribute 44 585 ; CORTEX-A5-DEFAULT: .eabi_attribute 68, 1 586 ; CORTEX-A5-NOT: .eabi_attribute 19 587 ;; We default to IEEE 754 compliance 588 ; CORTEX-A5-DEFAULT: .eabi_attribute 20, 1 589 ; CORTEX-A5-DEFAULT: .eabi_attribute 21, 1 590 ; CORTEX-A5-DEFAULT-NOT: .eabi_attribute 22 591 ; CORTEX-A5-DEFAULT: .eabi_attribute 23, 3 592 ; CORTEX-A5-DEFAULT: .eabi_attribute 24, 1 593 ; CORTEX-A5-DEFAULT: .eabi_attribute 25, 1 594 595 ; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 19 596 ;; The A5 defaults to a VFPv4 FPU, so it flushed preserving the sign when -ffast-math 597 ;; is given. 598 ; CORTEX-A5-DEFAULT-FAST: .eabi_attribute 20, 2 599 ; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 21 600 ; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 22 601 ; CORTEX-A5-DEFAULT-FAST: .eabi_attribute 23, 1 602 603 ; CORTEX-A5-NONEON: .cpu cortex-a5 604 ; CORTEX-A5-NONEON: .eabi_attribute 6, 10 605 ; CORTEX-A5-NONEON: .eabi_attribute 7, 65 606 ; CORTEX-A5-NONEON: .eabi_attribute 8, 1 607 ; CORTEX-A5-NONEON: .eabi_attribute 9, 2 608 ; CORTEX-A5-NONEON: .fpu vfpv4-d16 609 ; CORTEX-A5-NONEON: .eabi_attribute 42, 1 610 ; CORTEX-A5-NONEON: .eabi_attribute 68, 1 611 ;; We default to IEEE 754 compliance 612 ; CORTEX-A5-NONEON: .eabi_attribute 20, 1 613 ; CORTEX-A5-NONEON: .eabi_attribute 21, 1 614 ; CORTEX-A5-NONEON-NOT: .eabi_attribute 22 615 ; CORTEX-A5-NONEON: .eabi_attribute 23, 3 616 ; CORTEX-A5-NONEON: .eabi_attribute 24, 1 617 ; CORTEX-A5-NONEON: .eabi_attribute 25, 1 618 619 ; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 19 620 ;; The A5 defaults to a VFPv4 FPU, so it flushed preserving sign when -ffast-math 621 ;; is given. 622 ; CORTEX-A5-NONEON-FAST: .eabi_attribute 20, 2 623 ; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 21 624 ; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 22 625 ; CORTEX-A5-NONEON-FAST: .eabi_attribute 23, 1 626 627 ; CORTEX-A5-NOFPU: .cpu cortex-a5 628 ; CORTEX-A5-NOFPU: .eabi_attribute 6, 10 629 ; CORTEX-A5-NOFPU: .eabi_attribute 7, 65 630 ; CORTEX-A5-NOFPU: .eabi_attribute 8, 1 631 ; CORTEX-A5-NOFPU: .eabi_attribute 9, 2 632 ; CORTEX-A5-NOFPU-NOT: .fpu 633 ; CORTEX-A5-NOFPU: .eabi_attribute 42, 1 634 ; CORTEX-A5-NOFPU: .eabi_attribute 68, 1 635 ; CORTEX-A5-NOFPU-NOT: .eabi_attribute 19 636 ;; We default to IEEE 754 compliance 637 ; CORTEX-A5-NOFPU: .eabi_attribute 20, 1 638 ; CORTEX-A5-NOFPU: .eabi_attribute 21, 1 639 ; CORTEX-A5-NOFPU-NOT: .eabi_attribute 22 640 ; CORTEX-A5-NOFPU: .eabi_attribute 23, 3 641 ; CORTEX-A5-NOFPU: .eabi_attribute 24, 1 642 ; CORTEX-A5-NOFPU: .eabi_attribute 25, 1 643 644 ; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 19 645 ;; Despite there being no FPU, we chose to flush to zero preserving 646 ;; sign. This matches what the hardware would do for this architecture 647 ;; revision. 648 ; CORTEX-A5-NOFPU-FAST: .eabi_attribute 20, 2 649 ; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 21 650 ; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 22 651 ; CORTEX-A5-NOFPU-FAST: .eabi_attribute 23, 1 652 653 ; CORTEX-A8-SOFT: .cpu cortex-a8 654 ; CORTEX-A8-SOFT: .eabi_attribute 6, 10 655 ; CORTEX-A8-SOFT: .eabi_attribute 7, 65 656 ; CORTEX-A8-SOFT: .eabi_attribute 8, 1 657 ; CORTEX-A8-SOFT: .eabi_attribute 9, 2 658 ; CORTEX-A8-SOFT: .fpu neon 659 ; CORTEX-A8-SOFT-NOT: .eabi_attribute 27 660 ; CORTEX-A8-SOFT-NOT: .eabi_attribute 36, 1 661 ; CORTEX-A8-SOFT-NOT: .eabi_attribute 42, 1 662 ; CORTEX-A8-SOFT-NOT: .eabi_attribute 44 663 ; CORTEX-A8-SOFT: .eabi_attribute 68, 1 664 ; CORTEX-A8-SOFT-NOT: .eabi_attribute 19 665 ;; We default to IEEE 754 compliance 666 ; CORTEX-A8-SOFT: .eabi_attribute 20, 1 667 ; CORTEX-A8-SOFT: .eabi_attribute 21, 1 668 ; CORTEX-A8-SOFT-NOT: .eabi_attribute 22 669 ; CORTEX-A8-SOFT: .eabi_attribute 23, 3 670 ; CORTEX-A8-SOFT: .eabi_attribute 24, 1 671 ; CORTEX-A8-SOFT: .eabi_attribute 25, 1 672 ; CORTEX-A8-SOFT-NOT: .eabi_attribute 28 673 ; CORTEX-A8-SOFT: .eabi_attribute 38, 1 674 675 ; CORTEX-A9-SOFT: .cpu cortex-a9 676 ; CORTEX-A9-SOFT: .eabi_attribute 6, 10 677 ; CORTEX-A9-SOFT: .eabi_attribute 7, 65 678 ; CORTEX-A9-SOFT: .eabi_attribute 8, 1 679 ; CORTEX-A9-SOFT: .eabi_attribute 9, 2 680 ; CORTEX-A9-SOFT: .fpu neon 681 ; CORTEX-A9-SOFT-NOT: .eabi_attribute 27 682 ; CORTEX-A9-SOFT: .eabi_attribute 36, 1 683 ; CORTEX-A9-SOFT: .eabi_attribute 42, 1 684 ; CORTEX-A9-SOFT-NOT: .eabi_attribute 44 685 ; CORTEX-A9-SOFT: .eabi_attribute 68, 1 686 ; CORTEX-A9-SOFT-NOT: .eabi_attribute 19 687 ;; We default to IEEE 754 compliance 688 ; CORTEX-A9-SOFT: .eabi_attribute 20, 1 689 ; CORTEX-A9-SOFT: .eabi_attribute 21, 1 690 ; CORTEX-A9-SOFT-NOT: .eabi_attribute 22 691 ; CORTEX-A9-SOFT: .eabi_attribute 23, 3 692 ; CORTEX-A9-SOFT: .eabi_attribute 24, 1 693 ; CORTEX-A9-SOFT: .eabi_attribute 25, 1 694 ; CORTEX-A9-SOFT-NOT: .eabi_attribute 28 695 ; CORTEX-A9-SOFT: .eabi_attribute 38, 1 696 697 ; CORTEX-A8-SOFT-FAST-NOT: .eabi_attribute 19 698 ; CORTEX-A9-SOFT-FAST-NOT: .eabi_attribute 19 699 ;; The A9 defaults to a VFPv3 FPU, so it flushes preserving the sign when 700 ;; -ffast-math is specified. 701 ; CORTEX-A8-SOFT-FAST: .eabi_attribute 20, 2 702 ; CORTEX-A9-SOFT-FAST: .eabi_attribute 20, 2 703 ; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 21 704 ; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 22 705 ; CORTEX-A5-SOFT-FAST: .eabi_attribute 23, 1 706 707 ; CORTEX-A8-HARD: .cpu cortex-a8 708 ; CORTEX-A8-HARD: .eabi_attribute 6, 10 709 ; CORTEX-A8-HARD: .eabi_attribute 7, 65 710 ; CORTEX-A8-HARD: .eabi_attribute 8, 1 711 ; CORTEX-A8-HARD: .eabi_attribute 9, 2 712 ; CORTEX-A8-HARD: .fpu neon 713 ; CORTEX-A8-HARD-NOT: .eabi_attribute 27 714 ; CORTEX-A8-HARD-NOT: .eabi_attribute 36, 1 715 ; CORTEX-A8-HARD-NOT: .eabi_attribute 42, 1 716 ; CORTEX-A8-HARD: .eabi_attribute 68, 1 717 ; CORTEX-A8-HARD-NOT: .eabi_attribute 19 718 ;; We default to IEEE 754 compliance 719 ; CORTEX-A8-HARD: .eabi_attribute 20, 1 720 ; CORTEX-A8-HARD: .eabi_attribute 21, 1 721 ; CORTEX-A8-HARD-NOT: .eabi_attribute 22 722 ; CORTEX-A8-HARD: .eabi_attribute 23, 3 723 ; CORTEX-A8-HARD: .eabi_attribute 24, 1 724 ; CORTEX-A8-HARD: .eabi_attribute 25, 1 725 ; CORTEX-A8-HARD: .eabi_attribute 28, 1 726 ; CORTEX-A8-HARD: .eabi_attribute 38, 1 727 728 729 730 ; CORTEX-A9-HARD: .cpu cortex-a9 731 ; CORTEX-A9-HARD: .eabi_attribute 6, 10 732 ; CORTEX-A9-HARD: .eabi_attribute 7, 65 733 ; CORTEX-A9-HARD: .eabi_attribute 8, 1 734 ; CORTEX-A9-HARD: .eabi_attribute 9, 2 735 ; CORTEX-A9-HARD: .fpu neon 736 ; CORTEX-A9-HARD-NOT: .eabi_attribute 27 737 ; CORTEX-A9-HARD: .eabi_attribute 36, 1 738 ; CORTEX-A9-HARD: .eabi_attribute 42, 1 739 ; CORTEX-A9-HARD: .eabi_attribute 68, 1 740 ; CORTEX-A9-HARD-NOT: .eabi_attribute 19 741 ;; We default to IEEE 754 compliance 742 ; CORTEX-A9-HARD: .eabi_attribute 20, 1 743 ; CORTEX-A9-HARD: .eabi_attribute 21, 1 744 ; CORTEX-A9-HARD-NOT: .eabi_attribute 22 745 ; CORTEX-A9-HARD: .eabi_attribute 23, 3 746 ; CORTEX-A9-HARD: .eabi_attribute 24, 1 747 ; CORTEX-A9-HARD: .eabi_attribute 25, 1 748 ; CORTEX-A9-HARD: .eabi_attribute 28, 1 749 ; CORTEX-A9-HARD: .eabi_attribute 38, 1 750 751 ; CORTEX-A8-HARD-FAST-NOT: .eabi_attribute 19 752 ;; The A8 defaults to a VFPv3 FPU, so it flushes preserving the sign when 753 ;; -ffast-math is specified. 754 ; CORTEX-A8-HARD-FAST: .eabi_attribute 20, 2 755 ; CORTEX-A8-HARD-FAST-NOT: .eabi_attribute 21 756 ; CORTEX-A8-HARD-FAST-NOT: .eabi_attribute 22 757 ; CORTEX-A8-HARD-FAST: .eabi_attribute 23, 1 758 759 ; CORTEX-A9-HARD-FAST-NOT: .eabi_attribute 19 760 ;; The A9 defaults to a VFPv3 FPU, so it flushes preserving the sign when 761 ;; -ffast-math is specified. 762 ; CORTEX-A9-HARD-FAST: .eabi_attribute 20, 2 763 ; CORTEX-A9-HARD-FAST-NOT: .eabi_attribute 21 764 ; CORTEX-A9-HARD-FAST-NOT: .eabi_attribute 22 765 ; CORTEX-A9-HARD-FAST: .eabi_attribute 23, 1 766 767 ; CORTEX-A12-DEFAULT: .cpu cortex-a12 768 ; CORTEX-A12-DEFAULT: .eabi_attribute 6, 10 769 ; CORTEX-A12-DEFAULT: .eabi_attribute 7, 65 770 ; CORTEX-A12-DEFAULT: .eabi_attribute 8, 1 771 ; CORTEX-A12-DEFAULT: .eabi_attribute 9, 2 772 ; CORTEX-A12-DEFAULT: .fpu neon-vfpv4 773 ; CORTEX-A12-DEFAULT: .eabi_attribute 42, 1 774 ; CORTEX-A12-DEFAULT: .eabi_attribute 44, 2 775 ; CORTEX-A12-DEFAULT: .eabi_attribute 68, 3 776 ; CORTEX-A12-DEFAULT-NOT: .eabi_attribute 19 777 ;; We default to IEEE 754 compliance 778 ; CORTEX-A12-DEFAULT: .eabi_attribute 20, 1 779 ; CORTEX-A12-DEFAULT: .eabi_attribute 21, 1 780 ; CORTEX-A12-DEFAULT-NOT: .eabi_attribute 22 781 ; CORTEX-A12-DEFAULT: .eabi_attribute 23, 3 782 ; CORTEX-A12-DEFAULT: .eabi_attribute 24, 1 783 ; CORTEX-A12-DEFAULT: .eabi_attribute 25, 1 784 785 ; CORTEX-A12-DEFAULT-FAST-NOT: .eabi_attribute 19 786 ;; The A12 defaults to a VFPv3 FPU, so it flushes preserving the sign when 787 ;; -ffast-math is specified. 788 ; CORTEX-A12-DEFAULT-FAST: .eabi_attribute 20, 2 789 ; CORTEX-A12-HARD-FAST-NOT: .eabi_attribute 21 790 ; CORTEX-A12-HARD-FAST-NOT: .eabi_attribute 22 791 ; CORTEX-A12-HARD-FAST: .eabi_attribute 23, 1 792 793 ; CORTEX-A12-NOFPU: .cpu cortex-a12 794 ; CORTEX-A12-NOFPU: .eabi_attribute 6, 10 795 ; CORTEX-A12-NOFPU: .eabi_attribute 7, 65 796 ; CORTEX-A12-NOFPU: .eabi_attribute 8, 1 797 ; CORTEX-A12-NOFPU: .eabi_attribute 9, 2 798 ; CORTEX-A12-NOFPU-NOT: .fpu 799 ; CORTEX-A12-NOFPU: .eabi_attribute 42, 1 800 ; CORTEX-A12-NOFPU: .eabi_attribute 44, 2 801 ; CORTEX-A12-NOFPU: .eabi_attribute 68, 3 802 ; CORTEX-A12-NOFPU-NOT: .eabi_attribute 19 803 ;; We default to IEEE 754 compliance 804 ; CORTEX-A12-NOFPU: .eabi_attribute 20, 1 805 ; CORTEX-A12-NOFPU: .eabi_attribute 21, 1 806 ; CORTEX-A12-NOFPU-NOT: .eabi_attribute 22 807 ; CORTEX-A12-NOFPU: .eabi_attribute 23, 3 808 ; CORTEX-A12-NOFPU: .eabi_attribute 24, 1 809 ; CORTEX-A12-NOFPU: .eabi_attribute 25, 1 810 811 ; CORTEX-A12-NOFPU-FAST-NOT: .eabi_attribute 19 812 ;; Despite there being no FPU, we chose to flush to zero preserving 813 ;; sign. This matches what the hardware would do for this architecture 814 ;; revision. 815 ; CORTEX-A12-NOFPU-FAST: .eabi_attribute 20, 2 816 ; CORTEX-A12-NOFPU-FAST-NOT: .eabi_attribute 21 817 ; CORTEX-A12-NOFPU-FAST-NOT: .eabi_attribute 22 818 ; CORTEX-A12-NOFPU-FAST: .eabi_attribute 23, 1 819 820 ; CORTEX-A15: .cpu cortex-a15 821 ; CORTEX-A15: .eabi_attribute 6, 10 822 ; CORTEX-A15: .eabi_attribute 7, 65 823 ; CORTEX-A15: .eabi_attribute 8, 1 824 ; CORTEX-A15: .eabi_attribute 9, 2 825 ; CORTEX-A15: .fpu neon-vfpv4 826 ; CORTEX-A15-NOT: .eabi_attribute 27 827 ; CORTEX-A15: .eabi_attribute 36, 1 828 ; CORTEX-A15: .eabi_attribute 42, 1 829 ; CORTEX-A15: .eabi_attribute 44, 2 830 ; CORTEX-A15: .eabi_attribute 68, 3 831 ; CORTEX-A15-NOT: .eabi_attribute 19 832 ;; We default to IEEE 754 compliance 833 ; CORTEX-A15: .eabi_attribute 20, 1 834 ; CORTEX-A15: .eabi_attribute 21, 1 835 ; CORTEX-A15-NOT: .eabi_attribute 22 836 ; CORTEX-A15: .eabi_attribute 23, 3 837 ; CORTEX-A15: .eabi_attribute 24, 1 838 ; CORTEX-A15: .eabi_attribute 25, 1 839 ; CORTEX-A15-NOT: .eabi_attribute 28 840 ; CORTEX-A15: .eabi_attribute 38, 1 841 842 ; CORTEX-A15-FAST-NOT: .eabi_attribute 19 843 ;; The A15 defaults to a VFPv3 FPU, so it flushes preserving the sign when 844 ;; -ffast-math is specified. 845 ; CORTEX-A15-FAST: .eabi_attribute 20, 2 846 ; CORTEX-A15-FAST-NOT: .eabi_attribute 21 847 ; CORTEX-A15-FAST-NOT: .eabi_attribute 22 848 ; CORTEX-A15-FAST: .eabi_attribute 23, 1 849 850 ; CORTEX-A17-DEFAULT: .cpu cortex-a17 851 ; CORTEX-A17-DEFAULT: .eabi_attribute 6, 10 852 ; CORTEX-A17-DEFAULT: .eabi_attribute 7, 65 853 ; CORTEX-A17-DEFAULT: .eabi_attribute 8, 1 854 ; CORTEX-A17-DEFAULT: .eabi_attribute 9, 2 855 ; CORTEX-A17-DEFAULT: .fpu neon-vfpv4 856 ; CORTEX-A17-DEFAULT: .eabi_attribute 42, 1 857 ; CORTEX-A17-DEFAULT: .eabi_attribute 44, 2 858 ; CORTEX-A17-DEFAULT: .eabi_attribute 68, 3 859 ; CORTEX-A17-DEFAULT-NOT: .eabi_attribute 19 860 ;; We default to IEEE 754 compliance 861 ; CORTEX-A17-DEFAULT: .eabi_attribute 20, 1 862 ; CORTEX-A17-DEFAULT: .eabi_attribute 21, 1 863 ; CORTEX-A17-DEFAULT-NOT: .eabi_attribute 22 864 ; CORTEX-A17-DEFAULT: .eabi_attribute 23, 3 865 ; CORTEX-A17-DEFAULT: .eabi_attribute 24, 1 866 ; CORTEX-A17-DEFAULT: .eabi_attribute 25, 1 867 868 ; CORTEX-A17-FAST-NOT: .eabi_attribute 19 869 ;; The A17 defaults to a VFPv3 FPU, so it flushes preserving the sign when 870 ;; -ffast-math is specified. 871 ; CORTEX-A17-FAST: .eabi_attribute 20, 2 872 ; CORTEX-A17-FAST-NOT: .eabi_attribute 21 873 ; CORTEX-A17-FAST-NOT: .eabi_attribute 22 874 ; CORTEX-A17-FAST: .eabi_attribute 23, 1 875 876 ; CORTEX-A17-NOFPU: .cpu cortex-a17 877 ; CORTEX-A17-NOFPU: .eabi_attribute 6, 10 878 ; CORTEX-A17-NOFPU: .eabi_attribute 7, 65 879 ; CORTEX-A17-NOFPU: .eabi_attribute 8, 1 880 ; CORTEX-A17-NOFPU: .eabi_attribute 9, 2 881 ; CORTEX-A17-NOFPU-NOT: .fpu 882 ; CORTEX-A17-NOFPU: .eabi_attribute 42, 1 883 ; CORTEX-A17-NOFPU: .eabi_attribute 44, 2 884 ; CORTEX-A17-NOFPU: .eabi_attribute 68, 3 885 ; CORTEX-A17-NOFPU-NOT: .eabi_attribute 19 886 ;; We default to IEEE 754 compliance 887 ; CORTEX-A17-NOFPU: .eabi_attribute 20, 1 888 ; CORTEX-A17-NOFPU: .eabi_attribute 21, 1 889 ; CORTEX-A17-NOFPU-NOT: .eabi_attribute 22 890 ; CORTEX-A17-NOFPU: .eabi_attribute 23, 3 891 ; CORTEX-A17-NOFPU: .eabi_attribute 24, 1 892 ; CORTEX-A17-NOFPU: .eabi_attribute 25, 1 893 894 ; CORTEX-A17-NOFPU-NOT: .eabi_attribute 19 895 ;; Despite there being no FPU, we chose to flush to zero preserving 896 ;; sign. This matches what the hardware would do for this architecture 897 ;; revision. 898 ; CORTEX-A17-NOFPU-FAST: .eabi_attribute 20, 2 899 ; CORTEX-A17-NOFPU-FAST-NOT: .eabi_attribute 21 900 ; CORTEX-A17-NOFPU-FAST-NOT: .eabi_attribute 22 901 ; CORTEX-A17-NOFPU-FAST: .eabi_attribute 23, 1 902 903 ; Test flags -enable-no-trapping-fp-math and -denormal-fp-math: 904 ; NO-TRAPPING-MATH: .eabi_attribute 21, 0 905 ; DENORMAL-IEEE: .eabi_attribute 20, 1 906 ; DENORMAL-PRESERVE-SIGN: .eabi_attribute 20, 2 907 ; DENORMAL-POSITIVE-ZERO: .eabi_attribute 20, 0 908 909 ; CORTEX-M0: .cpu cortex-m0 910 ; CORTEX-M0: .eabi_attribute 6, 12 911 ; CORTEX-M0: .eabi_attribute 7, 77 912 ; CORTEX-M0: .eabi_attribute 8, 0 913 ; CORTEX-M0: .eabi_attribute 9, 1 914 ; CORTEX-M0-NOT: .eabi_attribute 27 915 ; CORTEX-M0-NOT: .eabi_attribute 36 916 ; CORTEX-M0: .eabi_attribute 34, 0 917 ; CORTEX-M0-NOT: .eabi_attribute 42 918 ; CORTEX-M0-NOT: .eabi_attribute 44 919 ; CORTEX-M0-NOT: .eabi_attribute 68 920 ; CORTEX-M0-NOT: .eabi_attribute 19 921 ;; We default to IEEE 754 compliance 922 ; CORTEX-M0: .eabi_attribute 20, 1 923 ; CORTEX-M0: .eabi_attribute 21, 1 924 ; CORTEX-M0-NOT: .eabi_attribute 22 925 ; CORTEX-M0: .eabi_attribute 23, 3 926 ; CORTEX-M0: .eabi_attribute 24, 1 927 ; CORTEX-M0: .eabi_attribute 25, 1 928 ; CORTEX-M0-NOT: .eabi_attribute 28 929 ; CORTEX-M0: .eabi_attribute 38, 1 930 931 ; CORTEX-M0-FAST-NOT: .eabi_attribute 19 932 ;; Despite the M0 CPU having no FPU in this scenario, we chose to 933 ;; flush to positive zero here. There's no hardware support doing 934 ;; this, but the fast maths software library might and such behaviour 935 ;; would match hardware support on this architecture revision if it 936 ;; existed. 937 ; CORTEX-M0-FAST-NOT: .eabi_attribute 20 938 ; CORTEX-M0-FAST-NOT: .eabi_attribute 21 939 ; CORTEX-M0-FAST-NOT: .eabi_attribute 22 940 ; CORTEX-M0-FAST: .eabi_attribute 23, 1 941 942 ; CORTEX-M0PLUS: .cpu cortex-m0plus 943 ; CORTEX-M0PLUS: .eabi_attribute 6, 12 944 ; CORTEX-M0PLUS: .eabi_attribute 7, 77 945 ; CORTEX-M0PLUS: .eabi_attribute 8, 0 946 ; CORTEX-M0PLUS: .eabi_attribute 9, 1 947 ; CORTEX-M0PLUS-NOT: .eabi_attribute 27 948 ; CORTEX-M0PLUS-NOT: .eabi_attribute 36 949 ; CORTEX-M0PLUS-NOT: .eabi_attribute 42 950 ; CORTEX-M0PLUS-NOT: .eabi_attribute 44 951 ; CORTEX-M0PLUS-NOT: .eabi_attribute 68 952 ; CORTEX-M0PLUS-NOT: .eabi_attribute 19 953 ;; We default to IEEE 754 compliance 954 ; CORTEX-M0PLUS: .eabi_attribute 20, 1 955 ; CORTEX-M0PLUS: .eabi_attribute 21, 1 956 ; CORTEX-M0PLUS-NOT: .eabi_attribute 22 957 ; CORTEX-M0PLUS: .eabi_attribute 23, 3 958 ; CORTEX-M0PLUS: .eabi_attribute 24, 1 959 ; CORTEX-M0PLUS: .eabi_attribute 25, 1 960 ; CORTEX-M0PLUS-NOT: .eabi_attribute 28 961 ; CORTEX-M0PLUS: .eabi_attribute 38, 1 962 963 ; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 19 964 ;; Despite the M0+ CPU having no FPU in this scenario, we chose to 965 ;; flush to positive zero here. There's no hardware support doing 966 ;; this, but the fast maths software library might and such behaviour 967 ;; would match hardware support on this architecture revision if it 968 ;; existed. 969 ; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 20 970 ; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 21 971 ; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 22 972 ; CORTEX-M0PLUS-FAST: .eabi_attribute 23, 1 973 974 ; CORTEX-M1: .cpu cortex-m1 975 ; CORTEX-M1: .eabi_attribute 6, 12 976 ; CORTEX-M1: .eabi_attribute 7, 77 977 ; CORTEX-M1: .eabi_attribute 8, 0 978 ; CORTEX-M1: .eabi_attribute 9, 1 979 ; CORTEX-M1-NOT: .eabi_attribute 27 980 ; CORTEX-M1-NOT: .eabi_attribute 36 981 ; CORTEX-M1-NOT: .eabi_attribute 42 982 ; CORTEX-M1-NOT: .eabi_attribute 44 983 ; CORTEX-M1-NOT: .eabi_attribute 68 984 ; CORTEX-M1-NOT: .eabi_attribute 19 985 ;; We default to IEEE 754 compliance 986 ; CORTEX-M1: .eabi_attribute 20, 1 987 ; CORTEX-M1: .eabi_attribute 21, 1 988 ; CORTEX-M1-NOT: .eabi_attribute 22 989 ; CORTEX-M1: .eabi_attribute 23, 3 990 ; CORTEX-M1: .eabi_attribute 24, 1 991 ; CORTEX-M1: .eabi_attribute 25, 1 992 ; CORTEX-M1-NOT: .eabi_attribute 28 993 ; CORTEX-M1: .eabi_attribute 38, 1 994 995 ; CORTEX-M1-FAST-NOT: .eabi_attribute 19 996 ;; Despite the M1 CPU having no FPU in this scenario, we chose to 997 ;; flush to positive zero here. There's no hardware support doing 998 ;; this, but the fast maths software library might and such behaviour 999 ;; would match hardware support on this architecture revision if it 1000 ;; existed. 1001 ; CORTEX-M1-FAST-NOT: .eabi_attribute 20 1002 ; CORTEX-M1-FAST-NOT: .eabi_attribute 21 1003 ; CORTEX-M1-FAST-NOT: .eabi_attribute 22 1004 ; CORTEX-M1-FAST: .eabi_attribute 23, 1 1005 1006 ; SC000: .cpu sc000 1007 ; SC000: .eabi_attribute 6, 12 1008 ; SC000: .eabi_attribute 7, 77 1009 ; SC000: .eabi_attribute 8, 0 1010 ; SC000: .eabi_attribute 9, 1 1011 ; SC000-NOT: .eabi_attribute 27 1012 ; SC000-NOT: .eabi_attribute 42 1013 ; SC000-NOT: .eabi_attribute 44 1014 ; SC000-NOT: .eabi_attribute 68 1015 ; SC000-NOT: .eabi_attribute 19 1016 ;; We default to IEEE 754 compliance 1017 ; SC000: .eabi_attribute 20, 1 1018 ; SC000: .eabi_attribute 21, 1 1019 ; SC000-NOT: .eabi_attribute 22 1020 ; SC000: .eabi_attribute 23, 3 1021 ; SC000: .eabi_attribute 24, 1 1022 ; SC000: .eabi_attribute 25, 1 1023 ; SC000-NOT: .eabi_attribute 28 1024 ; SC000: .eabi_attribute 38, 1 1025 1026 ; SC000-FAST-NOT: .eabi_attribute 19 1027 ;; Despite the SC000 CPU having no FPU in this scenario, we chose to 1028 ;; flush to positive zero here. There's no hardware support doing 1029 ;; this, but the fast maths software library might and such behaviour 1030 ;; would match hardware support on this architecture revision if it 1031 ;; existed. 1032 ; SC000-FAST-NOT: .eabi_attribute 20 1033 ; SC000-FAST-NOT: .eabi_attribute 21 1034 ; SC000-FAST-NOT: .eabi_attribute 22 1035 ; SC000-FAST: .eabi_attribute 23, 1 1036 1037 ; CORTEX-M3: .cpu cortex-m3 1038 ; CORTEX-M3: .eabi_attribute 6, 10 1039 ; CORTEX-M3: .eabi_attribute 7, 77 1040 ; CORTEX-M3: .eabi_attribute 8, 0 1041 ; CORTEX-M3: .eabi_attribute 9, 2 1042 ; CORTEX-M3-NOT: .eabi_attribute 27 1043 ; CORTEX-M3-NOT: .eabi_attribute 36 1044 ; CORTEX-M3-NOT: .eabi_attribute 42 1045 ; CORTEX-M3-NOT: .eabi_attribute 44 1046 ; CORTEX-M3-NOT: .eabi_attribute 68 1047 ; CORTEX-M3-NOT: .eabi_attribute 19 1048 ;; We default to IEEE 754 compliance 1049 ; CORTEX-M3: .eabi_attribute 20, 1 1050 ; CORTEX-M3: .eabi_attribute 21, 1 1051 ; CORTEX-M3-NOT: .eabi_attribute 22 1052 ; CORTEX-M3: .eabi_attribute 23, 3 1053 ; CORTEX-M3: .eabi_attribute 24, 1 1054 ; CORTEX-M3: .eabi_attribute 25, 1 1055 ; CORTEX-M3-NOT: .eabi_attribute 28 1056 ; CORTEX-M3: .eabi_attribute 38, 1 1057 1058 ; CORTEX-M3-FAST-NOT: .eabi_attribute 19 1059 ;; Despite there being no FPU, we chose to flush to zero preserving 1060 ;; sign. This matches what the hardware would do for this architecture 1061 ;; revision. 1062 ; CORTEX-M3-FAST: .eabi_attribute 20, 2 1063 ; CORTEX-M3-FAST-NOT: .eabi_attribute 21 1064 ; CORTEX-M3-FAST-NOT: .eabi_attribute 22 1065 ; CORTEX-M3-FAST: .eabi_attribute 23, 1 1066 1067 ; SC300: .cpu sc300 1068 ; SC300: .eabi_attribute 6, 10 1069 ; SC300: .eabi_attribute 7, 77 1070 ; SC300: .eabi_attribute 8, 0 1071 ; SC300: .eabi_attribute 9, 2 1072 ; SC300-NOT: .eabi_attribute 27 1073 ; SC300-NOT: .eabi_attribute 36 1074 ; SC300-NOT: .eabi_attribute 42 1075 ; SC300-NOT: .eabi_attribute 44 1076 ; SC300-NOT: .eabi_attribute 68 1077 ; SC300-NOT: .eabi_attribute 19 1078 ;; We default to IEEE 754 compliance 1079 ; SC300: .eabi_attribute 20, 1 1080 ; SC300: .eabi_attribute 21, 1 1081 ; SC300-NOT: .eabi_attribute 22 1082 ; SC300: .eabi_attribute 23, 3 1083 ; SC300: .eabi_attribute 24, 1 1084 ; SC300: .eabi_attribute 25, 1 1085 ; SC300-NOT: .eabi_attribute 28 1086 ; SC300: .eabi_attribute 38, 1 1087 1088 ; SC300-FAST-NOT: .eabi_attribute 19 1089 ;; Despite there being no FPU, we chose to flush to zero preserving 1090 ;; sign. This matches what the hardware would do for this architecture 1091 ;; revision. 1092 ; SC300-FAST: .eabi_attribute 20, 2 1093 ; SC300-FAST-NOT: .eabi_attribute 21 1094 ; SC300-FAST-NOT: .eabi_attribute 22 1095 ; SC300-FAST: .eabi_attribute 23, 1 1096 1097 ; CORTEX-M4-SOFT: .cpu cortex-m4 1098 ; CORTEX-M4-SOFT: .eabi_attribute 6, 13 1099 ; CORTEX-M4-SOFT: .eabi_attribute 7, 77 1100 ; CORTEX-M4-SOFT: .eabi_attribute 8, 0 1101 ; CORTEX-M4-SOFT: .eabi_attribute 9, 2 1102 ; CORTEX-M4-SOFT: .fpu fpv4-sp-d16 1103 ; CORTEX-M4-SOFT: .eabi_attribute 27, 1 1104 ; CORTEX-M4-SOFT: .eabi_attribute 36, 1 1105 ; CORTEX-M4-SOFT-NOT: .eabi_attribute 42 1106 ; CORTEX-M4-SOFT-NOT: .eabi_attribute 44 1107 ; CORTEX-M4-SOFT-NOT: .eabi_attribute 68 1108 ; CORTEX-M4-SOFT-NOT: .eabi_attribute 19 1109 ;; We default to IEEE 754 compliance 1110 ; CORTEX-M4-SOFT: .eabi_attribute 20, 1 1111 ; CORTEX-M4-SOFT: .eabi_attribute 21, 1 1112 ; CORTEX-M4-SOFT-NOT: .eabi_attribute 22 1113 ; CORTEX-M4-SOFT: .eabi_attribute 23, 3 1114 ; CORTEX-M4-SOFT: .eabi_attribute 24, 1 1115 ; CORTEX-M4-SOFT: .eabi_attribute 25, 1 1116 ; CORTEX-M4-SOFT-NOT: .eabi_attribute 28 1117 ; CORTEX-M4-SOFT: .eabi_attribute 38, 1 1118 1119 ; CORTEX-M4-SOFT-FAST-NOT: .eabi_attribute 19 1120 ;; The M4 defaults to a VFPv4 FPU, so it flushes preserving the sign when 1121 ;; -ffast-math is specified. 1122 ; CORTEX-M4-SOFT-FAST: .eabi_attribute 20, 2 1123 ; CORTEX-M4-SOFT-FAST-NOT: .eabi_attribute 21 1124 ; CORTEX-M4-SOFT-FAST-NOT: .eabi_attribute 22 1125 ; CORTEX-M4-SOFT-FAST: .eabi_attribute 23, 1 1126 1127 ; CORTEX-M4-HARD: .cpu cortex-m4 1128 ; CORTEX-M4-HARD: .eabi_attribute 6, 13 1129 ; CORTEX-M4-HARD: .eabi_attribute 7, 77 1130 ; CORTEX-M4-HARD: .eabi_attribute 8, 0 1131 ; CORTEX-M4-HARD: .eabi_attribute 9, 2 1132 ; CORTEX-M4-HARD: .fpu fpv4-sp-d16 1133 ; CORTEX-M4-HARD: .eabi_attribute 27, 1 1134 ; CORTEX-M4-HARD: .eabi_attribute 36, 1 1135 ; CORTEX-M4-HARD-NOT: .eabi_attribute 42 1136 ; CORTEX-M4-HARD-NOT: .eabi_attribute 44 1137 ; CORTEX-M4-HARD-NOT: .eabi_attribute 68 1138 ; CORTEX-M4-HARD-NOT: .eabi_attribute 19 1139 ;; We default to IEEE 754 compliance 1140 ; CORTEX-M4-HARD: .eabi_attribute 20, 1 1141 ; CORTEX-M4-HARD: .eabi_attribute 21, 1 1142 ; CORTEX-M4-HARD-NOT: .eabi_attribute 22 1143 ; CORTEX-M4-HARD: .eabi_attribute 23, 3 1144 ; CORTEX-M4-HARD: .eabi_attribute 24, 1 1145 ; CORTEX-M4-HARD: .eabi_attribute 25, 1 1146 ; CORTEX-M4-HARD: .eabi_attribute 28, 1 1147 ; CORTEX-M4-HARD: .eabi_attribute 38, 1 1148 1149 ; CORTEX-M4-HARD-FAST-NOT: .eabi_attribute 19 1150 ;; The M4 defaults to a VFPv4 FPU, so it flushes preserving the sign when 1151 ;; -ffast-math is specified. 1152 ; CORTEX-M4-HARD-FAST: .eabi_attribute 20, 2 1153 ; CORTEX-M4-HARD-FAST-NOT: .eabi_attribute 21 1154 ; CORTEX-M4-HARD-FAST-NOT: .eabi_attribute 22 1155 ; CORTEX-M4-HARD-FAST: .eabi_attribute 23, 1 1156 1157 ; CORTEX-M7: .cpu cortex-m7 1158 ; CORTEX-M7: .eabi_attribute 6, 13 1159 ; CORTEX-M7: .eabi_attribute 7, 77 1160 ; CORTEX-M7: .eabi_attribute 8, 0 1161 ; CORTEX-M7: .eabi_attribute 9, 2 1162 ; CORTEX-M7-SOFT-NOT: .fpu 1163 ; CORTEX-M7-SINGLE: .fpu fpv5-sp-d16 1164 ; CORTEX-M7-DOUBLE: .fpu fpv5-d16 1165 ; CORTEX-M7-SOFT-NOT: .eabi_attribute 27 1166 ; CORTEX-M7-SINGLE: .eabi_attribute 27, 1 1167 ; CORTEX-M7-DOUBLE-NOT: .eabi_attribute 27 1168 ; CORTEX-M7: .eabi_attribute 36, 1 1169 ; CORTEX-M7-NOT: .eabi_attribute 44 1170 ; CORTEX-M7: .eabi_attribute 17, 1 1171 ; CORTEX-M7-NOT: .eabi_attribute 19 1172 ;; We default to IEEE 754 compliance 1173 ; CORTEX-M7: .eabi_attribute 20, 1 1174 ; CORTEX-M7: .eabi_attribute 21, 1 1175 ; CORTEX-M7-NOT: .eabi_attribute 22 1176 ; CORTEX-M7: .eabi_attribute 23, 3 1177 ; CORTEX-M7: .eabi_attribute 24, 1 1178 ; CORTEX-M7: .eabi_attribute 25, 1 1179 ; CORTEX-M7: .eabi_attribute 38, 1 1180 ; CORTEX-M7: .eabi_attribute 14, 0 1181 1182 ; CORTEX-M7-NOFPU-FAST-NOT: .eabi_attribute 19 1183 ;; The M7 has the ARMv8 FP unit, which always flushes preserving sign. 1184 ; CORTEX-M7-FAST: .eabi_attribute 20, 2 1185 ;; Despite there being no FPU, we chose to flush to zero preserving 1186 ;; sign. This matches what the hardware would do for this architecture 1187 ;; revision. 1188 ; CORTEX-M7-NOFPU-FAST: .eabi_attribute 20, 2 1189 ; CORTEX-M7-NOFPU-FAST-NOT: .eabi_attribute 21 1190 ; CORTEX-M7-NOFPU-FAST-NOT: .eabi_attribute 22 1191 ; CORTEX-M7-NOFPU-FAST: .eabi_attribute 23, 1 1192 1193 ; CORTEX-R4: .cpu cortex-r4 1194 ; CORTEX-R4: .eabi_attribute 6, 10 1195 ; CORTEX-R4: .eabi_attribute 7, 82 1196 ; CORTEX-R4: .eabi_attribute 8, 1 1197 ; CORTEX-R4: .eabi_attribute 9, 2 1198 ; CORTEX-R4-NOT: .fpu vfpv3-d16 1199 ; CORTEX-R4-NOT: .eabi_attribute 36 1200 ; CORTEX-R4-NOT: .eabi_attribute 42 1201 ; CORTEX-R4-NOT: .eabi_attribute 44 1202 ; CORTEX-R4-NOT: .eabi_attribute 68 1203 ; CORTEX-R4-NOT: .eabi_attribute 19 1204 ;; We default to IEEE 754 compliance 1205 ; CORTEX-R4: .eabi_attribute 20, 1 1206 ; CORTEX-R4: .eabi_attribute 21, 1 1207 ; CORTEX-R4-NOT: .eabi_attribute 22 1208 ; CORTEX-R4: .eabi_attribute 23, 3 1209 ; CORTEX-R4: .eabi_attribute 24, 1 1210 ; CORTEX-R4: .eabi_attribute 25, 1 1211 ; CORTEX-R4-NOT: .eabi_attribute 28 1212 ; CORTEX-R4: .eabi_attribute 38, 1 1213 1214 ; CORTEX-R4F: .cpu cortex-r4f 1215 ; CORTEX-R4F: .eabi_attribute 6, 10 1216 ; CORTEX-R4F: .eabi_attribute 7, 82 1217 ; CORTEX-R4F: .eabi_attribute 8, 1 1218 ; CORTEX-R4F: .eabi_attribute 9, 2 1219 ; CORTEX-R4F: .fpu vfpv3-d16 1220 ; CORTEX-R4F-NOT: .eabi_attribute 27, 1 1221 ; CORTEX-R4F-NOT: .eabi_attribute 36 1222 ; CORTEX-R4F-NOT: .eabi_attribute 42 1223 ; CORTEX-R4F-NOT: .eabi_attribute 44 1224 ; CORTEX-R4F-NOT: .eabi_attribute 68 1225 ; CORTEX-R4F-NOT: .eabi_attribute 19 1226 ;; We default to IEEE 754 compliance 1227 ; CORTEX-R4F: .eabi_attribute 20, 1 1228 ; CORTEX-R4F: .eabi_attribute 21, 1 1229 ; CORTEX-R4F-NOT: .eabi_attribute 22 1230 ; CORTEX-R4F: .eabi_attribute 23, 3 1231 ; CORTEX-R4F: .eabi_attribute 24, 1 1232 ; CORTEX-R4F: .eabi_attribute 25, 1 1233 ; CORTEX-R4F-NOT: .eabi_attribute 28 1234 ; CORTEX-R4F: .eabi_attribute 38, 1 1235 1236 ; CORTEX-R5: .cpu cortex-r5 1237 ; CORTEX-R5: .eabi_attribute 6, 10 1238 ; CORTEX-R5: .eabi_attribute 7, 82 1239 ; CORTEX-R5: .eabi_attribute 8, 1 1240 ; CORTEX-R5: .eabi_attribute 9, 2 1241 ; CORTEX-R5: .fpu vfpv3-d16 1242 ; CORTEX-R5-NOT: .eabi_attribute 27, 1 1243 ; CORTEX-R5-NOT: .eabi_attribute 36 1244 ; CORTEX-R5: .eabi_attribute 44, 2 1245 ; CORTEX-R5-NOT: .eabi_attribute 42 1246 ; CORTEX-R5-NOT: .eabi_attribute 68 1247 ; CORTEX-R5-NOT: .eabi_attribute 19 1248 ;; We default to IEEE 754 compliance 1249 ; CORTEX-R5: .eabi_attribute 20, 1 1250 ; CORTEX-R5: .eabi_attribute 21, 1 1251 ; CORTEX-R5-NOT: .eabi_attribute 22 1252 ; CORTEX-R5: .eabi_attribute 23, 3 1253 ; CORTEX-R5: .eabi_attribute 24, 1 1254 ; CORTEX-R5: .eabi_attribute 25, 1 1255 ; CORTEX-R5-NOT: .eabi_attribute 28 1256 ; CORTEX-R5: .eabi_attribute 38, 1 1257 1258 ; CORTEX-R5-FAST-NOT: .eabi_attribute 19 1259 ;; The R5 has the VFPv3 FP unit, which always flushes preserving sign. 1260 ; CORTEX-R5-FAST: .eabi_attribute 20, 2 1261 ; CORTEX-R5-FAST-NOT: .eabi_attribute 21 1262 ; CORTEX-R5-FAST-NOT: .eabi_attribute 22 1263 ; CORTEX-R5-FAST: .eabi_attribute 23, 1 1264 1265 ; CORTEX-R7: .cpu cortex-r7 1266 ; CORTEX-R7: .eabi_attribute 6, 10 1267 ; CORTEX-R7: .eabi_attribute 7, 82 1268 ; CORTEX-R7: .eabi_attribute 8, 1 1269 ; CORTEX-R7: .eabi_attribute 9, 2 1270 ; CORTEX-R7: .fpu vfpv3-d16-fp16 1271 ; CORTEX-R7: .eabi_attribute 36, 1 1272 ; CORTEX-R7: .eabi_attribute 42, 1 1273 ; CORTEX-R7: .eabi_attribute 44, 2 1274 ; CORTEX-R7-NOT: .eabi_attribute 68 1275 ; CORTEX-R7-NOT: .eabi_attribute 19 1276 ;; We default to IEEE 754 compliance 1277 ; CORTEX-R7: .eabi_attribute 20, 1 1278 ; CORTEX-R7: .eabi_attribute 21, 1 1279 ; CORTEX-R7-NOT: .eabi_attribute 22 1280 ; CORTEX-R7: .eabi_attribute 23, 3 1281 ; CORTEX-R7: .eabi_attribute 24, 1 1282 ; CORTEX-R7: .eabi_attribute 25, 1 1283 ; CORTEX-R7-NOT: .eabi_attribute 28 1284 ; CORTEX-R7: .eabi_attribute 38, 1 1285 1286 ; CORTEX-R7-FAST-NOT: .eabi_attribute 19 1287 ;; The R7 has the VFPv3 FP unit, which always flushes preserving sign. 1288 ; CORTEX-R7-FAST: .eabi_attribute 20, 2 1289 ; CORTEX-R7-FAST-NOT: .eabi_attribute 21 1290 ; CORTEX-R7-FAST-NOT: .eabi_attribute 22 1291 ; CORTEX-R7-FAST: .eabi_attribute 23, 1 1292 1293 ; CORTEX-R8: .cpu cortex-r8 1294 ; CORTEX-R8: .eabi_attribute 6, 10 1295 ; CORTEX-R8: .eabi_attribute 7, 82 1296 ; CORTEX-R8: .eabi_attribute 8, 1 1297 ; CORTEX-R8: .eabi_attribute 9, 2 1298 ; CORTEX-R8: .fpu vfpv3-d16-fp16 1299 ; CORTEX-R8: .eabi_attribute 36, 1 1300 ; CORTEX-R8: .eabi_attribute 42, 1 1301 ; CORTEX-R8: .eabi_attribute 44, 2 1302 ; CORTEX-R8-NOT: .eabi_attribute 68 1303 ; CORTEX-R8-NOT: .eabi_attribute 19 1304 ;; We default to IEEE 754 compliance 1305 ; CORTEX-R8: .eabi_attribute 20, 1 1306 ; CORTEX-R8: .eabi_attribute 21, 1 1307 ; CORTEX-R8-NOT: .eabi_attribute 22 1308 ; CORTEX-R8: .eabi_attribute 23, 3 1309 ; CORTEX-R8: .eabi_attribute 24, 1 1310 ; CORTEX-R8: .eabi_attribute 25, 1 1311 ; CORTEX-R8-NOT: .eabi_attribute 28 1312 ; CORTEX-R8: .eabi_attribute 38, 1 1313 1314 ; CORTEX-R8-FAST-NOT: .eabi_attribute 19 1315 ;; The R8 has the VFPv3 FP unit, which always flushes preserving sign. 1316 ; CORTEX-R8-FAST: .eabi_attribute 20, 2 1317 ; CORTEX-R8-FAST-NOT: .eabi_attribute 21 1318 ; CORTEX-R8-FAST-NOT: .eabi_attribute 22 1319 ; CORTEX-R8-FAST: .eabi_attribute 23, 1 1320 1321 ; CORTEX-A32: .cpu cortex-a32 1322 ; CORTEX-A32: .eabi_attribute 6, 14 1323 ; CORTEX-A32: .eabi_attribute 7, 65 1324 ; CORTEX-A32: .eabi_attribute 8, 1 1325 ; CORTEX-A32: .eabi_attribute 9, 2 1326 ; CORTEX-A32: .fpu crypto-neon-fp-armv8 1327 ; CORTEX-A32: .eabi_attribute 12, 3 1328 ; CORTEX-A32-NOT: .eabi_attribute 27 1329 ; CORTEX-A32: .eabi_attribute 36, 1 1330 ; CORTEX-A32: .eabi_attribute 42, 1 1331 ; CORTEX-A32-NOT: .eabi_attribute 44 1332 ; CORTEX-A32: .eabi_attribute 68, 3 1333 ; CORTEX-A32-NOT: .eabi_attribute 19 1334 ;; We default to IEEE 754 compliance 1335 ; CORTEX-A32: .eabi_attribute 20, 1 1336 ; CORTEX-A32: .eabi_attribute 21, 1 1337 ; CORTEX-A32-NOT: .eabi_attribute 22 1338 ; CORTEX-A32: .eabi_attribute 23, 3 1339 ; CORTEX-A32: .eabi_attribute 24, 1 1340 ; CORTEX-A32: .eabi_attribute 25, 1 1341 ; CORTEX-A32-NOT: .eabi_attribute 28 1342 ; CORTEX-A32: .eabi_attribute 38, 1 1343 1344 ; CORTEX-A32-FAST-NOT: .eabi_attribute 19 1345 ;; The A32 has the ARMv8 FP unit, which always flushes preserving sign. 1346 ; CORTEX-A32-FAST: .eabi_attribute 20, 2 1347 ; CORTEX-A32-FAST-NOT: .eabi_attribute 21 1348 ; CORTEX-A32-FAST-NOT: .eabi_attribute 22 1349 ; CORTEX-A32-FAST: .eabi_attribute 23, 1 1350 1351 ; CORTEX-M23: .cpu cortex-m23 1352 ; CORTEX-M23: .eabi_attribute 6, 16 1353 ; CORTEX-M23: .eabi_attribute 7, 77 1354 ; CORTEX-M23: .eabi_attribute 8, 0 1355 ; CORTEX-M23: .eabi_attribute 9, 3 1356 ; CORTEX-M23-NOT: .eabi_attribute 27 1357 ; CORTEX-M23: .eabi_attribute 34, 0 1358 ; CORTEX-M23-NOT: .eabi_attribute 44 1359 ; CORTEX-M23: .eabi_attribute 17, 1 1360 ;; We default to IEEE 754 compliance 1361 ; CORTEX-M23-NOT: .eabi_attribute 19 1362 ; CORTEX-M23: .eabi_attribute 20, 1 1363 ; CORTEX-M23: .eabi_attribute 21, 1 1364 ; CORTEX-M23: .eabi_attribute 23, 3 1365 ; CORTEX-M23: .eabi_attribute 24, 1 1366 ; CORTEX-M23-NOT: .eabi_attribute 28 1367 ; CORTEX-M23: .eabi_attribute 25, 1 1368 ; CORTEX-M23: .eabi_attribute 38, 1 1369 ; CORTEX-M23: .eabi_attribute 14, 0 1370 1371 ; CORTEX-M33: .cpu cortex-m33 1372 ; CORTEX-M33: .eabi_attribute 6, 17 1373 ; CORTEX-M33: .eabi_attribute 7, 77 1374 ; CORTEX-M33: .eabi_attribute 8, 0 1375 ; CORTEX-M33: .eabi_attribute 9, 3 1376 ; CORTEX-M33: .fpu fpv5-sp-d16 1377 ; CORTEX-M33: .eabi_attribute 27, 1 1378 ; CORTEX-M33: .eabi_attribute 36, 1 1379 ; CORTEX-M33-NOT: .eabi_attribute 44 1380 ; CORTEX-M33: .eabi_attribute 46, 1 1381 ; CORTEX-M33: .eabi_attribute 34, 1 1382 ; CORTEX-M33: .eabi_attribute 17, 1 1383 ;; We default to IEEE 754 compliance 1384 ; CORTEX-M23-NOT: .eabi_attribute 19 1385 ; CORTEX-M33: .eabi_attribute 20, 1 1386 ; CORTEX-M33: .eabi_attribute 21, 1 1387 ; CORTEX-M33: .eabi_attribute 23, 3 1388 ; CORTEX-M33: .eabi_attribute 24, 1 1389 ; CORTEX-M33: .eabi_attribute 25, 1 1390 ; CORTEX-M33-NOT: .eabi_attribute 28 1391 ; CORTEX-M33: .eabi_attribute 38, 1 1392 ; CORTEX-M33: .eabi_attribute 14, 0 1393 1394 ; CORTEX-M33-FAST-NOT: .eabi_attribute 19 1395 ; CORTEX-M33-FAST: .eabi_attribute 20, 2 1396 ; CORTEX-M33-FAST-NOT: .eabi_attribute 21 1397 ; CORTEX-M33-FAST-NOT: .eabi_attribute 22 1398 ; CORTEX-M33-FAST: .eabi_attribute 23, 1 1399 1400 ; CORTEX-A35: .cpu cortex-a35 1401 ; CORTEX-A35: .eabi_attribute 6, 14 1402 ; CORTEX-A35: .eabi_attribute 7, 65 1403 ; CORTEX-A35: .eabi_attribute 8, 1 1404 ; CORTEX-A35: .eabi_attribute 9, 2 1405 ; CORTEX-A35: .fpu crypto-neon-fp-armv8 1406 ; CORTEX-A35: .eabi_attribute 12, 3 1407 ; CORTEX-A35-NOT: .eabi_attribute 27 1408 ; CORTEX-A35: .eabi_attribute 36, 1 1409 ; CORTEX-A35: .eabi_attribute 42, 1 1410 ; CORTEX-A35-NOT: .eabi_attribute 44 1411 ; CORTEX-A35: .eabi_attribute 68, 3 1412 ; CORTEX-A35-NOT: .eabi_attribute 19 1413 ;; We default to IEEE 754 compliance 1414 ; CORTEX-A35: .eabi_attribute 20, 1 1415 ; CORTEX-A35: .eabi_attribute 21, 1 1416 ; CORTEX-A35-NOT: .eabi_attribute 22 1417 ; CORTEX-A35: .eabi_attribute 23, 3 1418 ; CORTEX-A35: .eabi_attribute 24, 1 1419 ; CORTEX-A35: .eabi_attribute 25, 1 1420 ; CORTEX-A35-NOT: .eabi_attribute 28 1421 ; CORTEX-A35: .eabi_attribute 38, 1 1422 1423 ; CORTEX-A35-FAST-NOT: .eabi_attribute 19 1424 ;; The A35 has the ARMv8 FP unit, which always flushes preserving sign. 1425 ; CORTEX-A35-FAST: .eabi_attribute 20, 2 1426 ; CORTEX-A35-FAST-NOT: .eabi_attribute 21 1427 ; CORTEX-A35-FAST-NOT: .eabi_attribute 22 1428 ; CORTEX-A35-FAST: .eabi_attribute 23, 1 1429 1430 ; CORTEX-A53: .cpu cortex-a53 1431 ; CORTEX-A53: .eabi_attribute 6, 14 1432 ; CORTEX-A53: .eabi_attribute 7, 65 1433 ; CORTEX-A53: .eabi_attribute 8, 1 1434 ; CORTEX-A53: .eabi_attribute 9, 2 1435 ; CORTEX-A53: .fpu crypto-neon-fp-armv8 1436 ; CORTEX-A53: .eabi_attribute 12, 3 1437 ; CORTEX-A53-NOT: .eabi_attribute 27 1438 ; CORTEX-A53: .eabi_attribute 36, 1 1439 ; CORTEX-A53: .eabi_attribute 42, 1 1440 ; CORTEX-A53-NOT: .eabi_attribute 44 1441 ; CORTEX-A53: .eabi_attribute 68, 3 1442 ; CORTEX-A53-NOT: .eabi_attribute 19 1443 ;; We default to IEEE 754 compliance 1444 ; CORTEX-A53: .eabi_attribute 20, 1 1445 ; CORTEX-A53: .eabi_attribute 21, 1 1446 ; CORTEX-A53-NOT: .eabi_attribute 22 1447 ; CORTEX-A53: .eabi_attribute 23, 3 1448 ; CORTEX-A53: .eabi_attribute 24, 1 1449 ; CORTEX-A53: .eabi_attribute 25, 1 1450 ; CORTEX-A53-NOT: .eabi_attribute 28 1451 ; CORTEX-A53: .eabi_attribute 38, 1 1452 1453 ; CORTEX-A53-FAST-NOT: .eabi_attribute 19 1454 ;; The A53 has the ARMv8 FP unit, which always flushes preserving sign. 1455 ; CORTEX-A53-FAST: .eabi_attribute 20, 2 1456 ; CORTEX-A53-FAST-NOT: .eabi_attribute 21 1457 ; CORTEX-A53-FAST-NOT: .eabi_attribute 22 1458 ; CORTEX-A53-FAST: .eabi_attribute 23, 1 1459 1460 ; CORTEX-A57: .cpu cortex-a57 1461 ; CORTEX-A57: .eabi_attribute 6, 14 1462 ; CORTEX-A57: .eabi_attribute 7, 65 1463 ; CORTEX-A57: .eabi_attribute 8, 1 1464 ; CORTEX-A57: .eabi_attribute 9, 2 1465 ; CORTEX-A57: .fpu crypto-neon-fp-armv8 1466 ; CORTEX-A57: .eabi_attribute 12, 3 1467 ; CORTEX-A57-NOT: .eabi_attribute 27 1468 ; CORTEX-A57: .eabi_attribute 36, 1 1469 ; CORTEX-A57: .eabi_attribute 42, 1 1470 ; CORTEX-A57-NOT: .eabi_attribute 44 1471 ; CORTEX-A57: .eabi_attribute 68, 3 1472 ; CORTEX-A57-NOT: .eabi_attribute 19 1473 ;; We default to IEEE 754 compliance 1474 ; CORTEX-A57: .eabi_attribute 20, 1 1475 ; CORTEX-A57: .eabi_attribute 21, 1 1476 ; CORTEX-A57-NOT: .eabi_attribute 22 1477 ; CORTEX-A57: .eabi_attribute 23, 3 1478 ; CORTEX-A57: .eabi_attribute 24, 1 1479 ; CORTEX-A57: .eabi_attribute 25, 1 1480 ; CORTEX-A57-NOT: .eabi_attribute 28 1481 ; CORTEX-A57: .eabi_attribute 38, 1 1482 1483 ; CORTEX-A57-FAST-NOT: .eabi_attribute 19 1484 ;; The A57 has the ARMv8 FP unit, which always flushes preserving sign. 1485 ; CORTEX-A57-FAST: .eabi_attribute 20, 2 1486 ; CORTEX-A57-FAST-NOT: .eabi_attribute 21 1487 ; CORTEX-A57-FAST-NOT: .eabi_attribute 22 1488 ; CORTEX-A57-FAST: .eabi_attribute 23, 1 1489 1490 ; CORTEX-A72: .cpu cortex-a72 1491 ; CORTEX-A72: .eabi_attribute 6, 14 1492 ; CORTEX-A72: .eabi_attribute 7, 65 1493 ; CORTEX-A72: .eabi_attribute 8, 1 1494 ; CORTEX-A72: .eabi_attribute 9, 2 1495 ; CORTEX-A72: .fpu crypto-neon-fp-armv8 1496 ; CORTEX-A72: .eabi_attribute 12, 3 1497 ; CORTEX-A72-NOT: .eabi_attribute 27 1498 ; CORTEX-A72: .eabi_attribute 36, 1 1499 ; CORTEX-A72: .eabi_attribute 42, 1 1500 ; CORTEX-A72-NOT: .eabi_attribute 44 1501 ; CORTEX-A72: .eabi_attribute 68, 3 1502 ; CORTEX-A72-NOT: .eabi_attribute 19 1503 ;; We default to IEEE 754 compliance 1504 ; CORTEX-A72: .eabi_attribute 20, 1 1505 ; CORTEX-A72: .eabi_attribute 21, 1 1506 ; CORTEX-A72-NOT: .eabi_attribute 22 1507 ; CORTEX-A72: .eabi_attribute 23, 3 1508 ; CORTEX-A72: .eabi_attribute 24, 1 1509 ; CORTEX-A72: .eabi_attribute 25, 1 1510 ; CORTEX-A72-NOT: .eabi_attribute 28 1511 ; CORTEX-A72: .eabi_attribute 38, 1 1512 1513 ; CORTEX-A72-FAST-NOT: .eabi_attribute 19 1514 ;; The A72 has the ARMv8 FP unit, which always flushes preserving sign. 1515 ; CORTEX-A72-FAST: .eabi_attribute 20, 2 1516 ; CORTEX-A72-FAST-NOT: .eabi_attribute 21 1517 ; CORTEX-A72-FAST-NOT: .eabi_attribute 22 1518 ; CORTEX-A72-FAST: .eabi_attribute 23, 1 1519 1520 ; CORTEX-A73: .cpu cortex-a73 1521 ; CORTEX-A73: .eabi_attribute 6, 14 1522 ; CORTEX-A73: .eabi_attribute 7, 65 1523 ; CORTEX-A73: .eabi_attribute 8, 1 1524 ; CORTEX-A73: .eabi_attribute 9, 2 1525 ; CORTEX-A73: .fpu crypto-neon-fp-armv8 1526 ; CORTEX-A73: .eabi_attribute 12, 3 1527 ; CORTEX-A73-NOT: .eabi_attribute 27 1528 ; CORTEX-A73: .eabi_attribute 36, 1 1529 ; CORTEX-A73: .eabi_attribute 42, 1 1530 ; CORTEX-A73-NOT: .eabi_attribute 44 1531 ; CORTEX-A73: .eabi_attribute 68, 3 1532 ; CORTEX-A73-NOT: .eabi_attribute 19 1533 ;; We default to IEEE 754 compliance 1534 ; CORTEX-A73: .eabi_attribute 20, 1 1535 ; CORTEX-A73: .eabi_attribute 21, 1 1536 ; CORTEX-A73-NOT: .eabi_attribute 22 1537 ; CORTEX-A73: .eabi_attribute 23, 3 1538 ; CORTEX-A73: .eabi_attribute 24, 1 1539 ; CORTEX-A73: .eabi_attribute 25, 1 1540 ; CORTEX-A73-NOT: .eabi_attribute 28 1541 ; CORTEX-A73: .eabi_attribute 38, 1 1542 ; CORTEX-A73: .eabi_attribute 14, 0 1543 1544 ; EXYNOS-M1: .cpu exynos-m1 1545 ; EXYNOS-M1: .eabi_attribute 6, 14 1546 ; EXYNOS-M1: .eabi_attribute 7, 65 1547 ; EXYNOS-M1: .eabi_attribute 8, 1 1548 ; EXYNOS-M1: .eabi_attribute 9, 2 1549 ; EXYNOS-M1: .fpu crypto-neon-fp-armv8 1550 ; EXYNOS-M1: .eabi_attribute 12, 3 1551 ; EXYNOS-M1-NOT: .eabi_attribute 27 1552 ; EXYNOS-M1: .eabi_attribute 36, 1 1553 ; EXYNOS-M1: .eabi_attribute 42, 1 1554 ; EXYNOS-M1-NOT: .eabi_attribute 44 1555 ; EXYNOS-M1: .eabi_attribute 68, 3 1556 ; EXYNOS-M1-NOT: .eabi_attribute 19 1557 ;; We default to IEEE 754 compliance 1558 ; EXYNOS-M1: .eabi_attribute 20, 1 1559 ; EXYNOS-M1: .eabi_attribute 21, 1 1560 ; EXYNOS-M1-NOT: .eabi_attribute 22 1561 ; EXYNOS-M1: .eabi_attribute 23, 3 1562 ; EXYNOS-M1: .eabi_attribute 24, 1 1563 ; EXYNOS-M1: .eabi_attribute 25, 1 1564 ; EXYNOS-M1-NOT: .eabi_attribute 28 1565 ; EXYNOS-M1: .eabi_attribute 38, 1 1566 1567 ; EXYNOS-M1-FAST-NOT: .eabi_attribute 19 1568 ;; The exynos-m1 has the ARMv8 FP unit, which always flushes preserving sign. 1569 ; EXYNOS-M1-FAST: .eabi_attribute 20, 2 1570 ; EXYNOS-M1-FAST-NOT: .eabi_attribute 21 1571 ; EXYNOS-M1-FAST-NOT: .eabi_attribute 22 1572 ; EXYNOS-M1-FAST: .eabi_attribute 23, 1 1573 1574 ; EXYNOS-M2: .cpu exynos-m2 1575 ; EXYNOS-M2: .eabi_attribute 6, 14 1576 ; EXYNOS-M2: .eabi_attribute 7, 65 1577 ; EXYNOS-M2: .eabi_attribute 8, 1 1578 ; EXYNOS-M2: .eabi_attribute 9, 2 1579 ; EXYNOS-M2: .fpu crypto-neon-fp-armv8 1580 ; EXYNOS-M2: .eabi_attribute 12, 3 1581 ; EXYNOS-M2-NOT: .eabi_attribute 27 1582 ; EXYNOS-M2: .eabi_attribute 36, 1 1583 ; EXYNOS-M2: .eabi_attribute 42, 1 1584 ; EXYNOS-M2-NOT: .eabi_attribute 44 1585 ; EXYNOS-M2: .eabi_attribute 68, 3 1586 ; EXYNOS-M2-NOT: .eabi_attribute 19 1587 ;; We default to IEEE 754 compliance 1588 ; EXYNOS-M2: .eabi_attribute 20, 1 1589 ; EXYNOS-M2: .eabi_attribute 21, 1 1590 ; EXYNOS-M2-NOT: .eabi_attribute 22 1591 ; EXYNOS-M2: .eabi_attribute 23, 3 1592 ; EXYNOS-M2: .eabi_attribute 24, 1 1593 ; EXYNOS-M2: .eabi_attribute 25, 1 1594 ; EXYNOS-M2-NOT: .eabi_attribute 28 1595 ; EXYNOS-M2: .eabi_attribute 38, 1 1596 1597 ; EXYNOS-M3: .cpu exynos-m3 1598 ; EXYNOS-M3: .eabi_attribute 6, 14 1599 ; EXYNOS-M3: .eabi_attribute 7, 65 1600 ; EXYNOS-M3: .eabi_attribute 8, 1 1601 ; EXYNOS-M3: .eabi_attribute 9, 2 1602 ; EXYNOS-M3: .fpu crypto-neon-fp-armv8 1603 ; EXYNOS-M3: .eabi_attribute 12, 3 1604 ; EXYNOS-M3-NOT: .eabi_attribute 27 1605 ; EXYNOS-M3: .eabi_attribute 36, 1 1606 ; EXYNOS-M3: .eabi_attribute 42, 1 1607 ; EXYNOS-M3-NOT: .eabi_attribute 44 1608 ; EXYNOS-M3: .eabi_attribute 68, 3 1609 ; EXYNOS-M3-NOT: .eabi_attribute 19 1610 ;; We default to IEEE 754 compliance 1611 ; EXYNOS-M3: .eabi_attribute 20, 1 1612 ; EXYNOS-M3: .eabi_attribute 21, 1 1613 ; EXYNOS-M3-NOT: .eabi_attribute 22 1614 ; EXYNOS-M3: .eabi_attribute 23, 3 1615 ; EXYNOS-M3: .eabi_attribute 24, 1 1616 ; EXYNOS-M3: .eabi_attribute 25, 1 1617 ; EXYNOS-M3-NOT: .eabi_attribute 28 1618 ; EXYNOS-M3: .eabi_attribute 38, 1 1619 1620 ; EXYNOS-M4: .cpu exynos-m4 1621 ; EXYNOS-M4: .eabi_attribute 6, 14 1622 ; EXYNOS-M4: .eabi_attribute 7, 65 1623 ; EXYNOS-M4: .eabi_attribute 8, 1 1624 ; EXYNOS-M4: .eabi_attribute 9, 2 1625 ; EXYNOS-M4: .fpu crypto-neon-fp-armv8 1626 ; EXYNOS-M4: .eabi_attribute 12, 3 1627 ; EXYNOS-M4-NOT: .eabi_attribute 27 1628 ; EXYNOS-M4: .eabi_attribute 36, 1 1629 ; EXYNOS-M4: .eabi_attribute 42, 1 1630 ; EXYNOS-M4-NOT: .eabi_attribute 44 1631 ; EXYNOS-M4: .eabi_attribute 68, 3 1632 ; EXYNOS-M4-NOT: .eabi_attribute 19 1633 ;; We default to IEEE 754 compliance 1634 ; EXYNOS-M4: .eabi_attribute 20, 1 1635 ; EXYNOS-M4: .eabi_attribute 21, 1 1636 ; EXYNOS-M4-NOT: .eabi_attribute 22 1637 ; EXYNOS-M4: .eabi_attribute 23, 3 1638 ; EXYNOS-M4: .eabi_attribute 24, 1 1639 ; EXYNOS-M4: .eabi_attribute 25, 1 1640 ; EXYNOS-M4-NOT: .eabi_attribute 28 1641 ; EXYNOS-M4: .eabi_attribute 38, 1 1642 1643 ; GENERIC-FPU-VFPV3-FP16: .fpu vfpv3-fp16 1644 ; GENERIC-FPU-VFPV3-D16-FP16: .fpu vfpv3-d16-fp16 1645 ; GENERIC-FPU-VFPV3XD: .fpu vfpv3xd 1646 ; GENERIC-FPU-VFPV3XD-FP16: .fpu vfpv3xd-fp16 1647 ; GENERIC-FPU-NEON-FP16: .fpu neon-fp16 1648 1649 ; GENERIC-ARMV8_1-A: .eabi_attribute 6, 14 1650 ; GENERIC-ARMV8_1-A: .eabi_attribute 7, 65 1651 ; GENERIC-ARMV8_1-A: .eabi_attribute 8, 1 1652 ; GENERIC-ARMV8_1-A: .eabi_attribute 9, 2 1653 ; GENERIC-ARMV8_1-A: .fpu crypto-neon-fp-armv8 1654 ; GENERIC-ARMV8_1-A: .eabi_attribute 12, 4 1655 ; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 27 1656 ; GENERIC-ARMV8_1-A: .eabi_attribute 36, 1 1657 ; GENERIC-ARMV8_1-A: .eabi_attribute 42, 1 1658 ; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 44 1659 ; GENERIC-ARMV8_1-A: .eabi_attribute 68, 3 1660 ; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 19 1661 ;; We default to IEEE 754 compliance 1662 ; GENERIC-ARMV8_1-A: .eabi_attribute 20, 1 1663 ; GENERIC-ARMV8_1-A: .eabi_attribute 21, 1 1664 ; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 22 1665 ; GENERIC-ARMV8_1-A: .eabi_attribute 23, 3 1666 ; GENERIC-ARMV8_1-A: .eabi_attribute 24, 1 1667 ; GENERIC-ARMV8_1-A: .eabi_attribute 25, 1 1668 ; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 28 1669 ; GENERIC-ARMV8_1-A: .eabi_attribute 38, 1 1670 1671 ; GENERIC-ARMV8_1-A-FAST-NOT: .eabi_attribute 19 1672 ;; GENERIC-ARMV8_1-A has the ARMv8 FP unit, which always flushes preserving sign. 1673 ; GENERIC-ARMV8_1-A-FAST: .eabi_attribute 20, 2 1674 ; GENERIC-ARMV8_1-A-FAST-NOT: .eabi_attribute 21 1675 ; GENERIC-ARMV8_1-A-FAST-NOT: .eabi_attribute 22 1676 ; GENERIC-ARMV8_1-A-FAST: .eabi_attribute 23, 1 1677 1678 ; RELOC-PIC: .eabi_attribute 15, 1 1679 ; RELOC-PIC: .eabi_attribute 16, 1 1680 ; RELOC-PIC: .eabi_attribute 17, 2 1681 ; RELOC-OTHER: .eabi_attribute 17, 1 1682 ; RELOC-ROPI-NOT: .eabi_attribute 15, 1683 ; RELOC-ROPI: .eabi_attribute 16, 1 1684 ; RELOC-ROPI: .eabi_attribute 17, 1 1685 ; RELOC-RWPI: .eabi_attribute 15, 2 1686 ; RELOC-RWPI-NOT: .eabi_attribute 16, 1687 ; RELOC-RWPI: .eabi_attribute 17, 1 1688 ; RELOC-ROPI-RWPI: .eabi_attribute 15, 2 1689 ; RELOC-ROPI-RWPI: .eabi_attribute 16, 1 1690 ; RELOC-ROPI-RWPI: .eabi_attribute 17, 1 1691 1692 ; PCS-R9-USE: .eabi_attribute 14, 0 1693 ; PCS-R9-RESERVE: .eabi_attribute 14, 3 1694 1695 ; ARMv8R: .eabi_attribute 67, "2.09" @ Tag_conformance 1696 ; ARMv8R: .eabi_attribute 6, 15 @ Tag_CPU_arch 1697 ; ARMv8R: .eabi_attribute 7, 82 @ Tag_CPU_arch_profile 1698 ; ARMv8R: .eabi_attribute 8, 1 @ Tag_ARM_ISA_use 1699 ; ARMv8R: .eabi_attribute 9, 2 @ Tag_THUMB_ISA_use 1700 ; ARMv8R-NOFPU-NOT: .fpu 1701 ; ARMv8R-NOFPU-NOT: .eabi_attribute 12 1702 ; ARMv8R-SP: .fpu fpv5-sp-d16 1703 ; ARMv8R-SP-NOT: .eabi_attribute 12 1704 ; ARMv8R-NEON: .fpu neon-fp-armv8 1705 ; ARMv8R-NEON: .eabi_attribute 12, 3 @ Tag_Advanced_SIMD_arch 1706 ; ARMv8R-NOFPU-NOT: .eabi_attribute 27 1707 ; ARMv8R-SP: .eabi_attribute 27, 1 @ Tag_ABI_HardFP_use 1708 ; ARMv8R-NEON-NOT: .eabi_attribute 27 1709 ; ARMv8R-NOFPU-NOT: .eabi_attribute 36 1710 ; ARMv8R-SP: .eabi_attribute 36, 1 @ Tag_FP_HP_extension 1711 ; ARMv8R-NEON: .eabi_attribute 36, 1 @ Tag_FP_HP_extension 1712 ; ARMv8R: .eabi_attribute 42, 1 @ Tag_MPextension_use 1713 ; ARMv8R: .eabi_attribute 68, 2 @ Tag_Virtualization_use 1714 ; ARMv8R: .eabi_attribute 38, 1 @ Tag_ABI_FP_16bit_format 1715 ; ARMv8R: .eabi_attribute 14, 0 @ Tag_ABI_PCS_R9_use 1716 1717 define i32 @f(i64 %z) { 1718 ret i32 0 1719 } 1720
