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      1 ; RUN: llc < %s -mtriple=armv7-apple-ios -verify-machineinstrs | FileCheck %s
      2 
      3 define void @test_cmpxchg_weak(i32 *%addr, i32 %desired, i32 %new) {
      4 ; CHECK-LABEL: test_cmpxchg_weak:
      5 
      6   %pair = cmpxchg weak i32* %addr, i32 %desired, i32 %new seq_cst monotonic
      7   %oldval = extractvalue { i32, i1 } %pair, 0
      8 ; CHECK-NEXT: %bb.0:
      9 ; CHECK-NEXT:     ldrex   [[LOADED:r[0-9]+]], [r0]
     10 ; CHECK-NEXT:     cmp     [[LOADED]], r1
     11 ; CHECK-NEXT:     bne     [[LDFAILBB:LBB[0-9]+_[0-9]+]]
     12 ; CHECK-NEXT: %bb.1:
     13 ; CHECK-NEXT:     dmb ish
     14 ; CHECK-NEXT:     strex   [[SUCCESS:r[0-9]+]], r2, [r0]
     15 ; CHECK-NEXT:     cmp     [[SUCCESS]], #0
     16 ; CHECK-NEXT:     beq     [[SUCCESSBB:LBB[0-9]+_[0-9]+]]
     17 ; CHECK-NEXT: %bb.2:
     18 ; CHECK-NEXT:     str     r3, [r0]
     19 ; CHECK-NEXT:     bx      lr
     20 ; CHECK-NEXT: [[LDFAILBB]]:
     21 ; CHECK-NEXT:     clrex
     22 ; CHECK-NEXT:     str     r3, [r0]
     23 ; CHECK-NEXT:     bx      lr
     24 ; CHECK-NEXT: [[SUCCESSBB]]:
     25 ; CHECK-NEXT:     dmb     ish
     26 ; CHECK-NEXT:     str     r3, [r0]
     27 ; CHECK-NEXT:     bx      lr
     28 
     29   store i32 %oldval, i32* %addr
     30   ret void
     31 }
     32 
     33 
     34 define i1 @test_cmpxchg_weak_to_bool(i32, i32 *%addr, i32 %desired, i32 %new) {
     35 ; CHECK-LABEL: test_cmpxchg_weak_to_bool:
     36 
     37   %pair = cmpxchg weak i32* %addr, i32 %desired, i32 %new seq_cst monotonic
     38   %success = extractvalue { i32, i1 } %pair, 1
     39 
     40 ; CHECK-NEXT: %bb.0:
     41 ; CHECK-NEXT:     ldrex   [[LOADED:r[0-9]+]], [r1]
     42 ; CHECK-NEXT:     cmp     [[LOADED]], r2
     43 ; CHECK-NEXT:     bne     [[LDFAILBB:LBB[0-9]+_[0-9]+]]
     44 ; CHECK-NEXT: %bb.1:
     45 ; CHECK-NEXT:     dmb ish
     46 ; CHECK-NEXT:     mov     r0, #0
     47 ; CHECK-NEXT:     strex   [[SUCCESS:r[0-9]+]], r3, [r1]
     48 ; CHECK-NEXT:     cmp     [[SUCCESS]], #0
     49 ; CHECK-NEXT:     bxne    lr
     50 ; CHECK-NEXT:     mov     r0, #1
     51 ; CHECK-NEXT:     dmb     ish
     52 ; CHECK-NEXT:     bx      lr
     53 ; CHECK-NEXT: [[LDFAILBB]]:
     54 ; CHECK-NEXT:     mov     r0, #0
     55 ; CHECK-NEXT:     clrex
     56 ; CHECK-NEXT:     bx      lr
     57 
     58   ret i1 %success
     59 }
     60