1 # RUN: llc -run-pass=arm-pseudo -verify-machineinstrs %s -o - | FileCheck %s 2 --- | 3 target triple = "armv7---gnueabi" 4 5 define i32 @test1(i32 %x) { 6 entry: 7 unreachable 8 } 9 define i32 @test2(i32 %x) { 10 entry: 11 unreachable 12 } 13 define i32 @test3(i32 %x) { 14 entry: 15 unreachable 16 } 17 ... 18 --- 19 name: test1 20 alignment: 2 21 tracksRegLiveness: true 22 liveins: 23 - { reg: '$r0', virtual-reg: '' } 24 body: | 25 bb.0.entry: 26 liveins: $r0 27 28 $r1 = MOVi 2, 14, $noreg, $noreg 29 CMPri killed $r0, 0, 14, $noreg, implicit-def $cpsr 30 $r1 = MOVCCi16 killed $r1, 500, 0, killed $cpsr 31 $r0 = MOVr killed $r1, 14, $noreg, $noreg 32 BX_RET 14, $noreg, implicit $r0 33 34 ... 35 --- 36 name: test2 37 alignment: 2 38 tracksRegLiveness: true 39 liveins: 40 - { reg: '$r0', virtual-reg: '' } 41 body: | 42 bb.0.entry: 43 liveins: $r0 44 45 $r1 = MOVi 2, 14, $noreg, $noreg 46 CMPri killed $r0, 0, 14, $noreg, implicit-def $cpsr 47 $r1 = MOVCCi32imm killed $r1, 500500500, 0, killed $cpsr 48 $r0 = MOVr killed $r1, 14, $noreg, $noreg 49 BX_RET 14, $noreg, implicit $r0 50 51 ... 52 --- 53 name: test3 54 alignment: 2 55 tracksRegLiveness: true 56 liveins: 57 - { reg: '$r0', virtual-reg: '' } 58 - { reg: '$r1', virtual-reg: '' } 59 body: | 60 bb.0.entry: 61 liveins: $r0, $r1 62 63 CMPri $r1, 500, 14, $noreg, implicit-def $cpsr 64 $r0 = MOVCCr killed $r0, killed $r1, 12, killed $cpsr 65 BX_RET 14, $noreg, implicit $r0 66 67 ... 68 69 # CHECK-LABEL: name: test1 70 # CHECK: $r1 = MOVi16 500, 0, killed $cpsr, implicit killed $r1 71 # CHECK-LABEL: name: test2 72 # CHECK: $r1 = MOVi16 2068, 0, $cpsr, implicit killed $r1 73 # CHECK: $r1 = MOVTi16 $r1, 7637, 0, $cpsr 74 # CHECK-LABEL: name: test3 75 # CHECK: $r0 = MOVr killed $r1, 12, killed $cpsr, $noreg, implicit killed $r0 76
